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authorMichael Shalayeff <mickey@cvs.openbsd.org>2003-06-25 21:53:46 +0000
committerMichael Shalayeff <mickey@cvs.openbsd.org>2003-06-25 21:53:46 +0000
commitfff2546a7d7ebdf0345911dab6b38cb25328157f (patch)
tree22076f7b295c87d2939fe6b2ffeb452dae7df794 /sys/dev
parent32374a66958e8b58792173b4382711c86d8c1c5e (diff)
add topic97b support; from netbsd and tested by Pedro la Peu <pedro@am-gen.org>
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/pci/pccbb.c26
-rw-r--r--sys/dev/pci/pccbbreg.h12
2 files changed, 36 insertions, 2 deletions
diff --git a/sys/dev/pci/pccbb.c b/sys/dev/pci/pccbb.c
index f3ecb3afc55..9bbb07f4462 100644
--- a/sys/dev/pci/pccbb.c
+++ b/sys/dev/pci/pccbb.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pccbb.c,v 1.31 2002/07/23 17:53:25 drahn Exp $ */
+/* $OpenBSD: pccbb.c,v 1.32 2003/06/25 21:53:45 mickey Exp $ */
/* $NetBSD: pccbb.c,v 1.42 2000/06/16 23:41:35 cgd Exp $ */
/*
@@ -769,6 +769,30 @@ pccbb_chipinit(sc)
DPRINTF(("0x%x\n", reg));
pci_conf_write(pc, tag, TOPIC_SLOT_CTRL, reg);
break;
+
+ case CB_TOPIC97:
+ reg = pci_conf_read(pc, tag, TOPIC_SLOT_CTRL);
+ DPRINTF(("%s: topic slot ctrl reg 0x%x -> ",
+ sc->sc_dev.dv_xname, reg));
+ reg |= (TOPIC_SLOT_CTRL_SLOTON | TOPIC_SLOT_CTRL_SLOTEN |
+ TOPIC_SLOT_CTRL_ID_LOCK | TOPIC_SLOT_CTRL_CARDBUS);
+ reg &= ~TOPIC_SLOT_CTRL_SWDETECT;
+ reg |= TOPIC97_SLOT_CTRL_PCIINT;
+ reg &= ~(TOPIC97_SLOT_CTRL_STSIRQP | TOPIC97_SLOT_CTRL_IRQP);
+ DPRINTF(("0x%x\n", reg));
+ pci_conf_write(pc, tag, TOPIC_SLOT_CTRL, reg);
+
+ /* make sure to assert LV card support bits */
+ bus_space_write_1(sc->sc_base_memt, sc->sc_base_memh,
+ 0x800 + 0x3e, bus_space_read_1(sc->sc_base_memt,
+ sc->sc_base_memh, 0x800 + 0x3e) | 0x03);
+
+ /* Power on the controller if the BIOS didn't */
+ reg = pci_conf_read(pc, tag, TOPIC100_PMCSR);
+ if ((reg & TOPIC100_PMCSR_MASK) != TOPIC100_PMCSR_D0)
+ pci_conf_write(pc, tag, TOPIC100_PMCSR,
+ (reg & ~TOPIC100_PMCSR_MASK) | TOPIC100_PMCSR_D0);
+ break;
}
/* Close all memory and I/O windows. */
diff --git a/sys/dev/pci/pccbbreg.h b/sys/dev/pci/pccbbreg.h
index fc2855e3c49..130b755563c 100644
--- a/sys/dev/pci/pccbbreg.h
+++ b/sys/dev/pci/pccbbreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pccbbreg.h,v 1.2 2000/07/06 19:49:11 aaron Exp $ */
+/* $OpenBSD: pccbbreg.h,v 1.3 2003/06/25 21:53:45 mickey Exp $ */
/* $NetBSD: pccbbreg.h,v 1.5 2000/06/07 09:02:47 haya Exp $ */
/*
* Copyright (c) 1999 HAYAKAWA Koichi. All rights reserved.
@@ -135,6 +135,9 @@
# define TOPIC_SLOT_CTRL_CLOCK_2 0x00000800 /* PCI Clock/2 */
# define TOPIC_SLOT_CTRL_CLOCK_1 0x00000400 /* PCI Clock */
# define TOPIC_SLOT_CTRL_CLOCK_0 0x00000000 /* no clock */
+# define TOPIC97_SLOT_CTRL_STSIRQP 0x00000400 /* status change intr pulse */
+# define TOPIC97_SLOT_CTRL_IRQP 0x00000200 /* function intr pulse */
+# define TOPIC97_SLOT_CTRL_PCIINT 0x00000100 /* intr routing to PCI INT */
# define TOPIC_SLOT_CTRL_CARDBUS 0x80000000
# define TOPIC_SLOT_CTRL_VS1 0x04000000
@@ -155,7 +158,14 @@
# define TOPIC97_REG_CTRL_CAUDIO_OFF 0x00000002
# define TOPIC_REG_CTRL_CAUDIO_INVERT 0x00000001
+/*
+ * Additional (subset of) Topic100 registers from
+ * Toshiba datasheet (Draft Rev. 01.4) 98/10/07
+ */
+#define TOPIC100_PMCSR 0x84 /* Power mgmt ctrl/stat register */
+# define TOPIC100_PMCSR_MASK 0x00000003
+# define TOPIC100_PMCSR_D0 0x0
/* socket event register (CB_SOCKET_EVENT) elements */
#define CB_SOCKET_EVENT_CSTS 0x01 /* CARDSTS event occurs */