diff options
| author | Patrick Wildt <patrick@cvs.openbsd.org> | 2018-05-30 13:32:41 +0000 |
|---|---|---|
| committer | Patrick Wildt <patrick@cvs.openbsd.org> | 2018-05-30 13:32:41 +0000 |
| commit | 4d118bd7cc51f8f6e25bc6fb04a45e743eb414bb (patch) | |
| tree | d884a96526e8d1630e69b56f920e77b96177aab6 /sys/dev | |
| parent | e008385c9dbbc2aded048fdbe8edbcafdf0d13d2 (diff) | |
Clear the DMA select bits in case we use PIO instead of DMA. Some
SDHC controllers get confused if the ADMA bit is set even though we
don't set the DMA enable flag. This can happen with the SDIO stack
which uses PIO for 4 byte read/writes but DMA for larger transfers
and thus switches from one mode to the other.
ok kettenis@
Diffstat (limited to 'sys/dev')
| -rw-r--r-- | sys/dev/fdt/imxesdhc.c | 5 | ||||
| -rw-r--r-- | sys/dev/sdmmc/sdhc.c | 5 |
2 files changed, 6 insertions, 4 deletions
diff --git a/sys/dev/fdt/imxesdhc.c b/sys/dev/fdt/imxesdhc.c index f6d085132c1..ec43886cc24 100644 --- a/sys/dev/fdt/imxesdhc.c +++ b/sys/dev/fdt/imxesdhc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: imxesdhc.c,v 1.5 2018/05/25 00:04:11 patrick Exp $ */ +/* $OpenBSD: imxesdhc.c,v 1.6 2018/05/30 13:32:40 patrick Exp $ */ /* * Copyright (c) 2009 Dale Rahn <drahn@openbsd.org> * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> @@ -966,7 +966,8 @@ imxesdhc_start_command(struct imxesdhc_softc *sc, struct sdmmc_command *cmd) HWRITE4(sc, SDHC_ADMA_SYS_ADDR, sc->adma_map->dm_segs[0].ds_addr); - } + } else + HCLR4(sc, SDHC_PROT_CTRL, SDHC_PROT_CTRL_DMASEL_MASK); /* * Start a CPU data transfer. Writing to the high order byte diff --git a/sys/dev/sdmmc/sdhc.c b/sys/dev/sdmmc/sdhc.c index b73368cb0c5..c2d149c8a90 100644 --- a/sys/dev/sdmmc/sdhc.c +++ b/sys/dev/sdmmc/sdhc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: sdhc.c,v 1.59 2018/05/25 00:04:12 patrick Exp $ */ +/* $OpenBSD: sdhc.c,v 1.60 2018/05/30 13:32:40 patrick Exp $ */ /* * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> @@ -918,7 +918,8 @@ sdhc_start_command(struct sdhc_host *hp, struct sdmmc_command *cmd) HWRITE4(hp, SDHC_ADMA_SYSTEM_ADDR, hp->adma_map->dm_segs[0].ds_addr); - } + } else + HCLR1(hp, SDHC_HOST_CTL, SDHC_DMA_SELECT); DPRINTF(1,("%s: cmd=%#x mode=%#x blksize=%d blkcount=%d\n", DEVNAME(hp->sc), command, mode, blksize, blkcount)); |