diff options
| author | pelikan <pelikan@cvs.openbsd.org> | 2014-02-13 23:41:25 +0000 |
|---|---|---|
| committer | pelikan <pelikan@cvs.openbsd.org> | 2014-02-13 23:41:25 +0000 |
| commit | 6f653d1a9bbce3674a11cedd0985469158183976 (patch) | |
| tree | 7c444927c5e797de2cccd3c9d7b6d898243fd449 /sys/dev | |
| parent | b1848ae631d8a923b8d8188f8e027882d436039f (diff) | |
Recognize SATA-III ports in dmesg.
ok millert
Diffstat (limited to 'sys/dev')
| -rw-r--r-- | sys/dev/ic/ahci.c | 7 | ||||
| -rw-r--r-- | sys/dev/ic/ahcireg.h | 7 |
2 files changed, 10 insertions, 4 deletions
diff --git a/sys/dev/ic/ahci.c b/sys/dev/ic/ahci.c index 55f28cb2149..9fe2f473b55 100644 --- a/sys/dev/ic/ahci.c +++ b/sys/dev/ic/ahci.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ahci.c,v 1.5 2013/12/06 21:03:02 deraadt Exp $ */ +/* $OpenBSD: ahci.c,v 1.6 2014/02/13 23:41:24 pelikan Exp $ */ /* * Copyright (c) 2006 David Gwynne <dlg@openbsd.org> @@ -191,7 +191,10 @@ ahci_attach(struct ahci_softc *sc) gen = "1 (1.5Gbps)"; break; case AHCI_REG_CAP_ISS_G1_2: - gen = "1 (1.5Gbps) and 2 (3Gbps)"; + gen = "2 (3Gbps)"; + break; + case AHCI_REG_CAP_ISS_G1_3: + gen = "3 (6Gbps)"; break; default: gen = "unknown"; diff --git a/sys/dev/ic/ahcireg.h b/sys/dev/ic/ahcireg.h index f52fbabd0db..366da7e7a65 100644 --- a/sys/dev/ic/ahcireg.h +++ b/sys/dev/ic/ahcireg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: ahcireg.h,v 1.1 2013/01/21 11:17:48 patrick Exp $ */ +/* $OpenBSD: ahcireg.h,v 1.2 2014/02/13 23:41:24 pelikan Exp $ */ /* * Copyright (c) 2006 David Gwynne <dlg@openbsd.org> @@ -33,7 +33,8 @@ #define AHCI_REG_CAP_SNZO (1<<19) /* Non Zero DMA Offsets */ #define AHCI_REG_CAP_ISS (0xf<<20) /* Interface Speed Support */ #define AHCI_REG_CAP_ISS_G1 (0x1<<20) /* Gen 1 (1.5 Gbps) */ -#define AHCI_REG_CAP_ISS_G1_2 (0x2<<20) /* Gen 1 and 2 (3 Gbps) */ +#define AHCI_REG_CAP_ISS_G2 (0x2<<20) /* Gen 2 (3 Gbps) */ +#define AHCI_REG_CAP_ISS_G3 (0x3<<20) /* Gen 3 (6 Gbps) */ #define AHCI_REG_CAP_SCLO (1<<24) /* Cmd List Override */ #define AHCI_REG_CAP_SAL (1<<25) /* Activity LED */ #define AHCI_REG_CAP_SALP (1<<26) /* Aggressive Link Pwr Mgmt */ @@ -168,6 +169,7 @@ #define AHCI_PREG_SSTS_SPD_NONE 0x00 #define AHCI_PREG_SSTS_SPD_GEN1 0x10 #define AHCI_PREG_SSTS_SPD_GEN2 0x20 +#define AHCI_PREG_SSTS_SPD_GEN3 0x30 #define AHCI_PREG_SSTS_IPM 0xf00 /* Interface Power Management */ #define AHCI_PREG_SSTS_IPM_NONE 0x000 #define AHCI_PREG_SSTS_IPM_ACTIVE 0x100 @@ -182,6 +184,7 @@ #define AHCI_PREG_SCTL_SPD_ANY 0x00 #define AHCI_PREG_SCTL_SPD_GEN1 0x10 #define AHCI_PREG_SCTL_SPD_GEN2 0x20 +#define AHCI_PREG_SCTL_SPD_GEN3 0x30 #define AHCI_PREG_SCTL_IPM 0xf00 /* Interface Power Management */ #define AHCI_PREG_SCTL_IPM_NONE 0x000 #define AHCI_PREG_SCTL_IPM_NOPARTIAL 0x100 |