Add RK3399 audio clocks.

ok kettenis@

2 files changed, 63 insertions, 1 deletions

diff --git a/sys/dev/fdt/rkclock.c b/sys/dev/fdt/rkclock.c
index ffd18eda634..c97c6e17bda 100644
--- a/sys/dev/fdt/rkclock.c
+++ b/sys/dev/fdt/rkclock.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: rkclock.c,v 1.52 2020/04/08 21:32:27 kettenis Exp $	*/
+/*	$OpenBSD: rkclock.c,v 1.53 2020/06/11 00:07:34 patrick Exp $	*/
 /*
  * Copyright (c) 2017, 2018 Mark Kettenis <kettenis@openbsd.org>
  *
@@ -1595,6 +1595,30 @@ struct rkclock rk3399_clocks[] = {
 		{ 0, 0, RK3399_XIN24M }
 	},
 	{
+		RK3399_CLK_I2S0_8CH, RK3399_CRU_CLKSEL_CON(28),
+		SEL(9, 8), 0,
+		{ RK3399_CLK_I2S0_DIV, 0, 0, RK3399_XIN12M },
+		SET_PARENT
+	},
+	{
+		RK3399_CLK_I2S1_8CH, RK3399_CRU_CLKSEL_CON(29),
+		SEL(9, 8), 0,
+		{ RK3399_CLK_I2S1_DIV, 0, 0, RK3399_XIN12M },
+		SET_PARENT
+	},
+	{
+		RK3399_CLK_I2S2_8CH, RK3399_CRU_CLKSEL_CON(30),
+		SEL(9, 8), 0,
+		{ RK3399_CLK_I2S2_DIV, 0, 0, RK3399_XIN12M },
+		SET_PARENT
+	},
+	{
+		RK3399_CLK_I2S_8CH_OUT, RK3399_CRU_CLKSEL_CON(31),
+		SEL(2, 2), 0,
+		{ RK3399_CLK_I2SOUT_SRC, RK3399_XIN12M },
+		SET_PARENT
+	},
+	{
 		RK3399_CLK_MAC, RK3399_CRU_CLKSEL_CON(20),
 		SEL(15, 14), DIV(12, 8),
 		{ RK3399_PLL_CPLL, RK3399_PLL_GPLL, RK3399_PLL_NPLL }
@@ -1715,6 +1739,28 @@ struct rkclock rk3399_clocks[] = {
 		{ RK3399_ACLK_VOP1 }
 	},
 	{
+		RK3399_CLK_I2S0_DIV, RK3399_CRU_CLKSEL_CON(28),
+		SEL(7, 7), DIV(6, 0),
+		{ RK3399_PLL_CPLL, RK3399_PLL_GPLL }
+	},
+	{
+		RK3399_CLK_I2S1_DIV, RK3399_CRU_CLKSEL_CON(29),
+		SEL(7, 7), DIV(6, 0),
+		{ RK3399_PLL_CPLL, RK3399_PLL_GPLL }
+	},
+	{
+		RK3399_CLK_I2S2_DIV, RK3399_CRU_CLKSEL_CON(30),
+		SEL(7, 7), DIV(6, 0),
+		{ RK3399_PLL_CPLL, RK3399_PLL_GPLL }
+	},
+	{
+		RK3399_CLK_I2SOUT_SRC, RK3399_CRU_CLKSEL_CON(31),
+		SEL(1, 0), 0,
+		{ RK3399_CLK_I2S0_8CH, RK3399_CLK_I2S1_8CH,
+		  RK3399_CLK_I2S2_8CH },
+		SET_PARENT
+	},
+	{
 		/* Sentinel */
 	}
 };
@@ -1998,6 +2044,8 @@ rk3399_get_frequency(void *cookie, uint32_t *cells)
 		return 24000000;
 	case RK3399_CLK_32K:
 		return 32768;
+	case RK3399_XIN12M:
+		return 12000000;
 	default:
 		break;
 	}
@@ -2028,6 +2076,10 @@ rk3399_set_frequency(void *cookie, uint32_t *cells, uint32_t freq)
 		return rk3399_set_armclk(sc, RK3399_CRU_CLKSEL_CON(0), freq);
 	case RK3399_ARMCLKB:
 		return rk3399_set_armclk(sc, RK3399_CRU_CLKSEL_CON(2), freq);
+	case RK3399_XIN12M:
+		if (freq / (1000 * 1000) != 12)
+			return -1;
+		return 0;
 	default:
 		break;
 	}
diff --git a/sys/dev/fdt/rkclock_clocks.h b/sys/dev/fdt/rkclock_clocks.h
index 575988058f8..aab50df2309 100644
--- a/sys/dev/fdt/rkclock_clocks.h
+++ b/sys/dev/fdt/rkclock_clocks.h
@@ -127,6 +127,11 @@
 #define RK3399_CLK_UART1		82
 #define RK3399_CLK_UART2		83
 #define RK3399_CLK_UART3		84
+#define RK3399_CLK_SPDIF_8CH		85
+#define RK3399_CLK_I2S0_8CH		86
+#define RK3399_CLK_I2S1_8CH		87
+#define RK3399_CLK_I2S2_8CH		88
+#define RK3399_CLK_I2S_8CH_OUT		89
 #define RK3399_CLK_MAC_RX		103
 #define RK3399_CLK_MAC_TX		104
 #define RK3399_CLK_MAC			105
@@ -201,3 +206,8 @@
 
 #define RK3399_XIN24M			1023
 #define RK3399_CLK_32K			1022
+#define RK3399_XIN12M			1021
+#define RK3399_CLK_I2S0_DIV		1020
+#define RK3399_CLK_I2S1_DIV		1019
+#define RK3399_CLK_I2S2_DIV		1018
+#define RK3399_CLK_I2SOUT_SRC		1017