diff options
author | Jonathan Gray <jsg@cvs.openbsd.org> | 2014-03-10 02:25:00 +0000 |
---|---|---|
committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2014-03-10 02:25:00 +0000 |
commit | 9e2ec00b52ed58c2ee8478838b64a4573de16896 (patch) | |
tree | 3af0e8219fa0f9bbe11c83646593fc71cdaaefd8 /sys/dev | |
parent | 6b9456a9b35f5624c1e5b0babbbe2d1ab5582a03 (diff) |
regen
Diffstat (limited to 'sys/dev')
-rw-r--r-- | sys/dev/pci/pcidevs.h | 86 | ||||
-rw-r--r-- | sys/dev/pci/pcidevs_data.h | 338 |
2 files changed, 422 insertions, 2 deletions
diff --git a/sys/dev/pci/pcidevs.h b/sys/dev/pci/pcidevs.h index 1c7b8790bf9..ab6cef8c719 100644 --- a/sys/dev/pci/pcidevs.h +++ b/sys/dev/pci/pcidevs.h @@ -2,7 +2,7 @@ * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT. * * generated from: - * OpenBSD: pcidevs,v 1.1718 2014/03/09 16:55:12 jsg Exp + * OpenBSD: pcidevs,v 1.1719 2014/03/10 02:23:56 jsg Exp */ /* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */ @@ -2916,6 +2916,67 @@ #define PCI_PRODUCT_INTEL_CORE4G_S_CRW_GT3 0x0d2a /* HD Graphics */ #define PCI_PRODUCT_INTEL_CORE4G_R_CRW_GT3_1 0x0d2b /* HD Graphics */ #define PCI_PRODUCT_INTEL_CORE4G_R_CRW_GT3_2 0x0d2e /* HD Graphics */ +#define PCI_PRODUCT_INTEL_E5V2_HB 0x0e00 /* E5 v2 Host */ +#define PCI_PRODUCT_INTEL_E5V2_PCIE_5 0x0e01 /* E5 v2 PCIE */ +#define PCI_PRODUCT_INTEL_E5V2_PCIE_1 0x0e02 /* E5 v2 PCIE */ +#define PCI_PRODUCT_INTEL_E5V2_PCIE_2 0x0e04 /* E5 v2 PCIE */ +#define PCI_PRODUCT_INTEL_E5V2_PCIE_3 0x0e08 /* E5 v2 PCIE */ +#define PCI_PRODUCT_INTEL_E5V2_PCIE_4 0x0e0a /* E5 v2 PCIE */ +#define PCI_PRODUCT_INTEL_E5V2_UBOX_1 0x0e1e /* E5 v2 UBOX */ +#define PCI_PRODUCT_INTEL_E5V2_UBOX_2 0x0e1f /* E5 v2 UBOX */ +#define PCI_PRODUCT_INTEL_E5V2_IOAT_1 0x0e20 /* E5 v2 I/OAT */ +#define PCI_PRODUCT_INTEL_E5V2_IOAT_2 0x0e21 /* E5 v2 I/OAT */ +#define PCI_PRODUCT_INTEL_E5V2_IOAT_3 0x0e22 /* E5 v2 I/OAT */ +#define PCI_PRODUCT_INTEL_E5V2_IOAT_4 0x0e23 /* E5 v2 I/OAT */ +#define PCI_PRODUCT_INTEL_E5V2_IOAT_5 0x0e24 /* E5 v2 I/OAT */ +#define PCI_PRODUCT_INTEL_E5V2_IOAT_6 0x0e25 /* E5 v2 I/OAT */ +#define PCI_PRODUCT_INTEL_E5V2_IOAT_7 0x0e26 /* E5 v2 I/OAT */ +#define PCI_PRODUCT_INTEL_E5V2_IOAT_8 0x0e27 /* E5 v2 I/OAT */ +#define PCI_PRODUCT_INTEL_E5V2_IIO_RAS 0x0e2a /* E5 v2 IIO RAS */ +#define PCI_PRODUCT_INTEL_E5V2_HA_2 0x0e30 /* E5 v2 Home Agent */ +#define PCI_PRODUCT_INTEL_E5V2_QPI_L_MON_0 0x0e34 /* E5 v2 QPI Link Monitor */ +#define PCI_PRODUCT_INTEL_E5V2_QPI_L_MON_1 0x0e36 /* E5 v2 QPI Link Monitor */ +#define PCI_PRODUCT_INTEL_E5V2_RAS 0x0e71 /* E5 v2 RAS */ +#define PCI_PRODUCT_INTEL_E5V2_QPI_L_0 0x0e80 /* E5 v2 QPI Link */ +#define PCI_PRODUCT_INTEL_E5V2_QPI 0x0e81 /* E5 v2 QPI */ +#define PCI_PRODUCT_INTEL_E5V2_QPI_L_1 0x0e90 /* E5 v2 QPI Link */ +#define PCI_PRODUCT_INTEL_E5V2_HA_1 0x0ea0 /* E5 v2 Home Agent */ +#define PCI_PRODUCT_INTEL_E5V2_TA 0x0ea8 /* E5 v2 TA */ +#define PCI_PRODUCT_INTEL_E5V2_TAD_1 0x0eaa /* E5 v2 TAD */ +#define PCI_PRODUCT_INTEL_E5V2_TAD_2 0x0eab /* E5 v2 TAD */ +#define PCI_PRODUCT_INTEL_E5V2_TAD_3 0x0eac /* E5 v2 TAD */ +#define PCI_PRODUCT_INTEL_E5V2_TAD_4 0x0ead /* E5 v2 TAD */ +#define PCI_PRODUCT_INTEL_E5V2_THERMAL_1 0x0eb0 /* E5 v2 Thermal */ +#define PCI_PRODUCT_INTEL_E5V2_THERMAL_2 0x0eb1 /* E5 v2 Thermal */ +#define PCI_PRODUCT_INTEL_E5V2_ERR_1 0x0eb2 /* E5 v2 Error */ +#define PCI_PRODUCT_INTEL_E5V2_ERR_2 0x0be3 /* E5 v2 Error */ +#define PCI_PRODUCT_INTEL_E5V2_THERMAL_3 0x0eb4 /* E5 v2 Thermal */ +#define PCI_PRODUCT_INTEL_E5V2_THERMAL_4 0x0eb5 /* E5 v2 Thermal */ +#define PCI_PRODUCT_INTEL_E5V2_ERR_3 0x0be6 /* E5 v2 Error */ +#define PCI_PRODUCT_INTEL_E5V2_ERR_4 0x0be7 /* E5 v2 Error */ +#define PCI_PRODUCT_INTEL_E5V2_PCU_0 0x0ec0 /* E5 v2 PCU */ +#define PCI_PRODUCT_INTEL_E5V2_PCU_1 0x0ec1 /* E5 v2 PCU */ +#define PCI_PRODUCT_INTEL_E5V2_PCU_2 0x0ec2 /* E5 v2 PCU */ +#define PCI_PRODUCT_INTEL_E5V2_PCU_3 0x0ec3 /* E5 v2 PCU */ +#define PCI_PRODUCT_INTEL_E5V2_PCU_4 0x0ec4 /* E5 v2 PCU */ +#define PCI_PRODUCT_INTEL_E5V2_SAD_1 0x0ec8 /* E5 v2 SAD */ +#define PCI_PRODUCT_INTEL_E5V2_BROADCAST_1 0x0ec9 /* E5 v2 Broadcast */ +#define PCI_PRODUCT_INTEL_E5V2_BROADCAST_2 0x0eca /* E5 v2 Broadcast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_1 0x0ee0 /* E5 v2 Unicast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_2 0x0ee1 /* E5 v2 Unicast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_3 0x0ee2 /* E5 v2 Unicast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_4 0x0ee3 /* E5 v2 Unicast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_5 0x0ee4 /* E5 v2 Unicast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_6 0x0ee5 /* E5 v2 Unicast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_7 0x0ee6 /* E5 v2 Unicast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_8 0x0ee7 /* E5 v2 Unicast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_9 0x0ee8 /* E5 v2 Unicast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_10 0x0ee9 /* E5 v2 Unicast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_11 0x0eea /* E5 v2 Unicast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_12 0x0eeb /* E5 v2 Unicast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_13 0x0eec /* E5 v2 Unicast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_14 0x0eed /* E5 v2 Unicast */ +#define PCI_PRODUCT_INTEL_E5V2_UNICAST_15 0x0eee /* E5 v2 Unicast */ #define PCI_PRODUCT_INTEL_82542 0x1000 /* 82542 */ #define PCI_PRODUCT_INTEL_82543GC_FIBER 0x1001 /* 82543GC */ #define PCI_PRODUCT_INTEL_MODEM56 0x1002 /* 56k Modem */ @@ -3218,6 +3279,9 @@ #define PCI_PRODUCT_INTEL_C600_MEI_2 0x1d3b /* C600 MEI */ #define PCI_PRODUCT_INTEL_C600_VPCIE 0x1d3e /* C600 Virtual PCIE */ #define PCI_PRODUCT_INTEL_C600_LPC 0x1d41 /* C600 LPC */ +#define PCI_PRODUCT_INTEL_C600_SMB_IDF_1 0x1d70 /* C600 SMBus */ +#define PCI_PRODUCT_INTEL_C600_SMB_IDF_2 0x1d71 /* C600 SMBus */ +#define PCI_PRODUCT_INTEL_C600_SMB_IDF_3 0x1d72 /* C600 SMBus */ #define PCI_PRODUCT_INTEL_7SERIES_SATA_1 0x1e00 /* 7 Series SATA */ #define PCI_PRODUCT_INTEL_7SERIES_SATA_2 0x1e01 /* 7 Series SATA */ #define PCI_PRODUCT_INTEL_7SERIES_AHCI_1 0x1e02 /* 7 Series AHCI */ @@ -3277,6 +3341,21 @@ #define PCI_PRODUCT_INTEL_I354_BP_1GBPS 0x1f40 /* I354 */ #define PCI_PRODUCT_INTEL_I354_SGMII 0x1f41 /* I354 SGMII */ #define PCI_PRODUCT_INTEL_I354_BP_2_5GBPS 0x1f45 /* I354 */ +#define PCI_PRODUCT_INTEL_DH8900_LPC 0x2310 /* DH8900 LPC */ +#define PCI_PRODUCT_INTEL_DH8900_AHCI 0x2323 /* DH8900 AHCI */ +#define PCI_PRODUCT_INTEL_DH8900_SMB 0x2330 /* DH8900 SMBus */ +#define PCI_PRODUCT_INTEL_DH8900_TERM 0x2332 /* DH8900 Thermal */ +#define PCI_PRODUCT_INTEL_DH8900_EHCI_1 0x2334 /* DH8900 USB */ +#define PCI_PRODUCT_INTEL_DH8900_EHCI_2 0x2335 /* DH8900 USB */ +#define PCI_PRODUCT_INTEL_DH8900_PCIE_1 0x2342 /* DH8900 PCIE */ +#define PCI_PRODUCT_INTEL_DH8900_PCIE_2 0x2343 /* DH8900 PCIE */ +#define PCI_PRODUCT_INTEL_DH8900_PCIE_3 0x2344 /* DH8900 PCIE */ +#define PCI_PRODUCT_INTEL_DH8900_PCIE_4 0x2345 /* DH8900 PCIE */ +#define PCI_PRODUCT_INTEL_DH8900_PCIE_5 0x2346 /* DH8900 PCIE */ +#define PCI_PRODUCT_INTEL_DH8900_PCIE_6 0x2347 /* DH8900 PCIE */ +#define PCI_PRODUCT_INTEL_DH8900_PCIE_7 0x2348 /* DH8900 PCIE */ +#define PCI_PRODUCT_INTEL_DH8900_PCIE_8 0x2349 /* DH8900 PCIE */ +#define PCI_PRODUCT_INTEL_DH8900_WATCHDOG 0x2360 /* DH8900 Watchdog */ #define PCI_PRODUCT_INTEL_82801AA_LPC 0x2410 /* 82801AA LPC */ #define PCI_PRODUCT_INTEL_82801AA_IDE 0x2411 /* 82801AA IDE */ #define PCI_PRODUCT_INTEL_82801AA_USB 0x2412 /* 82801AA USB */ @@ -3907,6 +3986,7 @@ #define PCI_PRODUCT_INTEL_3400_PT_IDER 0x3b66 /* 3400 PT IDER */ #define PCI_PRODUCT_INTEL_3400_KT 0x3b67 /* 3400 KT */ #define PCI_PRODUCT_INTEL_E5_HB 0x3c00 /* E5 Host */ +#define PCI_PRODUCT_INTEL_E5_PCIE_11 0xc301 /* E5 PCIE */ #define PCI_PRODUCT_INTEL_E5_PCIE_1 0x3c02 /* E5 PCIE */ #define PCI_PRODUCT_INTEL_E5_PCIE_2 0x3c03 /* E5 PCIE */ #define PCI_PRODUCT_INTEL_E5_PCIE_3 0x3c04 /* E5 PCIE */ @@ -5553,6 +5633,8 @@ /* Renesas products */ #define PCI_PRODUCT_RENESAS_SH7757_PPB 0x0012 /* SH7757 PCIE-PCI */ #define PCI_PRODUCT_RENESAS_SH7757_SW 0x0013 /* SH7757 PCIE Switch */ +#define PCI_PRODUCT_RENESAS_UPD720201_XHCI 0x0014 /* uPD720201 xHCI */ +#define PCI_PRODUCT_RENESAS_uPD720202_XHCI 0x0015 /* uPD720202 XHCI */ /* Rhino Equipment products */ #define PCI_PRODUCT_RHINO_R1T1 0x0105 /* T1/E1/J1 */ @@ -5589,6 +5671,7 @@ #define PCI_PRODUCT_PLX_1076 0x1076 /* I/O 1076 */ #define PCI_PRODUCT_PLX_1077 0x1077 /* I/O 1077 */ #define PCI_PRODUCT_PLX_PCI_6520 0x6520 /* PCI 6520 */ +#define PCI_PRODUCT_PLX_PEX_8111 0x8111 /* PEX 8111 */ #define PCI_PRODUCT_PLX_PEX_8112 0x8112 /* PEX 8112 */ #define PCI_PRODUCT_PLX_PEX_8114 0x8114 /* PEX 8114 */ #define PCI_PRODUCT_PLX_PEX_8517 0x8517 /* PEX 8517 */ @@ -6136,6 +6219,7 @@ #define PCI_PRODUCT_TI_XIO3130D 0x8233 /* XIO3130 PCIE-PCIE downstream */ #define PCI_PRODUCT_TI_XIO2221 0x823e /* XIO2221 PCIE-PCI */ #define PCI_PRODUCT_TI_XIO2221_FW 0x823f /* XIO2221 FireWire */ +#define PCI_PRODUCT_TI_XIO2001 0x8240 /* XIO2001 PCIE-PCI */ #define PCI_PRODUCT_TI_XHCI 0x8241 /* xHCI */ #define PCI_PRODUCT_TI_ACX100A 0x8400 /* ACX100A */ #define PCI_PRODUCT_TI_ACX100B 0x8401 /* ACX100B */ diff --git a/sys/dev/pci/pcidevs_data.h b/sys/dev/pci/pcidevs_data.h index ccb560adc33..94df170d45c 100644 --- a/sys/dev/pci/pcidevs_data.h +++ b/sys/dev/pci/pcidevs_data.h @@ -2,7 +2,7 @@ * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT. * * generated from: - * OpenBSD: pcidevs,v 1.1718 2014/03/09 16:55:12 jsg Exp + * OpenBSD: pcidevs,v 1.1719 2014/03/10 02:23:56 jsg Exp */ /* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */ @@ -9224,6 +9224,250 @@ static const struct pci_known_product pci_known_products[] = { "HD Graphics", }, { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_HB, + "E5 v2 Host", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_5, + "E5 v2 PCIE", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_1, + "E5 v2 PCIE", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_2, + "E5 v2 PCIE", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_3, + "E5 v2 PCIE", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_4, + "E5 v2 PCIE", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UBOX_1, + "E5 v2 UBOX", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UBOX_2, + "E5 v2 UBOX", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_1, + "E5 v2 I/OAT", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_2, + "E5 v2 I/OAT", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_3, + "E5 v2 I/OAT", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_4, + "E5 v2 I/OAT", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_5, + "E5 v2 I/OAT", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_6, + "E5 v2 I/OAT", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_7, + "E5 v2 I/OAT", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_8, + "E5 v2 I/OAT", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IIO_RAS, + "E5 v2 IIO RAS", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_HA_2, + "E5 v2 Home Agent", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI_L_MON_0, + "E5 v2 QPI Link Monitor", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI_L_MON_1, + "E5 v2 QPI Link Monitor", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_RAS, + "E5 v2 RAS", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI_L_0, + "E5 v2 QPI Link", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI, + "E5 v2 QPI", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI_L_1, + "E5 v2 QPI Link", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_HA_1, + "E5 v2 Home Agent", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_TA, + "E5 v2 TA", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_TAD_1, + "E5 v2 TAD", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_TAD_2, + "E5 v2 TAD", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_TAD_3, + "E5 v2 TAD", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_TAD_4, + "E5 v2 TAD", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_THERMAL_1, + "E5 v2 Thermal", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_THERMAL_2, + "E5 v2 Thermal", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_ERR_1, + "E5 v2 Error", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_ERR_2, + "E5 v2 Error", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_THERMAL_3, + "E5 v2 Thermal", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_THERMAL_4, + "E5 v2 Thermal", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_ERR_3, + "E5 v2 Error", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_ERR_4, + "E5 v2 Error", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCU_0, + "E5 v2 PCU", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCU_1, + "E5 v2 PCU", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCU_2, + "E5 v2 PCU", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCU_3, + "E5 v2 PCU", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCU_4, + "E5 v2 PCU", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_SAD_1, + "E5 v2 SAD", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_BROADCAST_1, + "E5 v2 Broadcast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_BROADCAST_2, + "E5 v2 Broadcast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_1, + "E5 v2 Unicast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_2, + "E5 v2 Unicast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_3, + "E5 v2 Unicast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_4, + "E5 v2 Unicast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_5, + "E5 v2 Unicast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_6, + "E5 v2 Unicast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_7, + "E5 v2 Unicast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_8, + "E5 v2 Unicast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_9, + "E5 v2 Unicast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_10, + "E5 v2 Unicast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_11, + "E5 v2 Unicast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_12, + "E5 v2 Unicast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_13, + "E5 v2 Unicast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_14, + "E5 v2 Unicast", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_15, + "E5 v2 Unicast", + }, + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82542, "82542", }, @@ -10432,6 +10676,18 @@ static const struct pci_known_product pci_known_products[] = { "C600 LPC", }, { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SMB_IDF_1, + "C600 SMBus", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SMB_IDF_2, + "C600 SMBus", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SMB_IDF_3, + "C600 SMBus", + }, + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_SATA_1, "7 Series SATA", }, @@ -10668,6 +10924,66 @@ static const struct pci_known_product pci_known_products[] = { "I354", }, { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_LPC, + "DH8900 LPC", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_AHCI, + "DH8900 AHCI", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_SMB, + "DH8900 SMBus", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_TERM, + "DH8900 Thermal", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_EHCI_1, + "DH8900 USB", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_EHCI_2, + "DH8900 USB", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_PCIE_1, + "DH8900 PCIE", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_PCIE_2, + "DH8900 PCIE", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_PCIE_3, + "DH8900 PCIE", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_PCIE_4, + "DH8900 PCIE", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_PCIE_5, + "DH8900 PCIE", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_PCIE_6, + "DH8900 PCIE", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_PCIE_7, + "DH8900 PCIE", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_PCIE_8, + "DH8900 PCIE", + }, + { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH8900_WATCHDOG, + "DH8900 Watchdog", + }, + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_LPC, "82801AA LPC", }, @@ -13188,6 +13504,10 @@ static const struct pci_known_product pci_known_products[] = { "E5 Host", }, { + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCIE_11, + "E5 PCIE", + }, + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCIE_1, "E5 PCIE", }, @@ -19108,6 +19428,14 @@ static const struct pci_known_product pci_known_products[] = { "SH7757 PCIE Switch", }, { + PCI_VENDOR_RENESAS, PCI_PRODUCT_RENESAS_UPD720201_XHCI, + "uPD720201 xHCI", + }, + { + PCI_VENDOR_RENESAS, PCI_PRODUCT_RENESAS_uPD720202_XHCI, + "uPD720202 XHCI", + }, + { PCI_VENDOR_RHINO, PCI_PRODUCT_RHINO_R1T1, "T1/E1/J1", }, @@ -19196,6 +19524,10 @@ static const struct pci_known_product pci_known_products[] = { "PCI 6520", }, { + PCI_VENDOR_PLX, PCI_PRODUCT_PLX_PEX_8111, + "PEX 8111", + }, + { PCI_VENDOR_PLX, PCI_PRODUCT_PLX_PEX_8112, "PEX 8112", }, @@ -21040,6 +21372,10 @@ static const struct pci_known_product pci_known_products[] = { "XIO2221 FireWire", }, { + PCI_VENDOR_TI, PCI_PRODUCT_TI_XIO2001, + "XIO2001 PCIE-PCI", + }, + { PCI_VENDOR_TI, PCI_PRODUCT_TI_XHCI, "xHCI", }, |