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authorBrad Smith <brad@cvs.openbsd.org>2004-12-11 02:06:48 +0000
committerBrad Smith <brad@cvs.openbsd.org>2004-12-11 02:06:48 +0000
commitb04ba64d0d548aba0f6a2887458c06a5de25a17f (patch)
treec381fa58c72696854ea5382379fd23bcfa1b05da /sys/netccitt
parentc74ab1dd3c68b5bc3acfc22fdb4904bfa45f2f0a (diff)
rev 1.51
When reading PHY regs over the i2c bus, the turnaround ACK bit is read one clock edge too late. This bit is driven low by slave (as any other input data bits from slave) when the clock is LOW. The current code did read the bit after the clock was driven high again. From FreeBSD
Diffstat (limited to 'sys/netccitt')
0 files changed, 0 insertions, 0 deletions