diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2022-07-13 03:53:38 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2022-07-13 03:53:38 +0000 |
| commit | 0314f65332fc380ce31939dee6be661051d50219 (patch) | |
| tree | b2630e545973c2ee1c077fdd37f4127bd02939ec /sys | |
| parent | 0c8f9fa777db5fc1c555d71bb7b5a4f8b1957744 (diff) | |
drm/amdgpu: vi: disable ASPM on Intel Alder Lake based systems
From Richard Gong
7a9e13b86536ce6dca54380f19d537b1c80caee3 in linux 5.15.y/5.15.54
aa482ddca85a3485be0e7b83a0789dc4d987670b in mainline linux
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/pci/drm/amd/amdgpu/vi.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/sys/dev/pci/drm/amd/amdgpu/vi.c b/sys/dev/pci/drm/amd/amdgpu/vi.c index a9a9bae46a8..d734b492445 100644 --- a/sys/dev/pci/drm/amd/amdgpu/vi.c +++ b/sys/dev/pci/drm/amd/amdgpu/vi.c @@ -81,6 +81,10 @@ #include "mxgpu_vi.h" #include "amdgpu_dm.h" +#if IS_ENABLED(CONFIG_X86) && defined(__linux__) +#include <asm/intel-family.h> +#endif + #define ixPCIE_LC_L1_PM_SUBSTATE 0x100100C6 #define PCIE_LC_L1_PM_SUBSTATE__LC_L1_SUBSTATES_OVERRIDE_EN_MASK 0x00000001L #define PCIE_LC_L1_PM_SUBSTATE__LC_PCI_PM_L1_2_OVERRIDE_MASK 0x00000002L @@ -1134,13 +1138,24 @@ static void vi_enable_aspm(struct amdgpu_device *adev) WREG32_PCIE(ixPCIE_LC_CNTL, data); } +static bool aspm_support_quirk_check(void) +{ +#if IS_ENABLED(CONFIG_X86) + struct cpu_info *ci = curcpu(); + + return !(ci->ci_family == 6 && ci->ci_model == 0x97); +#else + return true; +#endif +} + static void vi_program_aspm(struct amdgpu_device *adev) { u32 data, data1, orig; bool bL1SS = false; bool bClkReqSupport = true; - if (!amdgpu_device_should_use_aspm(adev)) + if (!amdgpu_device_should_use_aspm(adev) || !aspm_support_quirk_check()) return; if (adev->flags & AMD_IS_APU || |