use the correct capitalization for Realtek.

4 files changed, 27 insertions, 14 deletions

diff --git a/sys/dev/mii/miidevs b/sys/dev/mii/miidevs
index 335cc6a5ea9..af028554237 100644
--- a/sys/dev/mii/miidevs
+++ b/sys/dev/mii/miidevs
@@ -1,4 +1,4 @@
-$OpenBSD: miidevs,v 1.122 2014/05/06 16:59:03 pirofti Exp $
+$OpenBSD: miidevs,v 1.123 2014/11/24 00:13:42 brad Exp $
 /* $NetBSD: miidevs,v 1.3 1998/11/05 03:43:43 thorpej Exp $ */
 
 /*-
@@ -97,7 +97,7 @@ oui xxBROADCOM2			0x0050ef	Broadcom
 oui xxBROADCOM3			0x00d897	Broadcom
 oui xxDAVICOM			0x006040	Davicom
 
-/* This is the OUI of the gigE PHY in the RealTek 8169S/8110S chips */
+/* This is the OUI of the gigE PHY in the Realtek 8169S/8110S chips */
 oui xxREALTEK			0x000732	Realtek
 
 /* Contrived vendor for dcphy */
diff --git a/sys/dev/mii/rgephy.c b/sys/dev/mii/rgephy.c
index fc42bb18584..38126ce0893 100644
--- a/sys/dev/mii/rgephy.c
+++ b/sys/dev/mii/rgephy.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: rgephy.c,v 1.33 2013/12/30 22:35:29 brad Exp $	*/
+/*	$OpenBSD: rgephy.c,v 1.34 2014/11/24 00:13:42 brad Exp $	*/
 /*
  * Copyright (c) 2003
  *	Bill Paul <wpaul@windriver.com>.  All rights reserved.
@@ -34,7 +34,7 @@
  */
 
 /*
- * Driver for the RealTek 8169S/8110S internal 10/100/1000 PHY.
+ * Driver for the Realtek 8169S/8110S internal 10/100/1000 PHY.
  */
 
 #include <sys/param.h>
@@ -280,7 +280,7 @@ setit:
 
 	/*
 	 * Callback if something changed. Note that we need to poke
-	 * the DSP on the RealTek PHYs if the media changes.
+	 * the DSP on the Realtek PHYs if the media changes.
 	 *
 	 */
 	if (sc->mii_media_active != mii->mii_media_active || 
@@ -418,7 +418,7 @@ rgephy_loop(struct mii_softc *sc)
 	PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z)))
 
 /*
- * Initialize RealTek PHY per the datasheet. The DSP in the PHYs of
+ * Initialize Realtek PHY per the datasheet. The DSP in the PHYs of
  * existing revisions of the 8169S/8110S chips need to be tuned in
  * order to reliably negotiate a 1000Mbps link. This is only needed
  * for rev 0 and rev 1 of the PHY. Later versions work without
@@ -479,6 +479,19 @@ rgephy_load_dspcode(struct mii_softc *sc)
 void
 rgephy_reset(struct mii_softc *sc)
 {
+	uint16_t reg;
+
+	if (sc->mii_model == MII_MODEL_xxREALTEK_RTL8251) {
+		PHY_WRITE(sc, 31, 0x0a43);
+		reg = PHY_READ(sc, RGEPHY_CR);
+		if ((reg & RGEPHY_CR_ALDPS) != 0) {
+			printf("rgephy disabling ALDPS");
+			reg &= ~RGEPHY_CR_ALDPS;
+			PHY_WRITE(sc, RGEPHY_CR, reg);
+		}
+		PHY_WRITE(sc, 31, 0x0000);
+	}
+
 	mii_phy_reset(sc);
 	DELAY(1000);
 	rgephy_load_dspcode(sc);
diff --git a/sys/dev/mii/rgephyreg.h b/sys/dev/mii/rgephyreg.h
index 20585760e56..6c9f8db1a51 100644
--- a/sys/dev/mii/rgephyreg.h
+++ b/sys/dev/mii/rgephyreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: rgephyreg.h,v 1.5 2014/01/21 05:55:25 brad Exp $	*/
+/*	$OpenBSD: rgephyreg.h,v 1.6 2014/11/24 00:13:42 brad Exp $	*/
 /*
  * Copyright (c) 2003
  *	Bill Paul <wpaul@windriver.com>.  All rights reserved.
@@ -37,7 +37,7 @@
 #define	_DEV_MII_RGEPHYREG_H_
 
 /*
- * RealTek 8169S/8110S gigE PHY registers
+ * Realtek 8169S/8110S gigE PHY registers
  */
 
 #define RGEPHY_MII_BMCR		0x00
diff --git a/sys/dev/mii/rlphy.c b/sys/dev/mii/rlphy.c
index 359ac42e0d8..41dc1a79053 100644
--- a/sys/dev/mii/rlphy.c
+++ b/sys/dev/mii/rlphy.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: rlphy.c,v 1.32 2013/12/28 03:30:41 deraadt Exp $	*/
+/*	$OpenBSD: rlphy.c,v 1.33 2014/11/24 00:13:42 brad Exp $	*/
 
 /*
  * Copyright (c) 1998, 1999 Jason L. Wright (jason@thought.net)
@@ -196,7 +196,7 @@ rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
 			return (0);
 
 		/*
-		 * The RealTek PHY's autonegotiation doesn't need to be
+		 * The Realtek PHY's autonegotiation doesn't need to be
 		 * kicked; it continues in the background.
 		 */
 		break;
@@ -280,20 +280,20 @@ rlphy_status(struct mii_softc *sc)
 		 */
 
 		/*
-		 * The RealTek PHY supports non-NWAY link speed
+		 * The Realtek PHY supports non-NWAY link speed
 		 * detection, however it does not report the link
 		 * detection results via the ANLPAR or BMSR registers.
-		 * (What? RealTek doesn't do things the way everyone
+		 * (What? Realtek doesn't do things the way everyone
 		 * else does? I'm just shocked, shocked I tell you.)
 		 * To determine the link speed, we have to do one
 		 * of two things:
 		 *
-		 * - If this is a standalone RealTek RTL8201(L) PHY,
+		 * - If this is a standalone Realtek RTL8201(L) PHY,
 		 *   we can determine the link speed by testing bit 0
 		 *   in the magic, vendor-specific register at offset
 		 *   0x19.
 		 *
-		 * - If this is a RealTek MAC with integrated PHY, we
+		 * - If this is a Realtek MAC with integrated PHY, we
 		 *   can test the 'SPEED10' bit of the MAC's media status
 		 *   register.
 		 */