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authorMiod Vallat <miod@cvs.openbsd.org>2007-06-18 20:24:51 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2007-06-18 20:24:51 +0000
commit3353991148f65e2444aeb369599434bf7529f775 (patch)
treea85f6a14049169c76500b4410bacd54c72e2f086 /sys
parent01e36b777c5209dcfe69b4722ff88876856c25eb (diff)
Disable instruction reordering around cpl assignments.
Diffstat (limited to 'sys')
-rw-r--r--sys/arch/mips64/mips64/interrupt.c8
-rw-r--r--sys/arch/sgi/localbus/macebus.c18
2 files changed, 21 insertions, 5 deletions
diff --git a/sys/arch/mips64/mips64/interrupt.c b/sys/arch/mips64/mips64/interrupt.c
index 5aaaaedd63b..19a2b952aa7 100644
--- a/sys/arch/mips64/mips64/interrupt.c
+++ b/sys/arch/mips64/mips64/interrupt.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: interrupt.c,v 1.27 2007/05/29 18:10:43 miod Exp $ */
+/* $OpenBSD: interrupt.c,v 1.28 2007/06/18 20:24:48 miod Exp $ */
/*
* Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
@@ -216,7 +216,9 @@ interrupt(struct trap_frame *trapframe)
compoll(NULL);
}
#endif
+ __asm__ (" .set noreorder\n");
cpl = xcpl;
+ __asm__ (" sync\n .set reorder\n");
}
@@ -470,7 +472,9 @@ generic_do_pending_int(int newcpl)
/* Don't recurse... but change the mask. */
if (processing) {
+ __asm__ (" .set noreorder\n");
cpl = newcpl;
+ __asm__ (" sync\n .set reorder\n");
return;
}
processing = 1;
@@ -515,7 +519,9 @@ generic_do_pending_int(int newcpl)
}
#endif
+ __asm__ (" .set noreorder\n");
cpl = newcpl;
+ __asm__ (" sync\n .set reorder\n");
updateimask(newcpl); /* Update CPU mask ins SR register */
processing = 0;
}
diff --git a/sys/arch/sgi/localbus/macebus.c b/sys/arch/sgi/localbus/macebus.c
index 16543214a86..695ea79c46a 100644
--- a/sys/arch/sgi/localbus/macebus.c
+++ b/sys/arch/sgi/localbus/macebus.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: macebus.c,v 1.21 2007/05/29 18:10:43 miod Exp $ */
+/* $OpenBSD: macebus.c,v 1.22 2007/06/18 20:24:50 miod Exp $ */
/*
* Copyright (c) 2000-2004 Opsycon AB (www.opsycon.se)
@@ -598,7 +598,7 @@ macebus_intr_makemasks(void)
void
macebus_do_pending_int(int newcpl)
{
-#ifdef _USE_SILLY_OVERWORKED_HW_INT_PENDING_HANDLER_
+#if 0
struct intrhand *ih;
int vector;
intrmask_t hwpend;
@@ -607,7 +607,9 @@ macebus_do_pending_int(int newcpl)
/* Don't recurse... but change the mask */
if (processing) {
+ __asm__ (" .set noreorder\n");
cpl = newcpl;
+ __asm__ (" sync\n .set reorder\n");
return;
}
processing = 1;
@@ -627,7 +629,9 @@ macebus_do_pending_int(int newcpl)
atomic_clearbits_int(&ipending, hwpend);
/* Enable all non pending non masked hardware interrupts */
+ __asm__ (" .set noreorder\n");
cpl = (cpl & SINT_ALLMASK) | (newcpl & ~SINT_ALLMASK) | hwpend;
+ __asm__ (" sync\n .set reorder\n");
hw_setintrmask(cpl);
while (hwpend) {
@@ -644,7 +648,9 @@ macebus_do_pending_int(int newcpl)
}
/* Enable all processed pending hardware interrupts */
+ __asm__ (" .set noreorder\n");
cpl &= ~hwpend;
+ __asm__ (" sync\n .set reorder\n");
hw_setintrmask(cpl);
if ((ipending & SINT_CLOCKMASK) & ~newcpl) {
@@ -663,7 +669,7 @@ macebus_do_pending_int(int newcpl)
}
}
-#ifdef NOTYET
+#ifdef notyet
if ((ipending & SINT_TTYMASK) & ~newcpl) {
atomic_clearbits_int(&ipending, SINT_TTYMASK);
compoll(NULL);
@@ -671,16 +677,20 @@ macebus_do_pending_int(int newcpl)
#endif
/* Update masks to new cpl. Order highly important! */
+ __asm__ (" .set noreorder\n");
cpl = newcpl;
+ __asm__ (" sync\n .set reorder\n");
hw_setintrmask(newcpl);
processing = 0;
#else
/* Update masks to new cpl. Order highly important! */
+ __asm__ (" .set noreorder\n");
cpl = newcpl;
+ __asm__ (" sync\n .set reorder\n");
hw_setintrmask(newcpl);
/* If we still have softints pending trigg processing */
- if (ipending & SINT_ALLMASK & ~cpl)
+ if (ipending & SINT_ALLMASK & ~newcpl)
setsoftintr0();
#endif
}