sprinkle some tabs.

2 files changed, 111 insertions, 118 deletions

diff --git a/sys/dev/pci/if_ixgb.h b/sys/dev/pci/if_ixgb.h
index c04a8b7fe5d..35aa7cc13c9 100644
--- a/sys/dev/pci/if_ixgb.h
+++ b/sys/dev/pci/if_ixgb.h
@@ -31,7 +31,7 @@ POSSIBILITY OF SUCH DAMAGE.
 
 ***************************************************************************/
 
-/* $OpenBSD: if_ixgb.h,v 1.4 2006/03/27 17:07:10 brad Exp $ */
+/* $OpenBSD: if_ixgb.h,v 1.5 2006/05/01 21:01:11 brad Exp $ */
 
 #ifndef _IXGB_H_DEFINED_
 #define _IXGB_H_DEFINED_
@@ -84,12 +84,12 @@ POSSIBILITY OF SUCH DAMAGE.
 /* Tunables */
 
 /*
- * TxDescriptors Valid Range: 64-4096 Default Value: 1024 This value is the
+ * TxDescriptors Valid Range: 64-4096 Default Value: 2048 This value is the
  * number of transmit descriptors allocated by the driver. Increasing this
  * value allows the driver to queue more transmits. Each descriptor is 16
  * bytes.
  */
-#define IXGB_MAX_TXD                      1024
+#define IXGB_MAX_TXD			2048
 
 /*
  * RxDescriptors Valid Range: 64-4096 Default Value: 1024 This value is the
@@ -98,7 +98,7 @@ POSSIBILITY OF SUCH DAMAGE.
  * is 16 bytes.  A receive buffer is also allocated for each descriptor. The
  * maximum MTU size is 16110.
  */
-#define IXGB_MAX_RXD                     1024
+#define IXGB_MAX_RXD			1024
 
 /*
  * TxIntDelay Valid Range: 0-65535 (0=off) Default Value: 32 This value
@@ -108,7 +108,7 @@ POSSIBILITY OF SUCH DAMAGE.
  * dropped transmits, this value may be set too high causing the driver to
  * run out of available transmit descriptors.
  */
-#define TIDV 32
+#define TIDV				32
 
 /*
  * RxIntDelay Valid Range: 0-65535 (0=off) Default Value: 72 This value
@@ -120,18 +120,18 @@ POSSIBILITY OF SUCH DAMAGE.
  * may be set too high, causing the driver to run out of available receive
  * descriptors.
  */
-#define RDTR 72
+#define RDTR				72
 
 /*
  * This parameter controls the duration of transmit watchdog timer.
  */
-#define IXGB_TX_TIMEOUT                   5	/* set to 5 seconds */
+#define IXGB_TX_TIMEOUT			5	/* set to 5 seconds */
 
 /*
  * This parameter controls when the driver calls the routine to reclaim
  * transmit descriptors.
  */
-#define IXGB_TX_CLEANUP_THRESHOLD         IXGB_MAX_TXD / 8
+#define IXGB_TX_CLEANUP_THRESHOLD	(sc->num_tx_desc / 8)
 
 /* 
  * Flow Control Types. 
@@ -140,16 +140,16 @@ POSSIBILITY OF SUCH DAMAGE.
  * 3. ixgb_fc_tx_pause - Flow Control Transmit Only
  * 4. ixgb_fc_full - Flow Control Enabled
  */
-#define FLOW_CONTROL_NONE    	ixgb_fc_none 
-#define FLOW_CONTROL_RX_PAUSE   ixgb_fc_rx_pause
-#define FLOW_CONTROL_TX_PAUSE   ixgb_fc_tx_pause
-#define FLOW_CONTROL_FULL       ixgb_fc_full
+#define FLOW_CONTROL_NONE	ixgb_fc_none 
+#define FLOW_CONTROL_RX_PAUSE	ixgb_fc_rx_pause
+#define FLOW_CONTROL_TX_PAUSE	ixgb_fc_tx_pause
+#define FLOW_CONTROL_FULL	ixgb_fc_full
 
 /*
  * Set the flow control type. Assign one of the above flow control types to be enabled.
  * Default Value: FLOW_CONTROL_FULL   
  */    
-#define FLOW_CONTROL	        FLOW_CONTROL_FULL
+#define FLOW_CONTROL		FLOW_CONTROL_FULL
 
 /*
  * Receive Flow control low threshold (when we send a resume frame) (FCRTL)
@@ -157,55 +157,50 @@ POSSIBILITY OF SUCH DAMAGE.
  * less than high threshold by at least 8 bytes Default Value:  163,840
  * (0x28000)
  */
-#define FCRTL                   0x28000
+#define FCRTL			0x28000
 
 /*
  * Receive Flow control high threshold (when we send a pause frame) (FCRTH)
  * Valid Range: 1,536 - 262,136 (0x600 - 0x3FFF8, 8 byte granularity) Default
  * Value: 196,608 (0x30000)
  */
-#define FCRTH                   0x30000
+#define FCRTH			0x30000
 
 /*
  * Flow control request timeout (how long to pause the link partner's tx)
  * (PAP 15:0) Valid Range: 1 - 65535 Default Value:  256 (0x100)
  */
-#define FCPAUSE		     0x100
+#define FCPAUSE			0x100
 
 /* Tunables -- End */
 
-
-#define IXGB_VENDOR_ID                    0x8086
-#define IXGB_MMBA                         0x0010	/* Mem base address */
+#define IXGB_MMBA		0x0010	/* Mem base address */
 #define IXGB_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
 
-#define IOCTL_CMD_TYPE                  u_long
-#define MAX_NUM_MULTICAST_ADDRESSES     128
-#define PCI_ANY_ID                      (~0U)
+#define MAX_NUM_MULTICAST_ADDRESSES	128
 
 /* Defines for printing debug information */
-#define DEBUG_INIT  0
-#define DEBUG_IOCTL 0
-#define DEBUG_HW    0
-
-#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
-#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
-#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
-#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
-#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
-#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
-#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
-#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
-#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
-
+#define DEBUG_INIT	0
+#define DEBUG_IOCTL	0
+#define DEBUG_HW	0
+
+#define INIT_DEBUGOUT(S)		if (DEBUG_INIT)  printf(S "\n")
+#define INIT_DEBUGOUT1(S, A)		if (DEBUG_INIT)  printf(S "\n", A)
+#define INIT_DEBUGOUT2(S, A, B)		if (DEBUG_INIT)  printf(S "\n", A, B)
+#define IOCTL_DEBUGOUT(S)		if (DEBUG_IOCTL) printf(S "\n")
+#define IOCTL_DEBUGOUT1(S, A)		if (DEBUG_IOCTL) printf(S "\n", A)
+#define IOCTL_DEBUGOUT2(S, A, B)	if (DEBUG_IOCTL) printf(S "\n", A, B)
+#define HW_DEBUGOUT(S)			if (DEBUG_HW) printf(S "\n")
+#define HW_DEBUGOUT1(S, A)		if (DEBUG_HW) printf(S "\n", A)
+#define HW_DEBUGOUT2(S, A, B)		if (DEBUG_HW) printf(S "\n", A, B)
 
 /* Supported RX Buffer Sizes */
-#define IXGB_RXBUFFER_2048        2048
-#define IXGB_RXBUFFER_4096        4096
-#define IXGB_RXBUFFER_8192        8192
-#define IXGB_RXBUFFER_16384      16384
+#define IXGB_RXBUFFER_2048	2048
+#define IXGB_RXBUFFER_4096	4096
+#define IXGB_RXBUFFER_8192	8192
+#define IXGB_RXBUFFER_16384	16384
 
-#define IXGB_MAX_SCATTER           100
+#define IXGB_MAX_SCATTER	100
 
 struct ixgb_buffer {
 	struct mbuf    *m_head;
@@ -217,54 +212,55 @@ struct ixgb_q {
 };
 
 /*
- * Bus dma allocation structure used by ixgb_dma_malloc and ixgb_dma_free.
+ * Bus dma allocation structure used by
+ * ixgb_dma_malloc and ixgb_dma_free.
  */
 struct ixgb_dma_alloc {
-	bus_addr_t      dma_paddr;
-	caddr_t         dma_vaddr;
-	bus_dma_tag_t   dma_tag;
-	bus_dmamap_t    dma_map;
-	bus_dma_segment_t dma_seg;
-	bus_size_t      dma_size;
-	int             dma_nseg;
+	bus_addr_t		dma_paddr;
+	caddr_t			dma_vaddr;
+	bus_dma_tag_t		dma_tag;
+	bus_dmamap_t		dma_map;
+	bus_dma_segment_t	dma_seg;
+	bus_size_t		dma_size;
+	int			dma_nseg;
 };
 
 typedef enum _XSUM_CONTEXT_T {
 	OFFLOAD_NONE,
 	OFFLOAD_TCP_IP,
 	OFFLOAD_UDP_IP
-}               XSUM_CONTEXT_T;
+} XSUM_CONTEXT_T;
 
 /* Our adapter structure */
 struct ixgb_softc {
 	struct device	sc_dv;
-	struct arpcom   interface_data;
-	struct ixgb_hw  hw;
+	struct arpcom	interface_data;
+	struct ixgb_hw	hw;
 
 	/* OpenBSD operating-system-specific structures */
 	struct ixgb_osdep osdep;
-	struct ifmedia  media;
-	int             io_rid;
+	struct ifmedia	media;
+	int		io_rid;
 
-	void            *sc_intrhand;
+	void		*sc_intrhand;
 	struct timeout	ixgb_intr_enable;
 	struct timeout	timer_handle;
 	void		*sc_powerhook;
 	void		*sc_shutdownhook;
 
 	/* Info about the board itself */
-	u_int32_t       part_num;
-	u_int8_t        link_active;
-	u_int16_t       link_speed;
-	u_int16_t       link_duplex;
-	u_int32_t       tx_int_delay;
-	u_int32_t       tx_abs_int_delay;
-	u_int32_t       rx_int_delay;
-	u_int32_t       rx_abs_int_delay;
+	u_int32_t	part_num;
+	u_int8_t	link_active;
+	u_int16_t	link_speed;
+	u_int16_t	link_duplex;
+	u_int32_t	tx_int_delay;
+	u_int32_t	tx_abs_int_delay;
+	u_int32_t	rx_int_delay;
+	u_int32_t	rx_abs_int_delay;
 
-	int             raidc;
+	int		raidc;
 
-	XSUM_CONTEXT_T  active_checksum_context;
+	XSUM_CONTEXT_T	active_checksum_context;
 
 	/*
 	 * Transmit definitions
@@ -275,15 +271,15 @@ struct ixgb_softc {
 	 * next_avail_tx_desc. The number of remaining tx_desc is
 	 * num_tx_desc_avail.
 	 */
-	struct ixgb_dma_alloc txdma;	/* bus_dma glue for tx desc */
-	struct ixgb_tx_desc *tx_desc_base;
-	u_int32_t       next_avail_tx_desc;
-	u_int32_t       oldest_used_tx_desc;
-	                volatile u_int16_t num_tx_desc_avail;
-	u_int16_t       num_tx_desc;
-	u_int32_t       txd_cmd;
-	struct ixgb_buffer *tx_buffer_area;
-	bus_dma_tag_t   txtag;	/* dma tag for tx */
+	struct ixgb_dma_alloc	txdma;		/* bus_dma glue for tx desc */
+	struct ixgb_tx_desc	*tx_desc_base;
+	u_int32_t		next_avail_tx_desc;
+	u_int32_t		oldest_used_tx_desc;
+	volatile u_int16_t	num_tx_desc_avail;
+	u_int16_t		num_tx_desc;
+	u_int32_t		txd_cmd;
+	struct ixgb_buffer	*tx_buffer_area;
+	bus_dma_tag_t		txtag;		/* dma tag for tx */
 
 	/*
 	 * Receive definitions
@@ -292,30 +288,30 @@ struct ixgb_softc {
 	 * and paired with an array of rx_buffers (at rx_buffer_area). The
 	 * next pair to check on receive is at offset next_rx_desc_to_check
 	 */
-	struct ixgb_dma_alloc rxdma;	/* bus_dma glue for rx desc */
-	struct ixgb_rx_desc *rx_desc_base;
-	u_int32_t       next_rx_desc_to_check;
-	u_int16_t       num_rx_desc;
-	u_int32_t       rx_buffer_len;
-	struct ixgb_buffer *rx_buffer_area;
-	bus_dma_tag_t   rxtag;	/* dma tag for Rx */
-	u_int32_t       next_rx_desc_to_use;
+	struct ixgb_dma_alloc	rxdma;		/* bus_dma glue for rx desc */
+	struct ixgb_rx_desc	*rx_desc_base;
+	u_int32_t		next_rx_desc_to_check;
+	u_int16_t		num_rx_desc;
+	u_int32_t		rx_buffer_len;
+	struct ixgb_buffer	*rx_buffer_area;
+	bus_dma_tag_t		rxtag;		/* dma tag for Rx */
+	u_int32_t		next_rx_desc_to_use;
 
 	/* Jumbo frame */
-	struct mbuf    *fmp;
-	struct mbuf    *lmp;
+	struct mbuf		*fmp;
+	struct mbuf		*lmp;
 
 	/* Misc stats maintained by the driver */
-	unsigned long   dropped_pkts;
-	unsigned long   mbuf_alloc_failed;
-	unsigned long   mbuf_cluster_failed;
-	unsigned long   no_tx_desc_avail1;
-	unsigned long   no_tx_desc_avail2;
-	unsigned long   no_tx_map_avail;
-	unsigned long   no_tx_dma_setup;
-	unsigned long	watchdog_events;
-
-	struct ixgb_hw_stats stats;
+	unsigned long		dropped_pkts;
+	unsigned long		mbuf_alloc_failed;
+	unsigned long		mbuf_cluster_failed;
+	unsigned long		no_tx_desc_avail1;
+	unsigned long		no_tx_desc_avail2;
+	unsigned long		no_tx_map_avail;
+	unsigned long		no_tx_dma_setup;
+	unsigned long		watchdog_events;
+
+	struct ixgb_hw_stats	stats;
 };
 
-#endif				/* _IXGB_H_DEFINED_ */
+#endif /* _IXGB_H_DEFINED_ */
diff --git a/sys/dev/pci/if_ixgb_osdep.h b/sys/dev/pci/if_ixgb_osdep.h
index e22b052d8af..79f3b599673 100644
--- a/sys/dev/pci/if_ixgb_osdep.h
+++ b/sys/dev/pci/if_ixgb_osdep.h
@@ -31,26 +31,26 @@ POSSIBILITY OF SUCH DAMAGE.
 
 ***************************************************************************/
 
-/* $OpenBSD: if_ixgb_osdep.h,v 1.1 2005/11/14 23:25:43 brad Exp $ */
+/* $OpenBSD: if_ixgb_osdep.h,v 1.2 2006/05/01 21:01:12 brad Exp $ */
 
 #ifndef _IXGB_OPENBSD_OS_H_
 #define _IXGB_OPENBSD_OS_H_
 
-#define ASSERT(x) if(!(x)) panic("IXGB: x")
+#define ASSERT(x)	if(!(x)) panic("IXGB: x")
 
 /* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
-#define usec_delay(x) DELAY(x)
-#define msec_delay(x) DELAY(1000*(x))
+#define usec_delay(x)	DELAY(x)
+#define msec_delay(x)	DELAY(1000*(x))
 
 #define DBG 0 
-#define MSGOUT(S, A, B)     printf(S "\n", A, B)
-#define DEBUGFUNC(F)        DEBUGOUT(F);
+#define MSGOUT(S, A, B)	printf(S "\n", A, B)
+#define DEBUGFUNC(F)	DEBUGOUT(F);
 #if DBG
-	#define DEBUGOUT(S)         printf(S "\n")
-	#define DEBUGOUT1(S,A)      printf(S "\n",A)
-	#define DEBUGOUT2(S,A,B)    printf(S "\n",A,B)
-	#define DEBUGOUT3(S,A,B,C)  printf(S "\n",A,B,C)
-	#define DEBUGOUT7(S,A,B,C,D,E,F,G)  printf(S "\n",A,B,C,D,E,F,G)
+	#define DEBUGOUT(S)			printf(S "\n")
+	#define DEBUGOUT1(S,A)			printf(S "\n",A)
+	#define DEBUGOUT2(S,A,B)		printf(S "\n",A,B)
+	#define DEBUGOUT3(S,A,B,C)		printf(S "\n",A,B,C)
+	#define DEBUGOUT7(S,A,B,C,D,E,F,G)	printf(S "\n",A,B,C,D,E,F,G)
 #else
 	#define DEBUGOUT(S)
 	#define DEBUGOUT1(S,A)
@@ -59,26 +59,23 @@ POSSIBILITY OF SUCH DAMAGE.
 	#define DEBUGOUT7(S,A,B,C,D,E,F,G)
 #endif
 
-#define FALSE               0
-#define TRUE                1
-#define CMD_MEM_WRT_INVALIDATE          0x0010  /* BIT_4 */
-#define PCI_COMMAND_REGISTER            PCIR_COMMAND
+#define CMD_MEM_WRT_INVALIDATE		0x0010	/* BIT_4 */
 
 #define le16_to_cpu 
 
 struct ixgb_osdep
 {
-	bus_space_tag_t    mem_bus_space_tag;
-	bus_space_handle_t mem_bus_space_handle;
-        struct device     *dev;
+	bus_space_tag_t		mem_bus_space_tag;
+	bus_space_handle_t	mem_bus_space_handle;
+	struct device		*dev;
 
-        struct pci_attach_args ixgb_pa;
+	struct pci_attach_args	ixgb_pa;
 
-        bus_size_t              ixgb_memsize;
-        bus_addr_t              ixgb_membase;
+	bus_size_t		ixgb_memsize;
+	bus_addr_t		ixgb_membase;
 };
 
-#define IXGB_WRITE_FLUSH(a) IXGB_READ_REG(a, STATUS)
+#define IXGB_WRITE_FLUSH(a)	IXGB_READ_REG(a, STATUS)
 
 #define IXGB_READ_REG(a, reg)						\
    bus_space_read_4( ((struct ixgb_osdep *)(a)->back)->mem_bus_space_tag, \
@@ -101,7 +98,7 @@ struct ixgb_osdep
                       (IXGB_##reg + ((offset) << 2)), value)
 
 #ifdef DEBUG
-#define IXGB_KASSERT(exp,msg)        do { if (!(exp)) panic msg; } while (0)
+#define IXGB_KASSERT(exp,msg)	do { if (!(exp)) panic msg; } while (0)
 #else
 #define IXGB_KASSERT(exp,msg)
 #endif