diff options
author | Mark Kettenis <kettenis@cvs.openbsd.org> | 2017-07-23 10:11:28 +0000 |
---|---|---|
committer | Mark Kettenis <kettenis@cvs.openbsd.org> | 2017-07-23 10:11:28 +0000 |
commit | 429d76352955b5ab348af5dbba58142f1ab0b963 (patch) | |
tree | a479c23edfe9edec8d38e21ebff49dfc79278c22 /sys | |
parent | f360a4859b2023bb9c7eb0c335fa0076dc79707f (diff) |
Replace CPWAIT with an isb instruction, which is the proper way to make sure
CP15 updates are visible. Also add an isb instruction before switching on
the MMU to make sure that all the MMU-related CP15 registers updates are
visible.
Makes booting on a Cortex-A12/A17 get a bit further.
ok drahn@, jsg@
Diffstat (limited to 'sys')
-rw-r--r-- | sys/arch/armv7/armv7/locore0.S | 19 |
1 files changed, 3 insertions, 16 deletions
diff --git a/sys/arch/armv7/armv7/locore0.S b/sys/arch/armv7/armv7/locore0.S index 2a4e98cbe8c..b90d94e9812 100644 --- a/sys/arch/armv7/armv7/locore0.S +++ b/sys/arch/armv7/armv7/locore0.S @@ -1,4 +1,4 @@ -/* $OpenBSD: locore0.S,v 1.1 2017/06/14 13:12:49 patrick Exp $ */ +/* $OpenBSD: locore0.S,v 1.2 2017/07/23 10:11:27 kettenis Exp $ */ /* $NetBSD: lubbock_start.S,v 1.1 2003/06/18 10:51:15 bsh Exp $ */ /* @@ -42,20 +42,6 @@ #define ERET .long 0xe160006e @ eret /* - * CPWAIT -- Canonical method to wait for CP15 update. - * NOTE: Clobbers the specified temp reg. - * copied from arm/arm/cpufunc_asm_xscale.S - * XXX: better be in a common header file. - */ -#define CPWAIT_BRANCH \ - sub pc, pc, #4 - -#define CPWAIT(tmp) \ - mrc CP15_TTBR0(tmp) /* arbitrary read of CP15 */ ;\ - mov tmp, tmp /* wait for it to complete */ ;\ - CPWAIT_BRANCH /* branch to next insn */ - -/* * Kernel start routine for OMAP * this code is excuted at the very first after the kernel is loaded * by U-Boot. @@ -159,12 +145,13 @@ _C_LABEL(bootstrap_start): /* Set the Domain Access register. Very important! */ mov r0, #DOMAIN_CLIENT /* We only use domain 0 */ mcr CP15_DACR(r0) + isb /* Enable MMU */ mrc CP15_SCTLR(r0) orr r0, r0, #CPU_CONTROL_MMU_ENABLE mcr CP15_SCTLR(r0) - CPWAIT(r0) + isb /* Restore U-Boot arguments */ mov r0, r6 |