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authorDale Rahn <drahn@cvs.openbsd.org>2003-02-26 19:12:09 +0000
committerDale Rahn <drahn@cvs.openbsd.org>2003-02-26 19:12:09 +0000
commit507c7465b91aebf9ecb7aaa46b7e93917decf357 (patch)
tree137276222fdc4d73b32d72b8b745b57283b1054e /sys
parent276eec98a5321263913e82537f80c0fd69245bb2 (diff)
Volatile to prevent the optimizer from eliminating these, and fix the
argument order for mtspr.
Diffstat (limited to 'sys')
-rw-r--r--sys/arch/macppc/macppc/cpu.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/sys/arch/macppc/macppc/cpu.c b/sys/arch/macppc/macppc/cpu.c
index f125149359a..d53c778ad84 100644
--- a/sys/arch/macppc/macppc/cpu.c
+++ b/sys/arch/macppc/macppc/cpu.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu.c,v 1.10 2002/09/15 09:01:58 deraadt Exp $ */
+/* $OpenBSD: cpu.c,v 1.11 2003/02/26 19:12:08 drahn Exp $ */
/*
* Copyright (c) 1997 Per Fogelstrom
@@ -182,7 +182,7 @@ cpuattach(parent, dev, aux)
}
/* power savings mode */
- asm ("mfspr %0,1008" : "=r" (hid0));
+ __asm __volatile ("mfspr %0,1008" : "=r" (hid0));
switch (cpu) {
case MPC603:
case MPC603e:
@@ -196,7 +196,7 @@ cpuattach(parent, dev, aux)
hid0 &= ~(HID0_NAP | HID0_SLEEP);
hid0 |= HID0_DOZE | HID0_DPM;
}
- asm ("mtspr %0,1008" : "=r" (hid0));
+ __asm __volatile ("mtspr 1008,%0" : "=r" (hid0));
/* if processor is G3 or G4, configure l2 cache */
if ( (cpu == MPC750) || (cpu == MPC7400) || (cpu == IBM750FX)