diff options
| author | Kurt Miller <kurt@cvs.openbsd.org> | 2020-02-20 23:50:02 +0000 |
|---|---|---|
| committer | Kurt Miller <kurt@cvs.openbsd.org> | 2020-02-20 23:50:02 +0000 |
| commit | 5861ccd4fe3d35594d5a0da0c7bf0edf4625a629 (patch) | |
| tree | 282c122b2a1978928bb12d0692314250a059c279 /sys | |
| parent | 92e4994bc67d1f9fbf05c66e5ee08d54af092986 (diff) | |
Add a delay after link training to work-around a panic when first
accessing PCI config space on some cards. okay kettenis@
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/fdt/rkpcie.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/sys/dev/fdt/rkpcie.c b/sys/dev/fdt/rkpcie.c index 82ea307c324..37f2b4d1d85 100644 --- a/sys/dev/fdt/rkpcie.c +++ b/sys/dev/fdt/rkpcie.c @@ -1,4 +1,4 @@ -/* $OpenBSD: rkpcie.c,v 1.9 2019/12/14 17:42:48 kurt Exp $ */ +/* $OpenBSD: rkpcie.c,v 1.10 2020/02/20 23:50:01 kurt Exp $ */ /* * Copyright (c) 2018 Mark Kettenis <kettenis@openbsd.org> * @@ -307,6 +307,13 @@ rkpcie_attach(struct device *parent, struct device *self, void *aux) } } + /* + * XXX On at least the RockPro64, many cards will panic when first + * accessing PCIe config space during bus scanning. A delay after + * link training allows some of these cards to function. + */ + delay(2000000); + /* Initialize Root Complex registers. */ HWRITE4(sc, PCIE_LM_VENDOR_ID, PCI_VENDOR_ROCKCHIP); HWRITE4(sc, PCIE_RC_BASE + PCI_CLASS_REG, |