Add RK3308 pinctrl support

ok kettenis@

1 files changed, 153 insertions, 1 deletions

diff --git a/sys/dev/fdt/rkpinctrl.c b/sys/dev/fdt/rkpinctrl.c
index 82a4d18db01..6862f9b88e0 100644
--- a/sys/dev/fdt/rkpinctrl.c
+++ b/sys/dev/fdt/rkpinctrl.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: rkpinctrl.c,v 1.5 2018/02/25 13:26:44 kettenis Exp $	*/
+/*	$OpenBSD: rkpinctrl.c,v 1.6 2020/09/04 01:11:16 jmatthew Exp $	*/
 /*
  * Copyright (c) 2017, 2018 Mark Kettenis <kettenis@openbsd.org>
  *
@@ -39,6 +39,9 @@
 #define RK3288_GRF_GPIO1A_IOMUX		0x0000
 #define RK3288_PMUGRF_GPIO0A_IOMUX	0x0084
 
+/* RK3308 registers */
+#define RK3308_GRF_GPIO0A_IOMUX		0x0000
+
 /* RK3328 registers */
 #define RK3328_GRF_GPIO0A_IOMUX		0x0000
 
@@ -65,6 +68,7 @@ struct cfdriver rkpinctrl_cd = {
 };
 
 int	rk3288_pinctrl(uint32_t, void *);
+int	rk3308_pinctrl(uint32_t, void *);
 int	rk3328_pinctrl(uint32_t, void *);
 int	rk3399_pinctrl(uint32_t, void *);
 
@@ -74,6 +78,7 @@ rkpinctrl_match(struct device *parent, void *match, void *aux)
 	struct fdt_attach_args *faa = aux;
 
 	return (OF_is_compatible(faa->fa_node, "rockchip,rk3288-pinctrl") ||
+	    OF_is_compatible(faa->fa_node, "rockchip,rk3308-pinctrl") ||
 	    OF_is_compatible(faa->fa_node, "rockchip,rk3328-pinctrl") ||
 	    OF_is_compatible(faa->fa_node, "rockchip,rk3399-pinctrl"));
 }
@@ -97,6 +102,8 @@ rkpinctrl_attach(struct device *parent, struct device *self, void *aux)
 
 	if (OF_is_compatible(faa->fa_node, "rockchip,rk3288-pinctrl"))
 		pinctrl_register(faa->fa_node, rk3288_pinctrl, sc);
+	else if (OF_is_compatible(faa->fa_node, "rockchip,rk3308-pinctrl"))
+		pinctrl_register(faa->fa_node, rk3308_pinctrl, sc);
 	else if (OF_is_compatible(faa->fa_node, "rockchip,rk3328-pinctrl"))
 		pinctrl_register(faa->fa_node, rk3328_pinctrl, sc);
 	else
@@ -257,6 +264,151 @@ fail:
 }
 
 /*
+ * Rockchip RK3308
+ */
+
+int
+rk3308_pull(uint32_t bank, uint32_t idx, uint32_t phandle)
+{
+	int node;
+
+	node = OF_getnodebyphandle(phandle);
+	if (node == 0)
+		return -1;
+
+	if (OF_getproplen(node, "bias-disable") == 0)
+		return 0;
+	if (OF_getproplen(node, "bias-pull-up") == 0)
+		return 1;
+	if (OF_getproplen(node, "bias-pull-down") == 0)
+		return 2;
+
+	return -1;
+}
+
+int
+rk3308_strength(uint32_t bank, uint32_t idx, uint32_t phandle)
+{
+	int strength, level;
+	int levels[4] = { 2, 4, 8, 12 };
+	int node;
+
+	node = OF_getnodebyphandle(phandle);
+	if (node == 0)
+		return -1;
+
+	strength = OF_getpropint(node, "drive-strength", -1);
+	if (strength == -1)
+		return -1;
+
+	/* Convert drive strength to level. */
+	for (level = 3; level >= 0; level--) {
+		if (strength >= levels[level])
+			break;
+	}
+	return level;
+}
+
+int
+rk3308_pinctrl(uint32_t phandle, void *cookie)
+{
+	struct rkpinctrl_softc *sc = cookie;
+	uint32_t *pins;
+	int node, len, i;
+
+	KASSERT(sc->sc_grf);
+
+	node = OF_getnodebyphandle(phandle);
+	if (node == 0)
+		return -1;
+
+	len = OF_getproplen(node, "rockchip,pins");
+	if (len <= 0)
+		return -1;
+
+	pins = malloc(len, M_TEMP, M_WAITOK);
+	if (OF_getpropintarray(node, "rockchip,pins", pins, len) != len)
+		goto fail;
+
+	for (i = 0; i < len / sizeof(uint32_t); i += 4) {
+		struct regmap *rm = sc->sc_grf;
+		bus_size_t base, off;
+		uint32_t bank, idx, mux;
+		int pull, strength;
+		uint32_t mask, bits;
+		int s;
+
+		bank = pins[i];
+		idx = pins[i + 1];
+		mux = pins[i + 2];
+		pull = rk3308_pull(bank, idx, pins[i + 3]);
+		strength = rk3308_strength(bank, idx, pins[i + 3]);
+ 
+		if (bank > 4 || idx > 32 || mux > 7)
+			continue;
+
+		base = RK3308_GRF_GPIO0A_IOMUX;
+
+		s = splhigh();
+
+		/* IOMUX control */
+		off = bank * 0x20 + (idx / 8) * 0x08;
+
+		/* GPIO1B, GPIO1C and GPIO3B are special. */
+		if ((bank == 1) && (idx == 14)) {
+			mask = (0xf << 12);
+			bits = (mux << 12);
+		} else if ((bank == 1) && (idx == 15)) {
+			off += 4;
+			mask = 0x3;
+			bits = mux;
+		} else if ((bank == 1) && (idx >= 16 && idx <= 17)) {
+			mask = (0x3 << ((idx - 16) * 2));
+			bits = (mux << ((idx - 16) * 2));
+		} else if ((bank == 1) && (idx >= 18 && idx <= 20)) {
+			mask = (0xf << (((idx - 18) * 4) + 4));
+			bits = (mux << (((idx - 18) * 4) + 4));
+		} else if ((bank == 1) && (idx >= 21 && idx <= 23)) {
+			off += 4;
+			mask = (0xf << ((idx - 21) * 4));
+			bits = (mux << ((idx - 21) * 4));
+		} else if ((bank == 3) && (idx >= 12 && idx <= 13)) {
+			mask = (0xf << (((idx - 12) * 4) + 8));
+			bits = (mux << (((idx - 12) * 4) + 8));
+		} else {
+			mask = (0x3 << ((idx % 8) * 2));
+			bits = (mux << ((idx % 8) * 2));
+		}
+		regmap_write_4(rm, base + off, mask << 16 | bits);
+
+		/* GPIO pad pull down and pull up control */
+		if (pull >= 0) {
+			off = 0xa0 + bank * 0x10 + (idx / 8) * 0x04;
+			mask = (0x3 << ((idx % 8) * 2));
+			bits = (pull << ((idx % 8) * 2));
+			regmap_write_4(rm, base + off, mask << 16 | bits);
+		}
+
+		/* GPIO drive strength control */
+		if (strength >= 0) {
+			off = 0x100 + bank * 0x10 + (idx / 8) * 0x04;
+			mask = (0x3 << ((idx % 8) * 2));
+			bits = (strength << ((idx % 8) * 2));
+			regmap_write_4(rm, base + off, mask << 16 | bits);
+		}
+
+		splx(s);
+	}
+
+	free(pins, M_TEMP, len);
+	return 0;
+
+fail:
+	free(pins, M_TEMP, len);
+	return -1;
+}
+
+/*
  * Rockchip RK3328
  */