Allow for an out-of-softc indirection to reach the software copy of the

important (and write-only) register state; this will allow this driver to
be used as a console before it attaches, to be used shortly.

3 files changed, 80 insertions, 77 deletions

diff --git a/sys/arch/mvme88k/dev/dart.c b/sys/arch/mvme88k/dev/dart.c
index b2932132b8b..de64ab25596 100644
--- a/sys/arch/mvme88k/dev/dart.c
+++ b/sys/arch/mvme88k/dev/dart.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: dart.c,v 1.60 2013/06/11 21:06:31 miod Exp $	*/
+/*	$OpenBSD: dart.c,v 1.61 2013/09/21 20:05:01 miod Exp $	*/
 
 /*
  * Copyright (c) 2013 Miodrag Vallat.
@@ -170,6 +170,7 @@ dartattach(struct device *parent, struct device *self, void *aux)
 	 * an MVME188 and console is always on the first port.
 	 */
 	msc->sc_consport = CONS_PORT;
+	msc->sc_sw_reg = &msc->sc_sw_reg_store;
 
 	msc->sc_read = dart_read;
 	msc->sc_write = dart_write;
@@ -182,7 +183,7 @@ dartattach(struct device *parent, struct device *self, void *aux)
 	 */
 #ifdef MVME181
 	if (brdtyp == BRD_180 || brdtyp == BRD_181)
-		msc->sc_sw_reg.imr = DART_ISR_CT;
+		msc->sc_sw_reg->imr = DART_ISR_CT;
 #endif
 
 	/*
@@ -198,7 +199,7 @@ dartattach(struct device *parent, struct device *self, void *aux)
 	msc->sc_hw[A_PORT].dcd_active_low = 1;
 	msc->sc_hw[B_PORT].dcd_ip = 3;
 	msc->sc_hw[B_PORT].dcd_active_low = 1;
-	msc->sc_sw_reg.acr |=
+	msc->sc_sw_reg->acr |=
 	    DART_ACR_ISR_IP3_CHANGE_ENABLE | DART_ACR_ISR_IP2_CHANGE_ENABLE;
 
 	/*
@@ -226,13 +227,13 @@ dartattach(struct device *parent, struct device *self, void *aux)
 	msc->sc_hw[B_PORT].rts_op = 1;
 #ifdef MVME181
 	if (brdtyp == BRD_180)
-		msc->sc_sw_reg.oprs = 
+		msc->sc_sw_reg->oprs = 
 		    DART_OP_OP3 | DART_OP_OP2 | DART_OP_OP1 | DART_OP_OP0;
 	else
 #endif
-		msc->sc_sw_reg.oprs = 
+		msc->sc_sw_reg->oprs = 
 		    DART_OP_OP5 | DART_OP_OP2 | DART_OP_OP1 | DART_OP_OP0;
-	msc->sc_sw_reg.opcr = DART_OPCR_OP7 | DART_OPCR_OP6 |
+	msc->sc_sw_reg->opcr = DART_OPCR_OP7 | DART_OPCR_OP6 |
 	    DART_OPCR_OP5 | DART_OPCR_OP4 | DART_OPCR_OP3 | DART_OPCR_OP2;
 
 	/*
@@ -244,11 +245,11 @@ dartattach(struct device *parent, struct device *self, void *aux)
 	if (brdtyp == BRD_180 || brdtyp == BRD_181) {
 		extern int m181_clkint;	/* XXX */
 
-		msc->sc_sw_reg.acr = DART_ACR_CT_TIMER_CLK_16;
-		msc->sc_sw_reg.ct = &m181_clkint;
+		msc->sc_sw_reg->acr = DART_ACR_CT_TIMER_CLK_16;
+		msc->sc_sw_reg->ct = &m181_clkint;
 	} else
 #endif
-		msc->sc_sw_reg.acr = DART_ACR_CT_COUNTER_CLK_16;
+		msc->sc_sw_reg->acr = DART_ACR_CT_COUNTER_CLK_16;
 
 	mc68681_common_attach(msc);
 
@@ -269,7 +270,7 @@ dartintr(void *arg)
 	int rc;
 
 	isr = (*sc->sc_read)(sc, DART_ISR);
-	imr = sc->sc_sw_reg.imr;
+	imr = sc->sc_sw_reg->imr;
 
 	isr &= imr;
 	if (isr == 0)
@@ -349,7 +350,7 @@ dartcnputc(dev_t dev, int c)
 	s = spltty();
 
 	/* inhibit interrupts on the chip */
-	dart_write(sc, DART_IMR, sc->sc_base.sc_sw_reg.imr & ~DART_ISR_TXA);
+	dart_write(sc, DART_IMR, sc->sc_base.sc_sw_reg->imr & ~DART_ISR_TXA);
 	/* make sure transmitter is enabled */
 	dart_write(sc, DART_CRA, DART_CR_TX_ENABLE);
 
@@ -362,8 +363,8 @@ dartcnputc(dev_t dev, int c)
 		;
 
 	/* restore the previous state */
-	dart_write(sc, DART_IMR, sc->sc_base.sc_sw_reg.imr);
-	dart_write(sc, DART_CRA, sc->sc_base.sc_sw_reg.cr[0]);
+	dart_write(sc, DART_IMR, sc->sc_base.sc_sw_reg->imr);
+	dart_write(sc, DART_CRA, sc->sc_base.sc_sw_reg->cr[0]);
 
 	splx(s);
 }
diff --git a/sys/dev/ic/mc68681.c b/sys/dev/ic/mc68681.c
index a165d1e48fb..a02c8b2a692 100644
--- a/sys/dev/ic/mc68681.c
+++ b/sys/dev/ic/mc68681.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mc68681.c,v 1.1 2013/06/11 21:03:39 miod Exp $	*/
+/*	$OpenBSD: mc68681.c,v 1.2 2013/09/21 20:05:01 miod Exp $	*/
 
 /*
  * Copyright (c) 2013 Miodrag Vallat.
@@ -83,20 +83,20 @@ mc68681_common_attach(struct mc68681_softc *sc)
 	sc->sc_line[A_PORT].speed = sc->sc_line[B_PORT].speed =
 	    mc68681_speed(B9600);
 
-	sc->sc_sw_reg.mr1[A_PORT] = sc->sc_sw_reg.mr1[B_PORT] =
+	sc->sc_sw_reg->mr1[A_PORT] = sc->sc_sw_reg->mr1[B_PORT] =
 	    DART_MR1_RX_IRQ_RXRDY | DART_MR1_ERROR_CHAR |
 	    DART_MR1_PARITY_NONE | DART_MR1_RX_RTR | DART_MR1_BPC_8;
-	sc->sc_sw_reg.mr2[A_PORT] = sc->sc_sw_reg.mr2[B_PORT] =
+	sc->sc_sw_reg->mr2[A_PORT] = sc->sc_sw_reg->mr2[B_PORT] =
 	    DART_MR2_MODE_NORMAL | /* DART_MR2_TX_CTS | */ DART_MR2_STOP_1;
-	sc->sc_sw_reg.cr[A_PORT] = sc->sc_sw_reg.cr[B_PORT] =
+	sc->sc_sw_reg->cr[A_PORT] = sc->sc_sw_reg->cr[B_PORT] =
 	    DART_CR_TX_ENABLE | DART_CR_RX_ENABLE;
 
-	sc->sc_sw_reg.acr &= ~DART_ACR_BRG_SET_MASK;
-	sc->sc_sw_reg.acr |= DART_ACR_BRG_SET_2;
+	sc->sc_sw_reg->acr &= ~DART_ACR_BRG_SET_MASK;
+	sc->sc_sw_reg->acr |= DART_ACR_BRG_SET_2;
 
 	/* Start out with Tx and RX interrupts disabled, but enable input port
 	   change interrupt */
-	sc->sc_sw_reg.imr |= DART_ISR_IP_CHANGE;
+	sc->sc_sw_reg->imr |= DART_ISR_IP_CHANGE;
 
 	if (sc->sc_consport >= 0) {
 		printf(": console");
@@ -105,7 +105,7 @@ mc68681_common_attach(struct mc68681_softc *sc)
 
 	mc68681_set_acr(sc);
 
-	(*sc->sc_write)(sc, DART_IMR, sc->sc_sw_reg.imr);
+	(*sc->sc_write)(sc, DART_IMR, sc->sc_sw_reg->imr);
 
 	printf("\n");
 }
@@ -117,14 +117,14 @@ mc68681_set_acr(struct mc68681_softc *sc)
 {
 	uint8_t acr;
 
-	acr = sc->sc_sw_reg.acr;
+	acr = sc->sc_sw_reg->acr;
 	/*
 	 * If MD attachment configures a timer, ignore this until the timer
 	 * limit has been correctly set up. This allows this function to be
 	 * invoked at attach time, before cpu_initclocks() gets a chance to
 	 * run.
 	 */
-	if (ISSET(acr, DART_ACR_CT_TIMER_BIT) && *sc->sc_sw_reg.ct == 0)
+	if (ISSET(acr, DART_ACR_CT_TIMER_BIT) && *sc->sc_sw_reg->ct == 0)
 		acr = (acr & ~DART_ACR_CT_MASK) | DART_ACR_CT_COUNTER_CLK_16;
 
 	/* reset port a */
@@ -151,8 +151,8 @@ mc68681_set_acr(struct mc68681_softc *sc)
 	(*sc->sc_write)(sc, DART_CRB,
 	    DART_CR_RESET_MR1 /* | DART_CR_TX_DISABLE | DART_CR_RX_DISABLE */);
 
-	(*sc->sc_write)(sc, DART_OPRS, sc->sc_sw_reg.oprs);
-	(*sc->sc_write)(sc, DART_OPCR, sc->sc_sw_reg.opcr);
+	(*sc->sc_write)(sc, DART_OPRS, sc->sc_sw_reg->oprs);
+	(*sc->sc_write)(sc, DART_OPCR, sc->sc_sw_reg->opcr);
 
 	(*sc->sc_write)(sc, DART_ACR, acr);
 	/*
@@ -160,21 +160,21 @@ mc68681_set_acr(struct mc68681_softc *sc)
 	 * XXX This loses the current timer cycle.
 	 */
 	if (ISSET(acr, DART_ACR_CT_TIMER_BIT)) {
-		(*sc->sc_write)(sc, DART_CTUR, *sc->sc_sw_reg.ct >> 8);
-		(*sc->sc_write)(sc, DART_CTLR, *sc->sc_sw_reg.ct & 0xff);
+		(*sc->sc_write)(sc, DART_CTUR, *sc->sc_sw_reg->ct >> 8);
+		(*sc->sc_write)(sc, DART_CTLR, *sc->sc_sw_reg->ct & 0xff);
 		(*sc->sc_read)(sc, DART_CTSTART);
 	}
 
 	/* reinitialize ports */
-	(*sc->sc_write)(sc, DART_MRA, sc->sc_sw_reg.mr1[A_PORT]);
-	(*sc->sc_write)(sc, DART_MRA, sc->sc_sw_reg.mr2[A_PORT]);
+	(*sc->sc_write)(sc, DART_MRA, sc->sc_sw_reg->mr1[A_PORT]);
+	(*sc->sc_write)(sc, DART_MRA, sc->sc_sw_reg->mr2[A_PORT]);
 	(*sc->sc_write)(sc, DART_CSRA, sc->sc_line[A_PORT].speed->csr);
-	(*sc->sc_write)(sc, DART_CRA, sc->sc_sw_reg.cr[A_PORT]);
+	(*sc->sc_write)(sc, DART_CRA, sc->sc_sw_reg->cr[A_PORT]);
 
-	(*sc->sc_write)(sc, DART_MRB, sc->sc_sw_reg.mr1[B_PORT]);
-	(*sc->sc_write)(sc, DART_MRB, sc->sc_sw_reg.mr2[B_PORT]);
+	(*sc->sc_write)(sc, DART_MRB, sc->sc_sw_reg->mr1[B_PORT]);
+	(*sc->sc_write)(sc, DART_MRB, sc->sc_sw_reg->mr2[B_PORT]);
 	(*sc->sc_write)(sc, DART_CSRB, sc->sc_line[B_PORT].speed->csr);
-	(*sc->sc_write)(sc, DART_CRB, sc->sc_sw_reg.cr[B_PORT]);
+	(*sc->sc_write)(sc, DART_CRB, sc->sc_sw_reg->cr[B_PORT]);
 }
 
 /* speed table */
@@ -257,9 +257,9 @@ mc68681_start(struct tty *tp)
 				break;
 
 		if (tries == 0) {
-			if (!ISSET(sc->sc_sw_reg.imr, imrbit)) {
-				sc->sc_sw_reg.imr |= imrbit;
-				(*sc->sc_write)(sc, DART_IMR, sc->sc_sw_reg.imr);
+			if (!ISSET(sc->sc_sw_reg->imr, imrbit)) {
+				sc->sc_sw_reg->imr |= imrbit;
+				(*sc->sc_write)(sc, DART_IMR, sc->sc_sw_reg->imr);
 			}
 			goto bail;
 		}
@@ -437,10 +437,10 @@ mc68681_param(struct tty *tp, struct termios *t)
 	if (sc->sc_consport != port) {
 		/* disable Tx and Rx */
 		if (port == A_PORT)
-			sc->sc_sw_reg.imr &= ~(DART_ISR_TXA | DART_ISR_RXA);
+			sc->sc_sw_reg->imr &= ~(DART_ISR_TXA | DART_ISR_RXA);
 		else
-			sc->sc_sw_reg.imr &= ~(DART_ISR_TXB | DART_ISR_RXB);
-		(*sc->sc_write)(sc, DART_IMR, sc->sc_sw_reg.imr);
+			sc->sc_sw_reg->imr &= ~(DART_ISR_TXB | DART_ISR_RXB);
+		(*sc->sc_write)(sc, DART_IMR, sc->sc_sw_reg->imr);
 
 		acrupdate = 0;
 
@@ -459,7 +459,7 @@ mc68681_param(struct tty *tp, struct termios *t)
 			return EAGAIN;
 		line->speed = spd;
 		if (spd->brg_sets != (1 | 2)) {
-			acr = sc->sc_sw_reg.acr;
+			acr = sc->sc_sw_reg->acr;
 			switch (acr & DART_ACR_BRG_SET_MASK) {
 			case DART_ACR_BRG_SET_2:
 				if (spd->brg_sets == 1) {
@@ -474,8 +474,8 @@ mc68681_param(struct tty *tp, struct termios *t)
 				}
 				break;
 			}
-			if (acr != sc->sc_sw_reg.acr) {
-				sc->sc_sw_reg.acr = acr;
+			if (acr != sc->sc_sw_reg->acr) {
+				sc->sc_sw_reg->acr = acr;
 				acrupdate = 1;
 			}
 		}
@@ -483,9 +483,9 @@ mc68681_param(struct tty *tp, struct termios *t)
 			(*sc->sc_write)(sc, ptaddr + DART_CSRA, spd->csr);
 
 		/* get saved mode registers and clear set up parameters */
-		mr1 = sc->sc_sw_reg.mr1[port];
+		mr1 = sc->sc_sw_reg->mr1[port];
 		mr1 &= ~(DART_MR1_BPC_MASK | DART_MR1_PARITY_MASK);
-		mr2 = sc->sc_sw_reg.mr2[port];
+		mr2 = sc->sc_sw_reg->mr2[port];
 		mr2 &= ~DART_MR2_STOP_MASK;
 
 		/* set up character size */
@@ -528,8 +528,8 @@ mc68681_param(struct tty *tp, struct termios *t)
 		} else
 			mr1 |= DART_MR1_PARITY_NONE;
 
-		if (sc->sc_sw_reg.mr1[port] != mr1 ||
-		    sc->sc_sw_reg.mr2[port] != mr2) {
+		if (sc->sc_sw_reg->mr1[port] != mr1 ||
+		    sc->sc_sw_reg->mr2[port] != mr2) {
 			if (acrupdate == 0) {
 				/* write mode registers to duart */
 				(*sc->sc_write)(sc, ptaddr + DART_CRA,
@@ -539,8 +539,8 @@ mc68681_param(struct tty *tp, struct termios *t)
 			}
 
 			/* save changed mode registers */
-			sc->sc_sw_reg.mr1[port] = mr1;
-			sc->sc_sw_reg.mr2[port] = mr2;
+			sc->sc_sw_reg->mr1[port] = mr1;
+			sc->sc_sw_reg->mr2[port] = mr2;
 		}
 
 		if (acrupdate != 0) {
@@ -553,19 +553,19 @@ mc68681_param(struct tty *tp, struct termios *t)
 	/* enable transmitter? */
 	if (tp->t_state & TS_BUSY) {
 		if (port == A_PORT)
-			sc->sc_sw_reg.imr |= DART_ISR_TXA;
+			sc->sc_sw_reg->imr |= DART_ISR_TXA;
 		else
-			sc->sc_sw_reg.imr |= DART_ISR_TXB;
+			sc->sc_sw_reg->imr |= DART_ISR_TXB;
 		/* will be done below
-		(*sc->sc_write)(sc, DART_IMR, sc->sc_sw_reg.imr); */
+		(*sc->sc_write)(sc, DART_IMR, sc->sc_sw_reg->imr); */
 	}
 
 	/* re-enable the receiver */
 	if (port == A_PORT)
-		sc->sc_sw_reg.imr |= DART_ISR_RXA;
+		sc->sc_sw_reg->imr |= DART_ISR_RXA;
 	else
-		sc->sc_sw_reg.imr |= DART_ISR_RXB;
-	(*sc->sc_write)(sc, DART_IMR, sc->sc_sw_reg.imr);
+		sc->sc_sw_reg->imr |= DART_ISR_RXB;
+	(*sc->sc_write)(sc, DART_IMR, sc->sc_sw_reg->imr);
 
 	return 0;
 }
@@ -799,11 +799,11 @@ out:
 
 	/* disable transmitter */
 	if (port == A_PORT)
-		sc->sc_sw_reg.imr &= ~DART_ISR_TXA;
+		sc->sc_sw_reg->imr &= ~DART_ISR_TXA;
 	else
-		sc->sc_sw_reg.imr &= ~DART_ISR_TXB;
+		sc->sc_sw_reg->imr &= ~DART_ISR_TXB;
 
-	(*sc->sc_write)(sc, DART_IMR, sc->sc_sw_reg.imr);
+	(*sc->sc_write)(sc, DART_IMR, sc->sc_sw_reg->imr);
 }
 
 void
diff --git a/sys/dev/ic/mc68681var.h b/sys/dev/ic/mc68681var.h
index f0a18bfc253..fa259a00e8a 100644
--- a/sys/dev/ic/mc68681var.h
+++ b/sys/dev/ic/mc68681var.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mc68681var.h,v 1.1 2013/06/11 21:03:39 miod Exp $	*/
+/*	$OpenBSD: mc68681var.h,v 1.2 2013/09/21 20:05:01 miod Exp $	*/
 
 /*
  * Copyright (c) 2013 Miodrag Vallat.
@@ -23,9 +23,9 @@
 
 /* speed lookup table entry */
 struct mc68681_s {
-	int			speed;
-	uint8_t			brg_sets; /* bitmask of compatible sets */
-	uint8_t			csr;
+	int			 speed;
+	uint8_t			 brg_sets; /* bitmask of compatible sets */
+	uint8_t			 csr;
 };
 
 /* per-line state */
@@ -37,35 +37,37 @@ struct mc68681_line {
 
 /* per-line hardware configuration */
 struct mc68681_hw {
-	uint8_t			dtr_op;
-	uint8_t			rts_op;
-	uint8_t			dcd_ip;
-	uint8_t			dcd_active_low;
+	uint8_t			 dtr_op;
+	uint8_t			 rts_op;
+	uint8_t			 dcd_ip;
+	uint8_t			 dcd_active_low;
 };
 
 /* write-only chip registers values */
 struct mc68681_sw_reg {
-	uint8_t			mr1[N68681PORTS];
-	uint8_t			mr2[N68681PORTS];
-	uint8_t			cr[N68681PORTS];
-	uint8_t			acr;
-	uint8_t			imr;
-	uint8_t			oprs;
-	uint8_t			opcr;
+	uint8_t			 mr1[N68681PORTS];
+	uint8_t			 mr2[N68681PORTS];
+	uint8_t			 cr[N68681PORTS];
+	uint8_t			 acr;
+	uint8_t			 imr;
+	uint8_t			 oprs;
+	uint8_t			 opcr;
 	int			*ct;	/* timer limit in timer mode */
 };
 
 struct mc68681_softc {
-	struct device		sc_dev;
+	struct device		 sc_dev;
 
-	struct mc68681_sw_reg	sc_sw_reg;
-	struct mc68681_hw	sc_hw[N68681PORTS];
-	struct mc68681_line	sc_line[N68681PORTS];
+	struct mc68681_sw_reg	*sc_sw_reg;
+	struct mc68681_hw	 sc_hw[N68681PORTS];
+	struct mc68681_line	 sc_line[N68681PORTS];
 
-	int			sc_consport;
+	int			 sc_consport;
 
 	uint8_t			(*sc_read)(void *, uint);
 	void			(*sc_write)(void *, uint, uint8_t);
+
+	struct mc68681_sw_reg	 sc_sw_reg_store;
 };
 
 void	mc68681_common_attach(struct mc68681_softc *);