diff options
author | Brad Smith <brad@cvs.openbsd.org> | 2006-10-09 00:29:26 +0000 |
---|---|---|
committer | Brad Smith <brad@cvs.openbsd.org> | 2006-10-09 00:29:26 +0000 |
commit | 82e132f15b7549da81957414e86c01ba0d788fa2 (patch) | |
tree | ccd7f54bb8d11b419dbad834404c5630266bc3e4 /sys | |
parent | a01f0d53c2afe3ccd42269a6b93ca57ea5f2ac4c (diff) |
revert the last two changes. the changes were causing brgphy@gem to panic.
Diffstat (limited to 'sys')
-rw-r--r-- | sys/dev/mii/brgphy.c | 156 |
1 files changed, 65 insertions, 91 deletions
diff --git a/sys/dev/mii/brgphy.c b/sys/dev/mii/brgphy.c index f621f27c7ce..5cbe095d03a 100644 --- a/sys/dev/mii/brgphy.c +++ b/sys/dev/mii/brgphy.c @@ -1,4 +1,4 @@ -/* $OpenBSD: brgphy.c,v 1.56 2006/10/08 01:01:06 brad Exp $ */ +/* $OpenBSD: brgphy.c,v 1.57 2006/10/09 00:29:25 brad Exp $ */ /* * Copyright (c) 2000 @@ -85,14 +85,14 @@ void brgphy_status(struct mii_softc *); int brgphy_mii_phy_auto(struct mii_softc *); void brgphy_loop(struct mii_softc *); void brgphy_reset(struct mii_softc *); +void brgphy_load_dspcode(struct mii_softc *); void brgphy_bcm5401_dspcode(struct mii_softc *); void brgphy_bcm5411_dspcode(struct mii_softc *); void brgphy_bcm5421_dspcode(struct mii_softc *); void brgphy_bcm54k2_dspcode(struct mii_softc *); -void brgphy_adc_bug(struct mii_softc *); -void brgphy_5704_a0_bug(struct mii_softc *); -void brgphy_ber_bug(struct mii_softc *); -void brgphy_jitter_bug(struct mii_softc *); +void brgphy_bcm5703_dspcode(struct mii_softc *); +void brgphy_bcm5704_dspcode(struct mii_softc *); +void brgphy_bcm5750_dspcode(struct mii_softc *); const struct mii_phy_funcs brgphy_funcs = { brgphy_service, brgphy_status, brgphy_reset, @@ -153,16 +153,8 @@ brgphy_attach(struct device *parent, struct device *self, void *aux) struct mii_softc *sc = (struct mii_softc *)self; struct mii_attach_args *ma = aux; struct mii_data *mii = ma->mii_data; - struct bge_softc *bge_sc = NULL; - struct ifnet *ifp; const struct mii_phydesc *mpd; - ifp = sc->mii_pdata->mii_ifp; - - /* Find the driver associated with this PHY. */ - if (strcmp(ifp->if_xname, "bge") == 0) - bge_sc = ifp->if_softc; - mpd = mii_phy_match(ma, brgphys); printf(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)); @@ -334,14 +326,9 @@ setit: cmd == MII_MEDIACHG) { switch (sc->mii_model) { case MII_MODEL_BROADCOM_BCM5400: - brgphy_bcm5401_dspcode(sc); - break; case MII_MODEL_xxBROADCOM_BCM5401: - if (sc->mii_rev == 1 || sc->mii_rev == 3) - brgphy_bcm5401_dspcode(sc); - break; case MII_MODEL_xxBROADCOM_BCM5411: - brgphy_bcm5411_dspcode(sc); + brgphy_load_dspcode(sc); break; } } @@ -468,60 +455,25 @@ brgphy_reset(struct mii_softc *sc) else if (strcmp(ifp->if_xname, "bnx") == 0) bnx_sc = ifp->if_softc; - switch (sc->mii_model) { - case MII_MODEL_BROADCOM_BCM5400: - brgphy_bcm5401_dspcode(sc); - break; - case MII_MODEL_BROADCOM_BCM5401: - if (sc->mii_rev == 1 || sc->mii_rev == 3) - brgphy_bcm5401_dspcode(sc); - break; - case MII_MODEL_BROADCOM_BCM5411: - brgphy_bcm5411_dspcode(sc); - break; - case MII_MODEL_xxBROADCOM_BCM5421: - brgphy_bcm5421_dspcode(sc); - break; - case MII_MODEL_xxBROADCOM_BCM54K2: - brgphy_bcm54k2_dspcode(sc); - break; - } + brgphy_load_dspcode(sc); if (bge_sc) { - if (bge_sc->bge_flags & BGE_PHY_ADC_BUG) - brgphy_adc_bug(sc); - if (bge_sc->bge_flags & BGE_PHY_5704_A0_BUG) - brgphy_5704_a0_bug(sc); - if (bge_sc->bge_flags & BGE_PHY_BER_BUG) - brgphy_ber_bug(sc); - if (bge_sc->bge_flags & BGE_PHY_JITTER_BUG) - brgphy_jitter_bug(sc); - if (bge_sc->bge_flags & BGE_JUMBO_CAP) { - /* Set Jumbo frame settings in the PHY. */ - if (sc->mii_model == MII_MODEL_BROADCOM_BCM5401) { - /* Cannot do read-modify-write on the BCM5401 */ - PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x4c20); - } else { - PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7); - val = PHY_READ(sc, BRGPHY_MII_AUXCTL); - PHY_WRITE(sc, BRGPHY_MII_AUXCTL, - val & ~(BRGPHY_AUXCTL_LONG_PKT | 0x7)); - } - - val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL); - PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, - val & ~BRGPHY_PHY_EXTCTL_HIGH_LA); - } - /* - * Enable Ethernet@WireSpeed. + * Don't enable Ethernet@WireSpeed for the 5700 or 5705 + * other than A0 and A1 chips. Make sure we only do this + * test on "bge" NICs, since other drivers may use this + * same PHY subdriver. */ - if (!(bge_sc->bge_flags & BGE_NO_ETH_WIRE_SPEED)) { - PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007); - val = PHY_READ(sc, BRGPHY_MII_AUXCTL); - PHY_WRITE(sc, BRGPHY_MII_AUXCTL, - (val | (1 << 15) | (1 << 4))); - } + if (BGE_ASICREV(bge_sc->bge_chipid) == BGE_ASICREV_BCM5700 || + (BGE_ASICREV(bge_sc->bge_chipid) == BGE_ASICREV_BCM5705 && + (bge_sc->bge_chipid != BGE_CHIPID_BCM5705_A0 && + bge_sc->bge_chipid != BGE_CHIPID_BCM5705_A1))) + return; + + /* Enable Ethernet@WireSpeed. */ + PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007); + val = PHY_READ(sc, BRGPHY_MII_AUXCTL); + PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) | (1 << 4)); /* Enable Link LED on Dell boxes */ if (bge_sc->bge_flags & BGE_NO_3LED) { @@ -530,8 +482,6 @@ brgphy_reset(struct mii_softc *sc) & ~BRGPHY_PHY_EXTCTL_3_LED); } } else if (bnx_sc) { - brgphy_ber_bug(sc); - /* Set Jumbo frame settings in the PHY. */ PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7); val = PHY_READ(sc, BRGPHY_MII_AUXCTL); @@ -545,8 +495,7 @@ brgphy_reset(struct mii_softc *sc) /* Enable Ethernet@Wirespeed */ PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007); val = PHY_READ(sc, BRGPHY_MII_AUXCTL); - PHY_WRITE(sc, BRGPHY_MII_AUXCTL, - (val | (1 << 15) | (1 << 4))); + PHY_WRITE(sc, BRGPHY_MII_AUXCTL, (val | (1 << 15) | (1 << 4))); } } @@ -634,7 +583,7 @@ brgphy_bcm54k2_dspcode(struct mii_softc *sc) } void -brgphy_adc_bug(struct mii_softc *sc) +brgphy_bcm5703_dspcode(struct mii_softc *sc) { static const struct { int reg; @@ -655,12 +604,18 @@ brgphy_adc_bug(struct mii_softc *sc) } void -brgphy_5704_a0_bug(struct mii_softc *sc) +brgphy_bcm5704_dspcode(struct mii_softc *sc) { static const struct { int reg; uint16_t val; } dspcode[] = { + { BRGPHY_MII_AUXCTL, 0x0c00 }, + { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, + { BRGPHY_MII_DSP_RW_PORT, 0x2aaa }, + { BRGPHY_MII_DSP_ADDR_REG, 0x000a }, + { BRGPHY_MII_DSP_RW_PORT, 0x0323 }, + { BRGPHY_MII_AUXCTL, 0x0400 }, { 0x1c, 0x8d68 }, { 0x1c, 0x8d68 }, { 0, 0 }, @@ -672,7 +627,7 @@ brgphy_5704_a0_bug(struct mii_softc *sc) } void -brgphy_ber_bug(struct mii_softc *sc) +brgphy_bcm5750_dspcode(struct mii_softc *sc) { static const struct { int reg; @@ -695,20 +650,39 @@ brgphy_ber_bug(struct mii_softc *sc) } void -brgphy_jitter_bug(struct mii_softc *sc) +brgphy_load_dspcode(struct mii_softc *sc) { - static const struct { - int reg; - uint16_t val; - } dspcode[] = { - { BRGPHY_MII_AUXCTL, 0x0c00 }, - { BRGPHY_MII_DSP_ADDR_REG, 0x000a }, - { BRGPHY_MII_DSP_RW_PORT, 0x010b }, - { BRGPHY_MII_AUXCTL, 0x0400 }, - { 0, 0 }, - }; - int i; - - for (i = 0; dspcode[i].reg != 0; i++) - PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); + switch (sc->mii_model) { + case MII_MODEL_BROADCOM_BCM5400: + brgphy_bcm5401_dspcode(sc); + break; + case MII_MODEL_BROADCOM_BCM5401: + if (sc->mii_rev == 1 || sc->mii_rev == 3) + brgphy_bcm5401_dspcode(sc); + break; + case MII_MODEL_BROADCOM_BCM5411: + brgphy_bcm5411_dspcode(sc); + break; + case MII_MODEL_xxBROADCOM_BCM5421: + brgphy_bcm5421_dspcode(sc); + break; + case MII_MODEL_xxBROADCOM_BCM54K2: + brgphy_bcm54k2_dspcode(sc); + break; + case MII_MODEL_xxBROADCOM_BCM5703: + brgphy_bcm5703_dspcode(sc); + break; + case MII_MODEL_xxBROADCOM_BCM5704: + brgphy_bcm5704_dspcode(sc); + break; + case MII_MODEL_xxBROADCOM_BCM5705: + case MII_MODEL_xxBROADCOM_BCM5750: + case MII_MODEL_xxBROADCOM_BCM5714: + case MII_MODEL_xxBROADCOM_BCM5780: + case MII_MODEL_xxBROADCOM_BCM5752: + case MII_MODEL_xxBROADCOM_BCM5706C: + case MII_MODEL_xxBROADCOM_BCM5708C: + brgphy_bcm5750_dspcode(sc); + break; + } } |