diff options
| author | Damien Bergamini <damien@cvs.openbsd.org> | 2006-07-19 19:07:37 +0000 |
|---|---|---|
| committer | Damien Bergamini <damien@cvs.openbsd.org> | 2006-07-19 19:07:37 +0000 |
| commit | 90767ee89a4ef0aa3632eedc1f8140973cff8588 (patch) | |
| tree | 48953de4e52f5db089b50eb9af726f069d933f77 /sys | |
| parent | 7758b462f92e4cfafd4e26d6ea392428aaf57af2 (diff) | |
remove redundant #define
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/usb/if_rum.c | 4 | ||||
| -rw-r--r-- | sys/dev/usb/if_rumreg.h | 12 |
2 files changed, 3 insertions, 13 deletions
diff --git a/sys/dev/usb/if_rum.c b/sys/dev/usb/if_rum.c index 01c340ad246..371415bdd80 100644 --- a/sys/dev/usb/if_rum.c +++ b/sys/dev/usb/if_rum.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_rum.c,v 1.14 2006/07/18 21:24:40 damien Exp $ */ +/* $OpenBSD: if_rum.c,v 1.15 2006/07/19 19:07:36 damien Exp $ */ /*- * Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr> * Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org> @@ -1491,7 +1491,7 @@ rum_bbp_write(struct rum_softc *sc, uint8_t reg, uint8_t val) int ntries; for (ntries = 0; ntries < 5; ntries++) { - if (!(rum_read(sc, RT2573_PHY_CSR3_RT71) & RT2573_BBP_BUSY)) + if (!(rum_read(sc, RT2573_PHY_CSR3) & RT2573_BBP_BUSY)) break; } if (ntries == 5) { diff --git a/sys/dev/usb/if_rumreg.h b/sys/dev/usb/if_rumreg.h index 6e42414f33d..1896c5f26e3 100644 --- a/sys/dev/usb/if_rumreg.h +++ b/sys/dev/usb/if_rumreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_rumreg.h,v 1.4 2006/07/18 20:54:15 damien Exp $ */ +/* $OpenBSD: if_rumreg.h,v 1.5 2006/07/19 19:07:36 damien Exp $ */ /*- * Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr> * Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org> @@ -27,16 +27,6 @@ #define RT2573_READ_EEPROM 0x09 #define RT2573_WRITE_LED 0x0a -#define RT2573_PHY_CSR0_RT71 0x3080 /* RF/PS control */ -#define RT2573_PHY_CSR1_RT71 0x3084 -#define RT2573_PHY_CSR2_RT71 0x3088 /* BBP Pre-Tx control */ -#define RT2573_PHY_CSR3_RT71 0x308c /* BBP access */ -#define RT2573_PHY_CSR4_RT71 0x3090 /* RF serial control */ -#define RT2573_PHY_CSR5_RT71 0x3094 /* Rx to Tx signal switch timing */ -#define RT2573_PHY_CSR6_RT71 0x3098 /* Tx to Rx signal timing */ -#define RT2573_PHY_CSR7_RT71 0x309c /* Tx DAC switching timing */ - - #define RT2573_HOST_READY (1 << 2) #define RT2573_RESET_ASIC (1 << 0) #define RT2573_RESET_BBP (1 << 1) |