Rename round() to fpu_round(). This matches the m68k code from which this

code is derived and makes gcc4 happy by avoiding a conflict with the builtin
for the standard C99 round(3).

ok miod@

1 files changed, 10 insertions, 10 deletions

diff --git a/sys/arch/sparc/fpu/fpu_implode.c b/sys/arch/sparc/fpu/fpu_implode.c
index 6201e370088..21eb24435f5 100644
--- a/sys/arch/sparc/fpu/fpu_implode.c
+++ b/sys/arch/sparc/fpu/fpu_implode.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: fpu_implode.c,v 1.5 2003/06/02 23:27:54 millert Exp $	*/
+/*	$OpenBSD: fpu_implode.c,v 1.6 2010/05/09 20:47:49 kettenis Exp $	*/
 /*	$NetBSD: fpu_implode.c,v 1.3 1996/03/14 19:41:59 christos Exp $ */
 
 /*
@@ -57,7 +57,7 @@
 #include <sparc/fpu/fpu_emu.h>
 #include <sparc/fpu/fpu_extern.h>
 
-static int round(register struct fpemu *, register struct fpn *);
+static int fpu_round(register struct fpemu *, register struct fpn *);
 static int toinf(struct fpemu *, int);
 
 /*
@@ -73,7 +73,7 @@ static int toinf(struct fpemu *, int);
  * responsibility to fix this if necessary.
  */
 static int
-round(register struct fpemu *fe, register struct fpn *fp)
+fpu_round(register struct fpemu *fe, register struct fpn *fp)
 {
 	register u_int m0, m1, m2, m3;
 	register int gr, s;
@@ -212,7 +212,7 @@ fpu_ftoi(fe, fp)
 		 * into last mantissa word (this will not exceed 0xffffffff),
 		 * shifting any guard and round bits out into the sticky
 		 * bit.  Then ``round'' towards zero, i.e., just set an
-		 * inexact exception if sticky is set (see round()).
+		 * inexact exception if sticky is set (see fpu_round()).
 		 * If the result is > 0x80000000, or is positive and equals
 		 * 0x80000000, overflow; otherwise the last fraction word
 		 * is the result.
@@ -290,7 +290,7 @@ fpu_ftos(fe, fp)
 	if ((exp = fp->fp_exp + SNG_EXP_BIAS) <= 0) {	/* subnormal */
 		/* -NG for g,r; -SNG_FRACBITS-exp for fraction */
 		(void) fpu_shr(fp, FP_NMANT - FP_NG - SNG_FRACBITS - exp);
-		if (round(fe, fp) && fp->fp_mant[3] == SNG_EXP(1))
+		if (fpu_round(fe, fp) && fp->fp_mant[3] == SNG_EXP(1))
 			return (sign | SNG_EXP(1) | 0);
 		if ((fe->fe_cx & FSR_NX) ||
 		    (fe->fe_fsr & (FSR_UF << FSR_TEM_SHIFT)))
@@ -303,7 +303,7 @@ fpu_ftos(fe, fp)
 	if ((fp->fp_mant[3] & SNG_EXP(1 << FP_NG)) == 0)
 		panic("fpu_ftos");
 #endif
-	if (round(fe, fp) && fp->fp_mant[3] == SNG_EXP(2))
+	if (fpu_round(fe, fp) && fp->fp_mant[3] == SNG_EXP(2))
 		exp++;
 	if (exp >= SNG_EXP_INFNAN) {
 		/* overflow to inf or to max single */
@@ -351,7 +351,7 @@ zero:		res[1] = 0;
 
 	if ((exp = fp->fp_exp + DBL_EXP_BIAS) <= 0) {
 		(void) fpu_shr(fp, FP_NMANT - FP_NG - DBL_FRACBITS - exp);
-		if (round(fe, fp) && fp->fp_mant[2] == DBL_EXP(1)) {
+		if (fpu_round(fe, fp) && fp->fp_mant[2] == DBL_EXP(1)) {
 			res[1] = 0;
 			return (sign | DBL_EXP(1) | 0);
 		}
@@ -362,7 +362,7 @@ zero:		res[1] = 0;
 		goto done;
 	}
 	(void) fpu_shr(fp, FP_NMANT - FP_NG - 1 - DBL_FRACBITS);
-	if (round(fe, fp) && fp->fp_mant[2] == DBL_EXP(2))
+	if (fpu_round(fe, fp) && fp->fp_mant[2] == DBL_EXP(2))
 		exp++;
 	if (exp >= DBL_EXP_INFNAN) {
 		fe->fe_cx |= FSR_OF | FSR_NX;
@@ -412,7 +412,7 @@ zero:		res[1] = res[2] = res[3] = 0;
 
 	if ((exp = fp->fp_exp + EXT_EXP_BIAS) <= 0) {
 		(void) fpu_shr(fp, FP_NMANT - FP_NG - EXT_FRACBITS - exp);
-		if (round(fe, fp) && fp->fp_mant[0] == EXT_EXP(1)) {
+		if (fpu_round(fe, fp) && fp->fp_mant[0] == EXT_EXP(1)) {
 			res[1] = res[2] = res[3] = 0;
 			return (sign | EXT_EXP(1) | 0);
 		}
@@ -423,7 +423,7 @@ zero:		res[1] = res[2] = res[3] = 0;
 		goto done;
 	}
 	/* Since internal == extended, no need to shift here. */
-	if (round(fe, fp) && fp->fp_mant[0] == EXT_EXP(2))
+	if (fpu_round(fe, fp) && fp->fp_mant[0] == EXT_EXP(2))
 		exp++;
 	if (exp >= EXT_EXP_INFNAN) {
 		fe->fe_cx |= FSR_OF | FSR_NX;