Remove support for the XScale 80200. We don't use it, it didn't compile

and the included headers didn't even exist.

ok jsg@

6 files changed, 21 insertions, 105 deletions

diff --git a/sys/arch/arm/arm/cpu.c b/sys/arch/arm/arm/cpu.c
index dfce0c6e983..a3fe27172e8 100644
--- a/sys/arch/arm/arm/cpu.c
+++ b/sys/arch/arm/arm/cpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.c,v 1.26 2016/03/19 09:47:54 patrick Exp $	*/
+/*	$OpenBSD: cpu.c,v 1.27 2016/03/19 09:51:24 patrick Exp $	*/
 /*	$NetBSD: cpu.c,v 1.56 2004/04/14 04:01:49 bsh Exp $	*/
 
 
@@ -99,13 +99,6 @@ static const char * const generic_steppings[16] = {
 	"rev 12",	"rev 13",	"rev 14",	"rev 15"
 };
 
-static const char * const xscale_steppings[16] = {
-	"step A-0",	"step A-1",	"step B-0",	"step C-0",
-	"step D-0",	"rev 5",	"rev 6",	"rev 7",
-	"rev 8",	"rev 9",	"rev 10",	"rev 11",
-	"rev 12",	"rev 13",	"rev 14",	"rev 15"
-};
-
 static const char * const i80321_steppings[16] = {
 	"step A-0",	"step B-0",	"rev 2",	"rev 3",
 	"rev 4",	"rev 5",	"rev 6",	"rev 7",
@@ -168,9 +161,6 @@ const struct cpuidtab cpuids[] = {
 	{ CPU_ID_ARM1022ES,	CPU_CLASS_ARM10E,	"ARM1022E-S",
 	  generic_steppings },
 
-	{ CPU_ID_80200,		CPU_CLASS_XSCALE,	"i80200",
-	  xscale_steppings },
-
 	{ CPU_ID_80321_400,	CPU_CLASS_XSCALE,	"i80321 400MHz",
 	  i80321_steppings },
 	{ CPU_ID_80321_600,	CPU_CLASS_XSCALE,	"i80321 600MHz",
@@ -400,8 +390,7 @@ identify_arm_cpu(struct device *dv, struct cpu_info *ci)
 	case CPU_CLASS_ARMv7:
 #endif
 
-#if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
-    defined(CPU_XSCALE_PXA2X0)
+#if defined(CPU_XSCALE_80321) || defined(CPU_XSCALE_PXA2X0)
 	case CPU_CLASS_XSCALE:
 #endif
 		break;
diff --git a/sys/arch/arm/arm/cpufunc.c b/sys/arch/arm/arm/cpufunc.c
index eb388686d87..b301e1363a6 100644
--- a/sys/arch/arm/arm/cpufunc.c
+++ b/sys/arch/arm/arm/cpufunc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpufunc.c,v 1.32 2016/03/19 09:47:54 patrick Exp $	*/
+/*	$OpenBSD: cpufunc.c,v 1.33 2016/03/19 09:51:24 patrick Exp $	*/
 /*	$NetBSD: cpufunc.c,v 1.65 2003/11/05 12:53:15 scw Exp $	*/
 
 /*
@@ -56,17 +56,12 @@
 #include <arm/cpuconf.h>
 #include <arm/cpufunc.h>
 
-#ifdef CPU_XSCALE_80200
-#include <arm/xscale/i80200reg.h>
-#include <arm/xscale/i80200var.h>
-#endif
-
 #ifdef CPU_XSCALE_80321
 #include <arm/xscale/i80321reg.h>
 #include <arm/xscale/i80321var.h>
 #endif
 
-#if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321)
+#if defined(CPU_XSCALE_80321)
 #include <arm/xscale/xscalereg.h>
 #endif
 
@@ -322,8 +317,7 @@ struct cpu_functions armv7_cpufuncs = {
 };
 #endif /* CPU_ARMv7 */
 
-#if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
-    defined(CPU_XSCALE_PXA2X0)
+#if defined(CPU_XSCALE_80321) || defined(CPU_XSCALE_PXA2X0)
 struct cpu_functions xscale_cpufuncs = {
 	/* CPU functions */
 
@@ -379,7 +373,7 @@ struct cpu_functions xscale_cpufuncs = {
 	xscale_setup			/* cpu setup		*/
 };
 #endif
-/* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 */
+/* CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 */
 
 /*
  * Global constants also used by locore.s
@@ -390,8 +384,7 @@ u_int cputype;
 u_int cpu_reset_needs_v4_MMU_disable;	/* flag used in locore.s */
 
 #if defined(CPU_ARM9E) || defined(CPU_ARM10) || defined(CPU_ARM11) || \
-    defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
-    defined(CPU_XSCALE_PXA2X0)
+    defined(CPU_XSCALE_80321) || defined(CPU_XSCALE_PXA2X0)
 static void get_cachetype_cp15 (void);
 
 /* Additional cache information local to this file.  Log2 of some of the
@@ -708,65 +701,6 @@ set_cpufuncs()
 		return 0;
 	}
 #endif /* CPU_ARMv7 */
-#ifdef CPU_XSCALE_80200
-	if (cputype == CPU_ID_80200) {
-		int rev = cpufunc_id() & CPU_ID_REVISION_MASK;
-
-		i80200_icu_init();
-
-#ifdef PERFCTRS
-		/*
-		 * Reset the Performance Monitoring Unit to a
-		 * pristine state:
-		 *	- CCNT, PMN0, PMN1 reset to 0
-		 *	- overflow indications cleared
-		 *	- all counters disabled
-		 */
-		__asm volatile("mcr p14, 0, %0, c0, c0, 0"
-			:
-			: "r" (PMNC_P|PMNC_C|PMNC_PMN0_IF|PMNC_PMN1_IF|
-			       PMNC_CC_IF));
-#endif /* PERFCTRS */
-
-#if defined(XSCALE_CCLKCFG)
-		/*
-		 * Crank CCLKCFG to maximum legal value.
-		 */
-		__asm volatile ("mcr p14, 0, %0, c6, c0, 0"
-			:
-			: "r" (XSCALE_CCLKCFG));
-#endif
-
-		/*
-		 * XXX Disable ECC in the Bus Controller Unit; we
-		 * don't really support it, yet.  Clear any pending
-		 * error indications.
-		 */
-		__asm volatile("mcr p13, 0, %0, c0, c1, 0"
-			:
-			: "r" (BCUCTL_E0|BCUCTL_E1|BCUCTL_EV));
-
-		cpufuncs = xscale_cpufuncs;
-#if defined(PERFCTRS)
-		xscale_pmu_init();
-#endif
-
-		/*
-		 * i80200 errata: Step-A0 and A1 have a bug where
-		 * D$ dirty bits are not cleared on "invalidate by
-		 * address".
-		 *
-		 * Workaround: Clean cache line before invalidating.
-		 */
-		if (rev == 0 || rev == 1)
-			cpufuncs.cf_dcache_inv_range = xscale_cache_purgeD_rng;
-
-		cpu_reset_needs_v4_MMU_disable = 1;	/* XScale needs it */
-		get_cachetype_cp15();
-		pmap_pte_init_xscale();
-		return 0;
-	}
-#endif /* CPU_XSCALE_80200 */
 #ifdef CPU_XSCALE_80321
 	if (cputype == CPU_ID_80321_400 || cputype == CPU_ID_80321_600 ||
 	    cputype == CPU_ID_80321_400_B0 || cputype == CPU_ID_80321_600_B0 ||
@@ -944,8 +878,7 @@ armv7_setup()
 }
 #endif	/* CPU_ARMv7 */
 
-#if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
-    defined(CPU_XSCALE_PXA2X0)
+#if defined(CPU_XSCALE_80321) || defined(CPU_XSCALE_PXA2X0)
 void
 xscale_setup()
 {
@@ -996,4 +929,4 @@ xscale_setup()
 	__asm volatile("mcr p15, 0, %0, c1, c0, 1"
 		: : "r" (auxctl));
 }
-#endif	/* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 */
+#endif	/* CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 */
diff --git a/sys/arch/arm/conf/files.arm b/sys/arch/arm/conf/files.arm
index 191416d5a76..5258a0900b0 100644
--- a/sys/arch/arm/conf/files.arm
+++ b/sys/arch/arm/conf/files.arm
@@ -1,4 +1,4 @@
-#	$OpenBSD: files.arm,v 1.32 2016/03/19 09:47:54 patrick Exp $
+#	$OpenBSD: files.arm,v 1.33 2016/03/19 09:51:24 patrick Exp $
 #	$NetBSD: files.arm,v 1.76 2003/11/05 12:53:15 scw Exp $
 
 # generic networking files
@@ -41,14 +41,12 @@ file	arch/arm/arm/cpufunc.c
 file	arch/arm/arm/cpufunc_asm.S
 file	arch/arm/arm/cpufunc_asm_arm10.S	cpu_arm9e | cpu_arm10
 file	arch/arm/arm/cpufunc_asm_armv4.S	cpu_arm9e | cpu_arm10 |
-							cpu_xscale_80200 |
 							cpu_xscale_80321 |
 							cpu_xscale_pxa2x0
 file	arch/arm/arm/cpufunc_asm_armv5.S	cpu_arm10
 file	arch/arm/arm/cpufunc_asm_armv5_ec.S	cpu_arm9e | cpu_arm10
 file	arch/arm/arm/cpufunc_asm_armv7.S	cpu_armv7
-file	arch/arm/arm/cpufunc_asm_xscale.S	cpu_xscale_80200 |
-							cpu_xscale_80321 |
+file	arch/arm/arm/cpufunc_asm_xscale.S	cpu_xscale_80321 |
 							cpu_xscale_pxa2x0
 file	arch/arm/arm/process_machdep.c
 file	arch/arm/arm/sig_machdep.c
diff --git a/sys/arch/arm/include/armreg.h b/sys/arch/arm/include/armreg.h
index b7d4737b4cb..a6ae5c54436 100644
--- a/sys/arch/arm/include/armreg.h
+++ b/sys/arch/arm/include/armreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: armreg.h,v 1.23 2016/03/19 09:47:54 patrick Exp $	*/
+/*	$OpenBSD: armreg.h,v 1.24 2016/03/19 09:51:24 patrick Exp $	*/
 /*	$NetBSD: armreg.h,v 1.27 2003/09/06 08:43:02 rearnsha Exp $	*/
 
 /*
@@ -185,7 +185,6 @@
 #define CPU_ID_ARM1026EJS	0x4106a260
 #define CPU_ID_ARM1136JS	0x4107b360
 #define CPU_ID_ARM1136JSR1	0x4117b360
-#define CPU_ID_80200		0x69052000
 #define CPU_ID_PXA250		0x69052100 /* sans core revision */
 #define CPU_ID_PXA210		0x69052120
 #define CPU_ID_PXA250A		0x69052100 /* 1st version Core */
diff --git a/sys/arch/arm/include/cpuconf.h b/sys/arch/arm/include/cpuconf.h
index 75044538d2a..fa6f6635b47 100644
--- a/sys/arch/arm/include/cpuconf.h
+++ b/sys/arch/arm/include/cpuconf.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpuconf.h,v 1.12 2016/03/19 09:47:54 patrick Exp $	*/
+/*	$OpenBSD: cpuconf.h,v 1.13 2016/03/19 09:51:24 patrick Exp $	*/
 /*	$NetBSD: cpuconf.h,v 1.7 2003/05/23 00:57:24 ichiro Exp $	*/
 
 /*
@@ -49,8 +49,7 @@
  * Determine which ARM architecture versions are configured.
  */
 #if (defined(CPU_ARM9E) || defined(CPU_ARM10) || 			\
-     defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) ||		\
-     defined(CPU_XSCALE_PXA2X0))
+     defined(CPU_XSCALE_80321) || defined(CPU_XSCALE_PXA2X0))
 #define	ARM_ARCH_5	1
 #else
 #define	ARM_ARCH_5	0
@@ -87,8 +86,7 @@
 #define	ARM_MMU_GENERIC		0
 #endif
 
-#if (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) ||		\
-     defined(CPU_XSCALE_PXA2X0))
+#if (defined(CPU_XSCALE_80321) || defined(CPU_XSCALE_PXA2X0))
 #define	ARM_MMU_XSCALE		1
 #else
 #define	ARM_MMU_XSCALE		0
@@ -106,10 +104,10 @@
 /*
  * Define features that may be present on a subset of CPUs
  *
- *	ARM_XSCALE_PMU		Performance Monitoring Unit on 80200 and 80321
+ *	ARM_XSCALE_PMU		Performance Monitoring Unit on 80321
  */
 
-#if (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321))
+#if defined(CPU_XSCALE_80321)
 #define ARM_XSCALE_PMU	1
 #else
 #define ARM_XSCALE_PMU	0
diff --git a/sys/arch/arm/include/cpufunc.h b/sys/arch/arm/include/cpufunc.h
index e04875be67e..394a94a5a68 100644
--- a/sys/arch/arm/include/cpufunc.h
+++ b/sys/arch/arm/include/cpufunc.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpufunc.h,v 1.20 2016/03/19 09:47:54 patrick Exp $	*/
+/*	$OpenBSD: cpufunc.h,v 1.21 2016/03/19 09:51:24 patrick Exp $	*/
 /*	$NetBSD: cpufunc.h,v 1.29 2003/09/06 09:08:35 rearnsha Exp $	*/
 
 /*
@@ -315,8 +315,7 @@ extern unsigned armv7_dcache_index_inc;
 
 
 #if defined(CPU_ARM9E) || defined(CPU_ARM10) || \
-    defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
-    defined(CPU_XSCALE_PXA2X0)
+    defined(CPU_XSCALE_80321) || defined(CPU_XSCALE_PXA2X0)
 
 void	armv4_tlb_flushID	(void);
 void	armv4_tlb_flushI	(void);
@@ -326,7 +325,7 @@ void	armv4_tlb_flushD_SE	(u_int va);
 void	armv4_drain_writebuf	(void);
 #endif
 
-#if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
+#if defined(CPU_XSCALE_80321) || \
     defined(CPU_XSCALE_PXA2X0) || (ARM_MMU_XSCALE == 1)
 void	xscale_cpwait		(void);
 
@@ -365,7 +364,7 @@ void	xscale_cache_flushD_rng	(vaddr_t start, vsize_t end);
 void	xscale_context_switch	(u_int);
 
 void	xscale_setup		(void);
-#endif	/* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 */
+#endif	/* CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 */
 
 #define tlb_flush	cpu_tlb_flushID
 #define setttb		cpu_setttb