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authorMiod Vallat <miod@cvs.openbsd.org>2005-04-27 14:07:10 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2005-04-27 14:07:10 +0000
commitb0165a268dc55b71e91bb2ca4234eb68b71fcc94 (patch)
treee89b62fb6f4820ef1fe934432b0a95f157f9e6b6 /sys
parente65dc773b68687dfe71687364e2e666c7443fa8e (diff)
Move constants for dma_cachectl() to cmmu.h where they belong.
Diffstat (limited to 'sys')
-rw-r--r--sys/arch/m88k/include/cmmu.h11
-rw-r--r--sys/arch/m88k/include/mmu.h9
2 files changed, 10 insertions, 10 deletions
diff --git a/sys/arch/m88k/include/cmmu.h b/sys/arch/m88k/include/cmmu.h
index 39763849f21..38356352266 100644
--- a/sys/arch/m88k/include/cmmu.h
+++ b/sys/arch/m88k/include/cmmu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cmmu.h,v 1.6 2005/03/28 12:42:44 miod Exp $ */
+/* $OpenBSD: cmmu.h,v 1.7 2005/04/27 14:07:09 miod Exp $ */
/*
* Mach Operating System
* Copyright (c) 1993-1992 Carnegie Mellon University
@@ -38,7 +38,7 @@ extern int max_cpus;
/*
* This lock protects the cmmu SAR and SCR's; other ports
- * can be accessed without locking it
+ * can be accessed without locking it.
*
* May be used from "db_interface.c".
*/
@@ -92,6 +92,13 @@ extern struct cmmu_p *cmmu;
#define cmmu_show_translation(a, b, c, d) (cmmu->cmmu_show_translation_func)(a, b, c, d)
#define show_apr(ap) (cmmu->show_apr_func)(ap)
+/*
+ * dma_cachectl modes
+ */
+#define DMA_CACHE_SYNC 0
+#define DMA_CACHE_SYNC_INVAL 1
+#define DMA_CACHE_INV 2
+
#endif /* _KERNEL && !_LOCORE */
#endif /* _M88K_CMMU_H_ */
diff --git a/sys/arch/m88k/include/mmu.h b/sys/arch/m88k/include/mmu.h
index f4dae74386c..601f84ce81a 100644
--- a/sys/arch/m88k/include/mmu.h
+++ b/sys/arch/m88k/include/mmu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: mmu.h,v 1.2 2004/05/23 20:52:15 miod Exp $ */
+/* $OpenBSD: mmu.h,v 1.3 2005/04/27 14:07:09 miod Exp $ */
/*
* This file bears almost no resemblance to the original m68k file,
@@ -221,13 +221,6 @@ typedef u_int32_t pt_ind_entry_t;
#define M88K_BTOBLK(x) (x >> BATC_BLKSHIFT)
-/*
- * DMA and caching control
- */
-#define DMA_CACHE_SYNC 0x1
-#define DMA_CACHE_SYNC_INVAL 0x2
-#define DMA_CACHE_INV 0x3
-
static pt_entry_t invalidate_pte(pt_entry_t *);
static __inline__ pt_entry_t
invalidate_pte(pt_entry_t *pte)