diff options
author | Mike Frantzen <frantzen@cvs.openbsd.org> | 2002-04-08 01:47:34 +0000 |
---|---|---|
committer | Mike Frantzen <frantzen@cvs.openbsd.org> | 2002-04-08 01:47:34 +0000 |
commit | b4f2df93ae66d58a429d05de623338623798643b (patch) | |
tree | 1b107e942beab9b897872c882059c821430cd863 /sys | |
parent | e210d08481c52a891fa224fcda24646635a68cb6 (diff) |
Allegro-1 and Maestro 3 driver ported from netbsd
ok deraadt@
Diffstat (limited to 'sys')
-rw-r--r-- | sys/dev/microcode/esa/esadsp.h | 269 | ||||
-rw-r--r-- | sys/dev/pci/esa.c | 1735 | ||||
-rw-r--r-- | sys/dev/pci/esareg.h | 620 | ||||
-rw-r--r-- | sys/dev/pci/esavar.h | 138 |
4 files changed, 2762 insertions, 0 deletions
diff --git a/sys/dev/microcode/esa/esadsp.h b/sys/dev/microcode/esa/esadsp.h new file mode 100644 index 00000000000..d82adf30bc9 --- /dev/null +++ b/sys/dev/microcode/esa/esadsp.h @@ -0,0 +1,269 @@ +/* $OpenBSD: esadsp.h,v 1.1 2002/04/08 01:47:33 frantzen Exp $ */ +/* $NetBSD: esadsp.h,v 1.4 2002/01/07 07:33:09 jmcneill Exp $ */ + +/* + * Copyright (c) 2002 Lennart Augustsson + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * ESS Allegro-1 / Maestro3 Audio Driver + * + * Lots of magic based on the FreeBSD maestro3 driver and + * reverse engineering. + * Original driver by Don Kim. + * + */ + +u_int16_t esa_minisrc_lpf_image[] = { + 0x0743, 0x1104, 0x0a4c, 0xf88d, 0x242c, + 0x1023, 0x1aa9, 0x0b60, 0xefdd, 0x186f +}; + +#define ESA_ARB_VOLUME 0x6800 + +static struct play_vals { + u_int16_t addr, val; +} esa_playvals[] = { + { ESA_CDATA_LEFT_VOLUME, ESA_ARB_VOLUME}, + { ESA_CDATA_RIGHT_VOLUME, ESA_ARB_VOLUME}, + { ESA_SRC3_DIRECTION_OFFSET, 0} , + { ESA_SRC3_DIRECTION_OFFSET + 3, 0x0000}, + { ESA_SRC3_DIRECTION_OFFSET + 4, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 5, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 6, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 7, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 8, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 9, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 10, 0x8000}, + { ESA_SRC3_DIRECTION_OFFSET + 11, 0xFF00}, + { ESA_SRC3_DIRECTION_OFFSET + 13, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 14, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 15, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 16, 8}, + { ESA_SRC3_DIRECTION_OFFSET + 17, 50*2}, + { ESA_SRC3_DIRECTION_OFFSET + 18, ESA_MINISRC_BIQUAD_STAGE - 1}, + { ESA_SRC3_DIRECTION_OFFSET + 20, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 21, 0} +}; + +static struct rec_vals { + u_int16_t addr, val; +} esa_recvals[] = { + { ESA_CDATA_LEFT_VOLUME, ESA_ARB_VOLUME}, + { ESA_CDATA_RIGHT_VOLUME, ESA_ARB_VOLUME}, + { ESA_SRC3_DIRECTION_OFFSET, 1}, + { ESA_SRC3_DIRECTION_OFFSET + 3, 0x0000}, + { ESA_SRC3_DIRECTION_OFFSET + 4, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 5, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 6, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 7, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 8, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 9, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 10, 0x8000}, + { ESA_SRC3_DIRECTION_OFFSET + 11, 0xFF00}, + { ESA_SRC3_DIRECTION_OFFSET + 13, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 14, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 15, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 16, 50}, + { ESA_SRC3_DIRECTION_OFFSET + 17, 8}, + { ESA_SRC3_DIRECTION_OFFSET + 18, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 19, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 20, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 21, 0}, + { ESA_SRC3_DIRECTION_OFFSET + 22, 0xff} +}; + +static u_int32_t esa_assp_kernel_image[] = { + 0x7980, 0x0030, 0x7980, 0x03b4, 0x7980, 0x03b4, 0x7980, 0x00fb, + 0x7980, 0x00dd, 0x7980, 0x03b4, 0x7980, 0x0332, 0x7980, 0x0287, + 0x7980, 0x03b4, 0x7980, 0x03b4, 0x7980, 0x03b4, 0x7980, 0x03b4, + 0x7980, 0x031a, 0x7980, 0x03b4, 0x7980, 0x022f, 0x7980, 0x03b4, + 0x7980, 0x03b4, 0x7980, 0x03b4, 0x7980, 0x03b4, 0x7980, 0x03b4, + 0x7980, 0x0063, 0x7980, 0x006b, 0x7980, 0x03b4, 0x7980, 0x03b4, + 0xbf80, 0x2c7c, 0x8806, 0x8804, 0xbe40, 0xbc20, 0xae09, 0x1000, + 0xae0a, 0x0001, 0x6938, 0xeb08, 0x0053, 0x695a, 0xeb08, 0x00d6, + 0x0009, 0x8b88, 0x6980, 0xe388, 0x0036, 0xbe30, 0xbc20, 0x6909, + 0xb801, 0x9009, 0xbe41, 0xbe41, 0x6928, 0xeb88, 0x0078, 0xbe41, + 0xbe40, 0x7980, 0x0038, 0xbe41, 0xbe41, 0x903a, 0x6938, 0xe308, + 0x0056, 0x903a, 0xbe41, 0xbe40, 0xef00, 0x903a, 0x6939, 0xe308, + 0x005e, 0x903a, 0xef00, 0x690b, 0x660c, 0xef8c, 0x690a, 0x660c, + 0x620b, 0x6609, 0xef00, 0x6910, 0x660f, 0xef04, 0xe388, 0x0075, + 0x690e, 0x660f, 0x6210, 0x660d, 0xef00, 0x690e, 0x660d, 0xef00, + 0xae70, 0x0001, 0xbc20, 0xae27, 0x0001, 0x6939, 0xeb08, 0x005d, + 0x6926, 0xb801, 0x9026, 0x0026, 0x8b88, 0x6980, 0xe388, 0x00cb, + 0x9028, 0x0d28, 0x4211, 0xe100, 0x007a, 0x4711, 0xe100, 0x00a0, + 0x7a80, 0x0063, 0xb811, 0x660a, 0x6209, 0xe304, 0x007a, 0x0c0b, + 0x4005, 0x100a, 0xba01, 0x9012, 0x0c12, 0x4002, 0x7980, 0x00af, + 0x7a80, 0x006b, 0xbe02, 0x620e, 0x660d, 0xba10, 0xe344, 0x007a, + 0x0c10, 0x4005, 0x100e, 0xba01, 0x9012, 0x0c12, 0x4002, 0x1003, + 0xba02, 0x9012, 0x0c12, 0x4000, 0x1003, 0xe388, 0x00ba, 0x1004, + 0x7980, 0x00bc, 0x1004, 0xba01, 0x9012, 0x0c12, 0x4001, 0x0c05, + 0x4003, 0x0c06, 0x4004, 0x1011, 0xbfb0, 0x01ff, 0x9012, 0x0c12, + 0x4006, 0xbc20, 0xef00, 0xae26, 0x1028, 0x6970, 0xbfd0, 0x0001, + 0x9070, 0xe388, 0x007a, 0xae28, 0x0000, 0xef00, 0xae70, 0x0300, + 0x0c70, 0xb00c, 0xae5a, 0x0000, 0xef00, 0x7a80, 0x038a, 0x697f, + 0xb801, 0x907f, 0x0056, 0x8b88, 0x0ca0, 0xb008, 0xaf71, 0xb000, + 0x4e71, 0xe200, 0x00f3, 0xae56, 0x1057, 0x0056, 0x0ca0, 0xb008, + 0x8056, 0x7980, 0x03a1, 0x0810, 0xbfa0, 0x1059, 0xe304, 0x03a1, + 0x8056, 0x7980, 0x03a1, 0x7a80, 0x038a, 0xbf01, 0xbe43, 0xbe59, + 0x907c, 0x6937, 0xe388, 0x010d, 0xba01, 0xe308, 0x010c, 0xae71, + 0x0004, 0x0c71, 0x5000, 0x6936, 0x9037, 0xbf0a, 0x109e, 0x8b8a, + 0xaf80, 0x8014, 0x4c80, 0xbf0a, 0x0560, 0xf500, 0xbf0a, 0x0520, + 0xb900, 0xbb17, 0x90a0, 0x6917, 0xe388, 0x0148, 0x0d17, 0xe100, + 0x0127, 0xbf0c, 0x0578, 0xbf0d, 0x057c, 0x7980, 0x012b, 0xbf0c, + 0x0538, 0xbf0d, 0x053c, 0x6900, 0xe308, 0x0135, 0x8b8c, 0xbe59, + 0xbb07, 0x90a0, 0xbc20, 0x7980, 0x0157, 0x030c, 0x8b8b, 0xb903, + 0x8809, 0xbec6, 0x013e, 0x69ac, 0x90ab, 0x69ad, 0x90ab, 0x0813, + 0x660a, 0xe344, 0x0144, 0x0309, 0x830c, 0xbc20, 0x7980, 0x0157, + 0x6955, 0xe388, 0x0157, 0x7c38, 0xbf0b, 0x0578, 0xf500, 0xbf0b, + 0x0538, 0xb907, 0x8809, 0xbec6, 0x0156, 0x10ab, 0x90aa, 0x6974, + 0xe388, 0x0163, 0xae72, 0x0540, 0xf500, 0xae72, 0x0500, 0xae61, + 0x103b, 0x7a80, 0x02f6, 0x6978, 0xe388, 0x0182, 0x8b8c, 0xbf0c, + 0x0560, 0xe500, 0x7c40, 0x0814, 0xba20, 0x8812, 0x733d, 0x7a80, + 0x0380, 0x733e, 0x7a80, 0x0380, 0x8b8c, 0xbf0c, 0x056c, 0xe500, + 0x7c40, 0x0814, 0xba2c, 0x8812, 0x733f, 0x7a80, 0x0380, 0x7340, + 0x7a80, 0x0380, 0x6975, 0xe388, 0x018e, 0xae72, 0x0548, 0xf500, + 0xae72, 0x0508, 0xae61, 0x1041, 0x7a80, 0x02f6, 0x6979, 0xe388, + 0x01ad, 0x8b8c, 0xbf0c, 0x0560, 0xe500, 0x7c40, 0x0814, 0xba18, + 0x8812, 0x7343, 0x7a80, 0x0380, 0x7344, 0x7a80, 0x0380, 0x8b8c, + 0xbf0c, 0x056c, 0xe500, 0x7c40, 0x0814, 0xba24, 0x8812, 0x7345, + 0x7a80, 0x0380, 0x7346, 0x7a80, 0x0380, 0x6976, 0xe388, 0x01b9, + 0xae72, 0x0558, 0xf500, 0xae72, 0x0518, 0xae61, 0x1047, 0x7a80, + 0x02f6, 0x697a, 0xe388, 0x01d8, 0x8b8c, 0xbf0c, 0x0560, 0xe500, + 0x7c40, 0x0814, 0xba08, 0x8812, 0x7349, 0x7a80, 0x0380, 0x734a, + 0x7a80, 0x0380, 0x8b8c, 0xbf0c, 0x056c, 0xe500, 0x7c40, 0x0814, + 0xba14, 0x8812, 0x734b, 0x7a80, 0x0380, 0x734c, 0x7a80, 0x0380, + 0xbc21, 0xae1c, 0x1090, 0x8b8a, 0xbf0a, 0x0560, 0xe500, 0x7c40, + 0x0812, 0xb804, 0x8813, 0x8b8d, 0xbf0d, 0x056c, 0xe500, 0x7c40, + 0x0815, 0xb804, 0x8811, 0x7a80, 0x034a, 0x8b8a, 0xbf0a, 0x0560, + 0xe500, 0x7c40, 0x731f, 0xb903, 0x8809, 0xbec6, 0x01f9, 0x548a, + 0xbe03, 0x98a0, 0x7320, 0xb903, 0x8809, 0xbec6, 0x0201, 0x548a, + 0xbe03, 0x98a0, 0x1f20, 0x2f1f, 0x9826, 0xbc20, 0x6935, 0xe388, + 0x03a1, 0x6933, 0xb801, 0x9033, 0xbfa0, 0x02ee, 0xe308, 0x03a1, + 0x9033, 0xbf00, 0x6951, 0xe388, 0x021f, 0x7334, 0xbe80, 0x5760, + 0xbe03, 0x9f7e, 0xbe59, 0x9034, 0x697e, 0x0d51, 0x9013, 0xbc20, + 0x695c, 0xe388, 0x03a1, 0x735e, 0xbe80, 0x5760, 0xbe03, 0x9f7e, + 0xbe59, 0x905e, 0x697e, 0x0d5c, 0x9013, 0x7980, 0x03a1, 0x7a80, + 0x038a, 0xbf01, 0xbe43, 0x6977, 0xe388, 0x024e, 0xae61, 0x104d, + 0x0061, 0x8b88, 0x6980, 0xe388, 0x024e, 0x9071, 0x0d71, 0x000b, + 0xafa0, 0x8010, 0xafa0, 0x8010, 0x0810, 0x660a, 0xe308, 0x0249, + 0x0009, 0x0810, 0x660c, 0xe388, 0x024e, 0x800b, 0xbc20, 0x697b, + 0xe388, 0x03a1, 0xbf0a, 0x109e, 0x8b8a, 0xaf80, 0x8014, 0x4c80, + 0xe100, 0x0266, 0x697c, 0xbf90, 0x0560, 0x9072, 0x0372, 0x697c, + 0xbf90, 0x0564, 0x9073, 0x0473, 0x7980, 0x0270, 0x697c, 0xbf90, + 0x0520, 0x9072, 0x0372, 0x697c, 0xbf90, 0x0524, 0x9073, 0x0473, + 0x697c, 0xb801, 0x907c, 0xbf0a, 0x10fd, 0x8b8a, 0xaf80, 0x8010, + 0x734f, 0x548a, 0xbe03, 0x9880, 0xbc21, 0x7326, 0x548b, 0xbe03, + 0x618b, 0x988c, 0xbe03, 0x6180, 0x9880, 0x7980, 0x03a1, 0x7a80, + 0x038a, 0x0d28, 0x4711, 0xe100, 0x02be, 0xaf12, 0x4006, 0x6912, + 0xbfb0, 0x0c00, 0xe388, 0x02b6, 0xbfa0, 0x0800, 0xe388, 0x02b2, + 0x6912, 0xbfb0, 0x0c00, 0xbfa0, 0x0400, 0xe388, 0x02a3, 0x6909, + 0x900b, 0x7980, 0x02a5, 0xaf0b, 0x4005, 0x6901, 0x9005, 0x6902, + 0x9006, 0x4311, 0xe100, 0x02ed, 0x6911, 0xbfc0, 0x2000, 0x9011, + 0x7980, 0x02ed, 0x6909, 0x900b, 0x7980, 0x02b8, 0xaf0b, 0x4005, + 0xaf05, 0x4003, 0xaf06, 0x4004, 0x7980, 0x02ed, 0xaf12, 0x4006, + 0x6912, 0xbfb0, 0x0c00, 0xe388, 0x02e7, 0xbfa0, 0x0800, 0xe388, + 0x02e3, 0x6912, 0xbfb0, 0x0c00, 0xbfa0, 0x0400, 0xe388, 0x02d4, + 0x690d, 0x9010, 0x7980, 0x02d6, 0xaf10, 0x4005, 0x6901, 0x9005, + 0x6902, 0x9006, 0x4311, 0xe100, 0x02ed, 0x6911, 0xbfc0, 0x2000, + 0x9011, 0x7980, 0x02ed, 0x690d, 0x9010, 0x7980, 0x02e9, 0xaf10, + 0x4005, 0xaf05, 0x4003, 0xaf06, 0x4004, 0xbc20, 0x6970, 0x9071, + 0x7a80, 0x0078, 0x6971, 0x9070, 0x7980, 0x03a1, 0xbc20, 0x0361, + 0x8b8b, 0x6980, 0xef88, 0x0272, 0x0372, 0x7804, 0x9071, 0x0d71, + 0x8b8a, 0x000b, 0xb903, 0x8809, 0xbec6, 0x0309, 0x69a8, 0x90ab, + 0x69a8, 0x90aa, 0x0810, 0x660a, 0xe344, 0x030f, 0x0009, 0x0810, + 0x660c, 0xe388, 0x0314, 0x800b, 0xbc20, 0x6961, 0xb801, 0x9061, + 0x7980, 0x02f7, 0x7a80, 0x038a, 0x5d35, 0x0001, 0x6934, 0xb801, + 0x9034, 0xbf0a, 0x109e, 0x8b8a, 0xaf80, 0x8014, 0x4880, 0xae72, + 0x0550, 0xf500, 0xae72, 0x0510, 0xae61, 0x1051, 0x7a80, 0x02f6, + 0x7980, 0x03a1, 0x7a80, 0x038a, 0x5d35, 0x0002, 0x695e, 0xb801, + 0x905e, 0xbf0a, 0x109e, 0x8b8a, 0xaf80, 0x8014, 0x4780, 0xae72, + 0x0558, 0xf500, 0xae72, 0x0518, 0xae61, 0x105c, 0x7a80, 0x02f6, + 0x7980, 0x03a1, 0x001c, 0x8b88, 0x6980, 0xef88, 0x901d, 0x0d1d, + 0x100f, 0x6610, 0xe38c, 0x0358, 0x690e, 0x6610, 0x620f, 0x660d, + 0xba0f, 0xe301, 0x037a, 0x0410, 0x8b8a, 0xb903, 0x8809, 0xbec6, + 0x036c, 0x6a8c, 0x61aa, 0x98ab, 0x6a8c, 0x61ab, 0x98ad, 0x6a8c, + 0x61ad, 0x98a9, 0x6a8c, 0x61a9, 0x98aa, 0x7c04, 0x8b8b, 0x7c04, + 0x8b8d, 0x7c04, 0x8b89, 0x7c04, 0x0814, 0x660e, 0xe308, 0x0379, + 0x040d, 0x8410, 0xbc21, 0x691c, 0xb801, 0x901c, 0x7980, 0x034a, + 0xb903, 0x8809, 0x8b8a, 0xbec6, 0x0388, 0x54ac, 0xbe03, 0x618c, + 0x98aa, 0xef00, 0xbc20, 0xbe46, 0x0809, 0x906b, 0x080a, 0x906c, + 0x080b, 0x906d, 0x081a, 0x9062, 0x081b, 0x9063, 0x081e, 0x9064, + 0xbe59, 0x881e, 0x8065, 0x8166, 0x8267, 0x8368, 0x8469, 0x856a, + 0xef00, 0xbc20, 0x696b, 0x8809, 0x696c, 0x880a, 0x696d, 0x880b, + 0x6962, 0x881a, 0x6963, 0x881b, 0x6964, 0x881e, 0x0065, 0x0166, + 0x0267, 0x0368, 0x0469, 0x056a, 0xbe3a, +}; + +static u_int32_t esa_assp_minisrc_image[] = { + 0xbf80, 0x101e, 0x906e, + 0x006e, 0x8b88, 0x6980, 0xef88, 0x906f, 0x0d6f, 0x6900, 0xeb08, + 0x0412, 0xbc20, 0x696e, 0xb801, 0x906e, 0x7980, 0x0403, 0xb90e, + 0x8807, 0xbe43, 0xbf01, 0xbe47, 0xbe41, 0x7a80, 0x002a, 0xbe40, + 0x3029, 0xefcc, 0xbe41, 0x7a80, 0x0028, 0xbe40, 0x3028, 0xefcc, + 0x6907, 0xe308, 0x042a, 0x6909, 0x902c, 0x7980, 0x042c, 0x690d, + 0x902c, 0x1009, 0x881a, 0x100a, 0xba01, 0x881b, 0x100d, 0x881c, + 0x100e, 0xba01, 0x881d, 0xbf80, 0x00ed, 0x881e, 0x050c, 0x0124, + 0xb904, 0x9027, 0x6918, 0xe308, 0x04b3, 0x902d, 0x6913, 0xbfa0, + 0x7598, 0xf704, 0xae2d, 0x00ff, 0x8b8d, 0x6919, 0xe308, 0x0463, + 0x691a, 0xe308, 0x0456, 0xb907, 0x8809, 0xbec6, 0x0453, 0x10a9, + 0x90ad, 0x7980, 0x047c, 0xb903, 0x8809, 0xbec6, 0x0460, 0x1889, + 0x6c22, 0x90ad, 0x10a9, 0x6e23, 0x6c22, 0x90ad, 0x7980, 0x047c, + 0x101a, 0xe308, 0x046f, 0xb903, 0x8809, 0xbec6, 0x046c, 0x10a9, + 0x90a0, 0x90ad, 0x7980, 0x047c, 0xb901, 0x8809, 0xbec6, 0x047b, + 0x1889, 0x6c22, 0x90a0, 0x90ad, 0x10a9, 0x6e23, 0x6c22, 0x90a0, + 0x90ad, 0x692d, 0xe308, 0x049c, 0x0124, 0xb703, 0xb902, 0x8818, + 0x8b89, 0x022c, 0x108a, 0x7c04, 0x90a0, 0x692b, 0x881f, 0x7e80, + 0x055b, 0x692a, 0x8809, 0x8b89, 0x99a0, 0x108a, 0x90a0, 0x692b, + 0x881f, 0x7e80, 0x055b, 0x692a, 0x8809, 0x8b89, 0x99af, 0x7b99, + 0x0484, 0x0124, 0x060f, 0x101b, 0x2013, 0x901b, 0xbfa0, 0x7fff, + 0xe344, 0x04ac, 0x901b, 0x8b89, 0x7a80, 0x051a, 0x6927, 0xba01, + 0x9027, 0x7a80, 0x0523, 0x6927, 0xe308, 0x049e, 0x7980, 0x050f, + 0x0624, 0x1026, 0x2013, 0x9026, 0xbfa0, 0x7fff, 0xe304, 0x04c0, + 0x8b8d, 0x7a80, 0x051a, 0x7980, 0x04b4, 0x9026, 0x1013, 0x3026, + 0x901b, 0x8b8d, 0x7a80, 0x051a, 0x7a80, 0x0523, 0x1027, 0xba01, + 0x9027, 0xe308, 0x04b4, 0x0124, 0x060f, 0x8b89, 0x691a, 0xe308, + 0x04ea, 0x6919, 0xe388, 0x04e0, 0xb903, 0x8809, 0xbec6, 0x04dd, + 0x1fa0, 0x2fae, 0x98a9, 0x7980, 0x050f, 0xb901, 0x8818, 0xb907, + 0x8809, 0xbec6, 0x04e7, 0x10ee, 0x90a9, 0x7980, 0x050f, 0x6919, + 0xe308, 0x04fe, 0xb903, 0x8809, 0xbe46, 0xbec6, 0x04fa, 0x17a0, + 0xbe1e, 0x1fae, 0xbfbf, 0xff00, 0xbe13, 0xbfdf, 0x8080, 0x99a9, + 0xbe47, 0x7980, 0x050f, 0xb901, 0x8809, 0xbec6, 0x050e, 0x16a0, + 0x26a0, 0xbfb7, 0xff00, 0xbe1e, 0x1ea0, 0x2eae, 0xbfbf, 0xff00, + 0xbe13, 0xbfdf, 0x8080, 0x99a9, 0x850c, 0x860f, 0x6907, 0xe388, + 0x0516, 0x0d07, 0x8510, 0xbe59, 0x881e, 0xbe4a, 0xef00, 0x101e, + 0x901c, 0x101f, 0x901d, 0x10a0, 0x901e, 0x10a0, 0x901f, 0xef00, + 0x101e, 0x301c, 0x9020, 0x731b, 0x5420, 0xbe03, 0x9825, 0x1025, + 0x201c, 0x9025, 0x7325, 0x5414, 0xbe03, 0x8b8e, 0x9880, 0x692f, + 0xe388, 0x0539, 0xbe59, 0xbb07, 0x6180, 0x9880, 0x8ba0, 0x101f, + 0x301d, 0x9021, 0x731b, 0x5421, 0xbe03, 0x982e, 0x102e, 0x201d, + 0x902e, 0x732e, 0x5415, 0xbe03, 0x9880, 0x692f, 0xe388, 0x054f, + 0xbe59, 0xbb07, 0x6180, 0x9880, 0x8ba0, 0x6918, 0xef08, 0x7325, + 0x5416, 0xbe03, 0x98a0, 0x732e, 0x5417, 0xbe03, 0x98a0, 0xef00, + 0x8ba0, 0xbec6, 0x056b, 0xbe59, 0xbb04, 0xaa90, 0xbe04, 0xbe1e, + 0x99e0, 0x8be0, 0x69a0, 0x90d0, 0x69a0, 0x90d0, 0x081f, 0xb805, + 0x881f, 0x8b90, 0x69a0, 0x90d0, 0x69a0, 0x9090, 0x8bd0, 0x8bd8, + 0xbe1f, 0xef00, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 +}; diff --git a/sys/dev/pci/esa.c b/sys/dev/pci/esa.c new file mode 100644 index 00000000000..eee204db528 --- /dev/null +++ b/sys/dev/pci/esa.c @@ -0,0 +1,1735 @@ +/* $OpenBSD */ +/* $NetBSD: esa.c,v 1.12 2002/03/24 14:17:35 jmcneill Exp $ */ + +/* + * Copyright (c) 2001, 2002 Jared D. McNeill <jmcneill@invisible.ca> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Shamelessly stolen from NetBSD who based it on FreeBSD's who in turn + * based it on Linux's driver. What a wonderful world. + * + * + * ESS Allegro-1 / Maestro3 Audio Driver + * + * Based on the FreeBSD maestro3 driver and the NetBSD eap driver. + * Original driver by Don Kim. + * + * The list management code could possibly be written better, but what + * we have right now does the job nicely. Thanks to Zach Brown <zab@zabbo.net> + * and Andrew MacDonald <amac@epsilon.yi.org> for helping me debug the + * problems with the original list management code present in the Linux + * driver. + */ + +#include <sys/types.h> +#include <sys/errno.h> +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/malloc.h> +#include <sys/device.h> +#include <sys/conf.h> +#include <sys/exec.h> +#include <sys/select.h> +#include <sys/audioio.h> + +#include <machine/bus.h> +#include <machine/intr.h> + +#include <dev/pci/pcidevs.h> +#include <dev/pci/pcivar.h> + +#include <dev/audio_if.h> +#include <dev/mulaw.h> +#include <dev/auconv.h> +#include <dev/ic/ac97.h> + +#include <dev/pci/esareg.h> +#include <dev/pci/esavar.h> +#include <dev/microcode/esa/esadsp.h> + +#define PCI_CBIO 0x10 + +#define ESA_DAC_DATA 0x1100 + +enum { + ESS_ALLEGRO1, + ESS_MAESTRO3 +}; + +static struct esa_card_type { + u_int16_t pci_vendor_id; + u_int16_t pci_product_id; + int type; + int delay1, delay2; +} esa_card_types[] = { + { PCI_VENDOR_ESSTECH, PCI_PRODUCT_ESSTECH_ES1989, + ESS_ALLEGRO1, 50, 800 }, + { PCI_VENDOR_ESSTECH, PCI_PRODUCT_ESSTECH_MAESTRO3, + ESS_MAESTRO3, 20, 500 }, + { PCI_VENDOR_ESSTECH, PCI_PRODUCT_ESSTECH_MAESTRO3_2, + ESS_MAESTRO3, 20, 500 }, + { 0, 0, 0, 0, 0 } +}; + +struct audio_device esa_device = { + "ESS Allegro", + "", + "esa" +}; + +int esa_match(struct device *, void *, void *); +void esa_attach(struct device *, struct device *, void *); +int esa_detach(struct device *, int); + +/* audio(9) functions */ +int esa_open(void *, int); +void esa_close(void *); +int esa_query_encoding(void *, struct audio_encoding *); +int esa_set_params(void *, int, int, struct audio_params *, + struct audio_params *); +int esa_round_blocksize(void *, int); +int esa_commit_settings(void *); +int esa_halt_output(void *); +int esa_halt_input(void *); +int esa_set_port(void *, mixer_ctrl_t *); +int esa_get_port(void *, mixer_ctrl_t *); +int esa_query_devinfo(void *, mixer_devinfo_t *); +void * esa_malloc(void *, int, size_t, int, int); +void esa_free(void *, void *, int); +int esa_getdev(void *, struct audio_device *); +size_t esa_round_buffersize(void *, int, size_t); +int esa_get_props(void *); +int esa_trigger_output(void *, void *, void *, int, + void (*)(void *), void *, + struct audio_params *); +int esa_trigger_input(void *, void *, void *, int, + void (*)(void *), void *, + struct audio_params *); + +int esa_intr(void *); +int esa_allocmem(struct esa_softc *, size_t, size_t, + struct esa_dma *); +int esa_freemem(struct esa_softc *, struct esa_dma *); +paddr_t esa_mappage(void *addr, void *mem, off_t off, int prot); + +/* Supporting subroutines */ +u_int16_t esa_read_assp(struct esa_softc *, u_int16_t, u_int16_t); +void esa_write_assp(struct esa_softc *, u_int16_t, u_int16_t, + u_int16_t); +int esa_init_codec(struct esa_softc *); +int esa_attach_codec(void *, struct ac97_codec_if *); +int esa_read_codec(void *, u_int8_t, u_int16_t *); +int esa_write_codec(void *, u_int8_t, u_int16_t); +void esa_reset_codec(void *); +enum ac97_host_flags esa_flags_codec(void *); +int esa_wait(struct esa_softc *); +int esa_init(struct esa_softc *); +void esa_config(struct esa_softc *); +u_int8_t esa_assp_halt(struct esa_softc *); +void esa_codec_reset(struct esa_softc *); +int esa_amp_enable(struct esa_softc *); +void esa_enable_interrupts(struct esa_softc *); +u_int32_t esa_get_pointer(struct esa_softc *, struct esa_channel *); + +/* list management */ +int esa_add_list(struct esa_voice *, struct esa_list *, u_int16_t, + int); +void esa_remove_list(struct esa_voice *, struct esa_list *, int); + +/* power management */ +int esa_power(struct esa_softc *, int); +void esa_powerhook(int, void *); +int esa_suspend(struct esa_softc *); +int esa_resume(struct esa_softc *); + +static audio_encoding_t esa_encoding[] = { + { 0, AudioEulinear, AUDIO_ENCODING_ULINEAR, 8, 0 }, + { 1, AudioEmulaw, AUDIO_ENCODING_ULAW, 8, + AUDIO_ENCODINGFLAG_EMULATED }, + { 2, AudioEalaw, AUDIO_ENCODING_ALAW, 8, AUDIO_ENCODINGFLAG_EMULATED }, + { 3, AudioEslinear, AUDIO_ENCODING_SLINEAR, 8, + AUDIO_ENCODINGFLAG_EMULATED }, /* XXX: Are you sure? */ + { 4, AudioEslinear_le, AUDIO_ENCODING_SLINEAR_LE, 16, 0 }, + { 5, AudioEulinear_le, AUDIO_ENCODING_ULINEAR_LE, 16, + AUDIO_ENCODINGFLAG_EMULATED }, + { 6, AudioEslinear_be, AUDIO_ENCODING_SLINEAR_BE, 16, + AUDIO_ENCODINGFLAG_EMULATED }, + { 7, AudioEulinear_be, AUDIO_ENCODING_ULINEAR_BE, 16, + AUDIO_ENCODINGFLAG_EMULATED } +}; + +#define ESA_NENCODINGS 8 + +struct audio_hw_if esa_hw_if = { + esa_open, + esa_close, + NULL, /* drain */ + esa_query_encoding, + esa_set_params, + esa_round_blocksize, + esa_commit_settings, + NULL, /* init_output */ + NULL, /* init_input */ + NULL, /* start_output */ + NULL, /* start_input */ + esa_halt_output, + esa_halt_input, + NULL, /* speaker_ctl */ + esa_getdev, + NULL, /* getfd */ + esa_set_port, + esa_get_port, + esa_query_devinfo, + esa_malloc, + esa_free, + esa_round_buffersize, + esa_mappage, + esa_get_props, + esa_trigger_output, + esa_trigger_input +}; + +struct cfdriver esa_cd = { + NULL, "esa", DV_DULL +}; + +struct cfattach esa_ca = { + sizeof(struct esa_softc), esa_match, esa_attach, + esa_detach, /*esa_activate*/ NULL +}; + +/* + * audio(9) functions + */ + +int +esa_open(void *hdl, int flags) +{ + + return (0); +} + +void +esa_close(void *hdl) +{ + + return; +} + +int +esa_query_encoding(void *hdl, struct audio_encoding *ae) +{ + + if (ae->index < 0 || ae->index >= ESA_NENCODINGS) + return (EINVAL); + *ae = esa_encoding[ae->index]; + + return (0); +} + +int +esa_set_params(void *hdl, int setmode, int usemode, struct audio_params *play, + struct audio_params *rec) +{ + struct esa_voice *vc = hdl; + //struct esa_softc *sc = (struct esa_softc *)vc->parent; + struct esa_channel *ch; + struct audio_params *p; + int mode; + + for (mode = AUMODE_RECORD; mode != -1; + mode = (mode == AUMODE_RECORD) ? AUMODE_PLAY : -1) { + if ((setmode & mode) == 0) + continue; + + switch (mode) { + case AUMODE_PLAY: + p = play; + ch = &vc->play; + break; + case AUMODE_RECORD: + p = rec; + ch = &vc->rec; + break; + } + + if (p->sample_rate < ESA_MINRATE || + p->sample_rate > ESA_MAXRATE || + (p->precision != 8 && p->precision != 16) || + (p->channels < 1 && p->channels > 2)) + return (EINVAL); + + p->factor = 1; + p->sw_code = 0; + + switch(p->encoding) { + case AUDIO_ENCODING_SLINEAR_BE: + if (p->precision == 16) + p->sw_code = swap_bytes; + else + p->sw_code = change_sign8; + break; + case AUDIO_ENCODING_SLINEAR_LE: + if (p->precision != 16) + p->sw_code = change_sign8; + break; + case AUDIO_ENCODING_ULINEAR_BE: + if (p->precision == 16) { + if (mode == AUMODE_PLAY) + p->sw_code = + swap_bytes_change_sign16_le; + else + p->sw_code = + change_sign16_swap_bytes_le; + } + break; + case AUDIO_ENCODING_ULINEAR_LE: + if (p->precision == 16) + p->sw_code = change_sign16_le; + break; + case AUDIO_ENCODING_ULAW: + if (mode == AUMODE_PLAY) { + p->factor = 2; + p->sw_code = mulaw_to_slinear16_le; + } else + p->sw_code = ulinear8_to_mulaw; + break; + case AUDIO_ENCODING_ALAW: + if (mode == AUMODE_PLAY) { + p->factor = 2; + p->sw_code = alaw_to_slinear16_le; + } else + p->sw_code = ulinear8_to_alaw; + break; + default: + return (EINVAL); + } + + ch->mode = *p; + } + + return (0); +} + +int +esa_commit_settings(void *hdl) +{ + struct esa_voice *vc = hdl; + struct esa_softc *sc = (struct esa_softc *)vc->parent; + struct audio_params *p = &vc->play.mode; + struct audio_params *r = &vc->rec.mode; + u_int32_t data; + u_int32_t freq; + int data_bytes = (((ESA_MINISRC_TMP_BUFFER_SIZE & ~1) + + (ESA_MINISRC_IN_BUFFER_SIZE & ~1) + + (ESA_MINISRC_OUT_BUFFER_SIZE & ~1) + 4) + 255) + &~ 255; + + /* playback */ + vc->play.data_offset = ESA_DAC_DATA + (data_bytes * vc->index); + if (p->channels == 1) + data = 1; + else + data = 0; + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + vc->play.data_offset + ESA_SRC3_MODE_OFFSET, + data); + if (p->precision * p->factor == 8) + data = 1; + else + data = 0; + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + vc->play.data_offset + ESA_SRC3_WORD_LENGTH_OFFSET, + data); + if ((freq = ((p->sample_rate << 15) + 24000) / 48000) != 0) { + freq--; + } + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + vc->play.data_offset + ESA_CDATA_FREQUENCY, freq); + + /* recording */ + vc->rec.data_offset = ESA_DAC_DATA + (data_bytes * vc->index) + + (data_bytes / 2); + if (r->channels == 1) + data = 1; + else + data = 0; + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + vc->rec.data_offset + ESA_SRC3_MODE_OFFSET, + data); + if (r->precision * r->factor == 8) + data = 1; + else + data = 0; + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + vc->rec.data_offset + ESA_SRC3_WORD_LENGTH_OFFSET, + data); + if ((freq = ((r->sample_rate << 15) + 24000) / 48000) != 0) { + freq--; + } + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + vc->rec.data_offset + ESA_CDATA_FREQUENCY, freq); + + return (0); +}; + +int +esa_round_blocksize(void *hdl, int bs) +{ + struct esa_voice *vc = hdl; + + /* + * Surely there has to be a better solution... + */ + vc->play.blksize = vc->rec.blksize = 4096; + + return (vc->play.blksize); +} + +int +esa_halt_output(void *hdl) +{ + struct esa_voice *vc = hdl; + struct esa_softc *sc = (struct esa_softc *)vc->parent; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + u_int16_t data; + + if (vc->play.active == 0) + return (0); + + vc->play.active = 0; + + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_CDATA_INSTANCE_READY + vc->play.data_offset, 0); + + sc->sc_ntimers--; + if (sc->sc_ntimers == 0) { + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_TIMER_COUNT_RELOAD, 0); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_TIMER_COUNT_CURRENT, 0); + data = bus_space_read_2(iot, ioh, ESA_HOST_INT_CTRL); + bus_space_write_2(iot, ioh, ESA_HOST_INT_CTRL, + data & ~ESA_CLKRUN_GEN_ENABLE); + } + + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_MIXER_TASK_NUMBER, + sc->mixer_list.indexmap[vc->index]); + /* remove ourselves from the packed lists */ + esa_remove_list(vc, &sc->mixer_list, vc->index); + esa_remove_list(vc, &sc->dma_list, vc->index); + esa_remove_list(vc, &sc->msrc_list, vc->index); + + return (0); +} + +int +esa_halt_input(void *hdl) +{ + struct esa_voice *vc = hdl; + struct esa_softc *sc = (struct esa_softc *)vc->parent; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + u_int32_t data; + + if (vc->rec.active == 0) + return (0); + + vc->rec.active = 0; + + sc->sc_ntimers--; + if (sc->sc_ntimers == 0) { + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_TIMER_COUNT_RELOAD, 0); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_TIMER_COUNT_CURRENT, 0); + data = bus_space_read_2(iot, ioh, ESA_HOST_INT_CTRL); + bus_space_write_2(iot, ioh, ESA_HOST_INT_CTRL, + data & ~ESA_CLKRUN_GEN_ENABLE); + } + + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, vc->rec.data_offset + + ESA_CDATA_INSTANCE_READY, 0); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, ESA_KDATA_ADC1_REQUEST, + 0); + + /* remove ourselves from the packed lists */ + esa_remove_list(vc, &sc->adc1_list, vc->index + ESA_NUM_VOICES); + esa_remove_list(vc, &sc->dma_list, vc->index + ESA_NUM_VOICES); + esa_remove_list(vc, &sc->msrc_list, vc->index + ESA_NUM_VOICES); + + return (0); +} + +void * +esa_malloc(void *hdl, int direction, size_t size, int type, int flags) +{ + struct esa_voice *vc = hdl; + struct esa_softc *sc = (struct esa_softc *)vc->parent; + struct esa_dma *p; + int error; + + p = malloc(sizeof(*p), type, flags); + if (!p) + return (0); + error = esa_allocmem(sc, size, 16, p); + if (error) { + free(p, type); + printf("%s: esa_malloc: not enough memory\n", + sc->sc_dev.dv_xname); + return (0); + } + p->next = vc->dma; + vc->dma = p; + + return (KERNADDR(p)); +} + +void +esa_free(void *hdl, void *addr, int type) +{ + struct esa_voice *vc = hdl; + struct esa_softc *sc = (struct esa_softc *)vc->parent; + struct esa_dma *p; + struct esa_dma **pp; + + for (pp = &vc->dma; (p = *pp) != NULL; pp = &p->next) + if (KERNADDR(p) == addr) { + esa_freemem(sc, p); + *pp = p->next; + free(p, type); + return; + } +} + +int +esa_getdev(void *hdl, struct audio_device *ret) +{ + + *ret = esa_device; + + return (0); +} + +int +esa_set_port(void *hdl, mixer_ctrl_t *mc) +{ + struct esa_voice *vc = hdl; + struct esa_softc *sc = (struct esa_softc *)vc->parent; + + return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, mc)); +} + +int +esa_get_port(void *hdl, mixer_ctrl_t *mc) +{ + struct esa_voice *vc = hdl; + struct esa_softc *sc = (struct esa_softc *)vc->parent; + + return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, mc)); +} + +int +esa_query_devinfo(void *hdl, mixer_devinfo_t *di) +{ + struct esa_voice *vc = hdl; + struct esa_softc *sc = (struct esa_softc *)vc->parent; + + return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, di)); +} + +size_t +esa_round_buffersize(void *hdl, int direction, size_t bufsize) +{ + struct esa_voice *vc = hdl; + + /* + * We must be able to do better than this... + */ + vc->play.bufsize = vc->rec.bufsize = 65536; + + return (vc->play.bufsize); +} + +int +esa_get_props(void *hdl) +{ + + return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX); +} + +int +esa_trigger_output(void *hdl, void *start, void *end, int blksize, + void (*intr)(void *), void *intrarg, + struct audio_params *param) +{ + struct esa_voice *vc = hdl; + struct esa_softc *sc = (struct esa_softc *)vc->parent; + struct esa_dma *p; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + u_int32_t data; + u_int32_t bufaddr; + u_int32_t i; + size_t size; + + int data_bytes = (((ESA_MINISRC_TMP_BUFFER_SIZE & ~1) + + (ESA_MINISRC_IN_BUFFER_SIZE & ~1) + + (ESA_MINISRC_OUT_BUFFER_SIZE & ~1) + 4) + 255) + &~ 255; + int dac_data = ESA_DAC_DATA + (data_bytes * vc->index); + int dsp_in_size = ESA_MINISRC_IN_BUFFER_SIZE - (0x20 * 2); + int dsp_out_size = ESA_MINISRC_OUT_BUFFER_SIZE - (0x20 * 2); + int dsp_in_buf = dac_data + (ESA_MINISRC_TMP_BUFFER_SIZE / 2); + int dsp_out_buf = dsp_in_buf + (dsp_in_size / 2) + 1; + + if (vc->play.active) + return (EINVAL); + + for (p = vc->dma; p && KERNADDR(p) != start; p = p->next) + ; + if (!p) { + printf("%s: esa_trigger_output: bad addr %p\n", + sc->sc_dev.dv_xname, start); + return (EINVAL); + } + + vc->play.active = 1; + vc->play.intr = intr; + vc->play.arg = intrarg; + vc->play.pos = 0; + vc->play.count = 0; + vc->play.buf = start; + size = (size_t)(((caddr_t)end - (caddr_t)start)); + bufaddr = DMAADDR(p); + vc->play.start = bufaddr; + +#define LO(x) ((x) & 0x0000ffff) +#define HI(x) ((x) >> 16) + + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_HOST_SRC_ADDRL, LO(bufaddr)); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_HOST_SRC_ADDRH, HI(bufaddr)); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_HOST_SRC_END_PLUS_1L, LO(bufaddr + size)); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_HOST_SRC_END_PLUS_1H, HI(bufaddr + size)); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_HOST_SRC_CURRENTL, LO(bufaddr)); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_HOST_SRC_CURRENTH, HI(bufaddr)); + + /* DSP buffers */ + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_IN_BUF_BEGIN, dsp_in_buf); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_IN_BUF_END_PLUS_1, dsp_in_buf + (dsp_in_size / 2)); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_IN_BUF_HEAD, dsp_in_buf); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_IN_BUF_TAIL, dsp_in_buf); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_OUT_BUF_BEGIN, dsp_out_buf); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_OUT_BUF_END_PLUS_1, dsp_out_buf + (dsp_out_size / 2)); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_OUT_BUF_HEAD, dsp_out_buf); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_OUT_BUF_TAIL, dsp_out_buf); + + /* Some per-client initializers */ + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_SRC3_DIRECTION_OFFSET + 12, dac_data + 40 + 8); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_SRC3_DIRECTION_OFFSET + 19, 0x400 + ESA_MINISRC_COEF_LOC); + /* Enable or disable low-pass filter? (0xff if rate > 45000) */ + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_SRC3_DIRECTION_OFFSET + 22, + vc->play.mode.sample_rate > 45000 ? 0xff : 0); + /* Tell it which way DMA is going */ + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_DMA_CONTROL, + ESA_DMACONTROL_AUTOREPEAT + ESA_DMAC_PAGE3_SELECTOR + + ESA_DMAC_BLOCKF_SELECTOR); + + /* Set an armload of static initializers */ + for (i = 0; i < (sizeof(esa_playvals) / sizeof(esa_playvals[0])); i++) + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + esa_playvals[i].addr, esa_playvals[i].val); + + /* Put us in the packed task lists */ + esa_add_list(vc, &sc->msrc_list, dac_data >> ESA_DP_SHIFT_COUNT, + vc->index); + esa_add_list(vc, &sc->dma_list, dac_data >> ESA_DP_SHIFT_COUNT, + vc->index); + esa_add_list(vc, &sc->mixer_list, dac_data >> ESA_DP_SHIFT_COUNT, + vc->index); +#undef LO +#undef HI + + /* XXX */ + //esa_commit_settings(vc); + + sc->sc_ntimers++; + + if (sc->sc_ntimers == 1) { + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_TIMER_COUNT_RELOAD, 240); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_TIMER_COUNT_CURRENT, 240); + data = bus_space_read_2(iot, ioh, ESA_HOST_INT_CTRL); + bus_space_write_2(iot, ioh, ESA_HOST_INT_CTRL, + data | ESA_CLKRUN_GEN_ENABLE); + } + + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data + + ESA_CDATA_INSTANCE_READY, 1); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_MIXER_TASK_NUMBER, + sc->mixer_list.indexmap[vc->index]); + + return (0); +} + +int +esa_trigger_input(void *hdl, void *start, void *end, int blksize, + void (*intr)(void *), void *intrarg, + struct audio_params *param) +{ + struct esa_voice *vc = hdl; + struct esa_softc *sc = (struct esa_softc *)vc->parent; + struct esa_dma *p; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + u_int32_t data; + u_int32_t bufaddr; + u_int32_t i; + size_t size; + int data_bytes = (((ESA_MINISRC_TMP_BUFFER_SIZE & ~1) + + (ESA_MINISRC_IN_BUFFER_SIZE & ~1) + + (ESA_MINISRC_OUT_BUFFER_SIZE & ~1) + 4) + 255) + &~ 255; + int adc_data = ESA_DAC_DATA + (data_bytes * vc->index) + + (data_bytes / 2); + int dsp_in_size = ESA_MINISRC_IN_BUFFER_SIZE - (0x10 * 2); + int dsp_out_size = ESA_MINISRC_OUT_BUFFER_SIZE - (0x10 * 2); + int dsp_in_buf = adc_data + (ESA_MINISRC_TMP_BUFFER_SIZE / 2); + int dsp_out_buf = dsp_in_buf + (dsp_in_size / 2) + 1; + vc->rec.data_offset = adc_data; + + /* We only support 1 recording channel */ + if (vc->index > 0) + return (ENODEV); + + if (vc->rec.active) + return (EINVAL); + + for (p = vc->dma; p && KERNADDR(p) != start; p = p->next) + ; + if (!p) { + printf("%s: esa_trigger_input: bad addr %p\n", + sc->sc_dev.dv_xname, start); + return (EINVAL); + } + + vc->rec.active = 1; + vc->rec.intr = intr; + vc->rec.arg = intrarg; + vc->rec.pos = 0; + vc->rec.count = 0; + vc->rec.buf = start; + size = (size_t)(((caddr_t)end - (caddr_t)start)); + bufaddr = DMAADDR(p); + vc->rec.start = bufaddr; + +#define LO(x) ((x) & 0x0000ffff) +#define HI(x) ((x) >> 16) + + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_HOST_SRC_ADDRL, LO(bufaddr)); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_HOST_SRC_ADDRH, HI(bufaddr)); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_HOST_SRC_END_PLUS_1L, LO(bufaddr + size)); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_HOST_SRC_END_PLUS_1H, HI(bufaddr + size)); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_HOST_SRC_CURRENTL, LO(bufaddr)); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_HOST_SRC_CURRENTH, HI(bufaddr)); + + /* DSP buffers */ + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_IN_BUF_BEGIN, dsp_in_buf); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_IN_BUF_END_PLUS_1, dsp_in_buf + (dsp_in_size / 2)); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_IN_BUF_HEAD, dsp_in_buf); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_IN_BUF_TAIL, dsp_in_buf); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_OUT_BUF_BEGIN, dsp_out_buf); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_OUT_BUF_END_PLUS_1, dsp_out_buf + (dsp_out_size / 2)); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_OUT_BUF_HEAD, dsp_out_buf); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_OUT_BUF_TAIL, dsp_out_buf); + + /* Some per-client initializers */ + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_SRC3_DIRECTION_OFFSET + 12, adc_data + 40 + 8); + /* Tell it which way DMA is going */ + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_DMA_CONTROL, + ESA_DMACONTROL_DIRECTION + ESA_DMACONTROL_AUTOREPEAT + + ESA_DMAC_PAGE3_SELECTOR + ESA_DMAC_BLOCKF_SELECTOR); + + /* Set an armload of static initializers */ + for (i = 0; i < (sizeof(esa_recvals) / sizeof(esa_recvals[0])); i++) + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + esa_recvals[i].addr, esa_recvals[i].val); + + /* Put us in the packed task lists */ + esa_add_list(vc, &sc->adc1_list, adc_data >> ESA_DP_SHIFT_COUNT, + vc->index + ESA_NUM_VOICES); + esa_add_list(vc, &sc->msrc_list, adc_data >> ESA_DP_SHIFT_COUNT, + vc->index + ESA_NUM_VOICES); + esa_add_list(vc, &sc->dma_list, adc_data >> ESA_DP_SHIFT_COUNT, + vc->index + ESA_NUM_VOICES); +#undef LO +#undef HI + + /* XXX */ + //esa_commit_settings(vc); + + sc->sc_ntimers++; + if (sc->sc_ntimers == 1) { + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_TIMER_COUNT_RELOAD, 240); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_TIMER_COUNT_CURRENT, 240); + data = bus_space_read_2(iot, ioh, ESA_HOST_INT_CTRL); + bus_space_write_2(iot, ioh, ESA_HOST_INT_CTRL, + data | ESA_CLKRUN_GEN_ENABLE); + } + + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data + + ESA_CDATA_INSTANCE_READY, 1); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, ESA_KDATA_ADC1_REQUEST, + 1); + + return (0); +} + +/* Interrupt handler */ + +int +esa_intr(void *hdl) +{ + struct esa_softc *sc = hdl; + struct esa_voice *vc; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + u_int8_t status, ctl; + u_int32_t pos; + u_int32_t diff; + u_int32_t play_blksize, play_bufsize; + u_int32_t rec_blksize, rec_bufsize; + int i; + + status = bus_space_read_1(iot, ioh, ESA_HOST_INT_STATUS); + if (status == 0xff) + return (0); + + /* ack the interrupt */ + bus_space_write_1(iot, ioh, ESA_HOST_INT_STATUS, status); + + if (status & ESA_HV_INT_PENDING) { + u_int8_t event; + + printf("%s: hardware volume interrupt\n", sc->sc_dev.dv_xname); + event = bus_space_read_1(iot, ioh, ESA_HW_VOL_COUNTER_MASTER); + switch(event) { + case 0x99: + case 0xaa: + case 0x66: + case 0x88: + printf("%s: esa_intr: FIXME\n", sc->sc_dev.dv_xname); + break; + default: + printf("%s: unknown hwvol event 0x%02x\n", + sc->sc_dev.dv_xname, event); + break; + } + bus_space_write_1(iot, ioh, ESA_HW_VOL_COUNTER_MASTER, 0x88); + } + + if (status & ESA_ASSP_INT_PENDING) { + ctl = bus_space_read_1(iot, ioh, ESA_ASSP_CONTROL_B); + if (!(ctl & ESA_STOP_ASSP_CLOCK)) { + ctl = bus_space_read_1(iot, ioh, + ESA_ASSP_HOST_INT_STATUS); + if (ctl & ESA_DSP2HOST_REQ_TIMER) { + bus_space_write_1(iot, ioh, + ESA_ASSP_HOST_INT_STATUS, + ESA_DSP2HOST_REQ_TIMER); + for (i = 0; i < ESA_NUM_VOICES; i++) { + vc = &sc->voice[i]; + if (vc->play.active) { + play_blksize = vc->play.blksize; + play_bufsize = vc->play.bufsize; + pos = esa_get_pointer(sc, &vc->play) + % play_bufsize; + diff = (play_bufsize + pos - vc->play.pos) + % play_bufsize; + vc->play.pos = pos; + vc->play.count += diff; + while(vc->play.count >= play_blksize) { + vc->play.count -= play_blksize; + (*vc->play.intr)(vc->play.arg); + } + } + if (vc->rec.active) { + rec_blksize = vc->rec.blksize; + rec_bufsize = vc->rec.bufsize; + pos = esa_get_pointer(sc, &vc->rec) + % rec_bufsize; + diff = (rec_bufsize + pos - vc->rec.pos) + % rec_bufsize; + vc->rec.pos = pos; + vc->rec.count += diff; + while(vc->rec.count >= rec_blksize) { + vc->rec.count -= rec_blksize; + (*vc->rec.intr)(vc->rec.arg); + } + } + } + } + } + } + + return (1); +} + +int +esa_allocmem(struct esa_softc *sc, size_t size, size_t align, + struct esa_dma *p) +{ + int error; + + p->size = size; + error = bus_dmamem_alloc(sc->sc_dmat, p->size, align, 0, + p->segs, sizeof(p->segs) / sizeof(p->segs[0]), + &p->nsegs, BUS_DMA_NOWAIT); + if (error) + return (error); + + error = bus_dmamem_map(sc->sc_dmat, p->segs, p->nsegs, p->size, + &p->addr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT); + if (error) + goto free; + + error = bus_dmamap_create(sc->sc_dmat, p->size, 1, p->size, 0, + BUS_DMA_NOWAIT, &p->map); + if (error) + goto unmap; + + error = bus_dmamap_load(sc->sc_dmat, p->map, p->addr, p->size, NULL, + BUS_DMA_NOWAIT); + if (error) + goto destroy; + + return (0); + +destroy: + bus_dmamap_destroy(sc->sc_dmat, p->map); +unmap: + bus_dmamem_unmap(sc->sc_dmat, p->addr, p->size); +free: + bus_dmamem_free(sc->sc_dmat, p->segs, p->nsegs); + + return (error); +} + +int +esa_freemem(struct esa_softc *sc, struct esa_dma *p) +{ + + bus_dmamap_unload(sc->sc_dmat, p->map); + bus_dmamap_destroy(sc->sc_dmat, p->map); + bus_dmamem_unmap(sc->sc_dmat, p->addr, p->size); + bus_dmamem_free(sc->sc_dmat, p->segs, p->nsegs); + + return (0); +} + +/* + * Supporting Subroutines + */ + +int +esa_match(struct device *dev, void *match, void *aux) +{ + struct pci_attach_args *pa = (struct pci_attach_args *)aux; + + switch(PCI_VENDOR(pa->pa_id)) { + case PCI_VENDOR_ESSTECH: + switch(PCI_PRODUCT(pa->pa_id)) { + case PCI_PRODUCT_ESSTECH_ES1989: + case PCI_PRODUCT_ESSTECH_MAESTRO3: + case PCI_PRODUCT_ESSTECH_MAESTRO3_2: + return (1); + } + } + + return (0); +} + +void +esa_attach(struct device *parent, struct device *self, void *aux) +{ + struct esa_softc *sc = (struct esa_softc *)self; + struct pci_attach_args *pa = (struct pci_attach_args *)aux; + pcitag_t tag = pa->pa_tag; + pci_chipset_tag_t pc = pa->pa_pc; + pci_intr_handle_t ih; + struct esa_card_type *card; + const char *intrstr; + u_int32_t data; + char devinfo[256]; + int revision, len; + int i; + + pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); + revision = PCI_REVISION(pa->pa_class); + printf(": %s (rev. 0x%02x)\n", devinfo, revision); + + for (card = esa_card_types; card->pci_vendor_id; card++) + if (PCI_VENDOR(pa->pa_id) == card->pci_vendor_id && + PCI_PRODUCT(pa->pa_id) == card->pci_product_id) { + sc->type = card->type; + sc->delay1 = card->delay1; + sc->delay2 = card->delay2; + break; + } + + data = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); + data |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE + | PCI_COMMAND_MASTER_ENABLE); + pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, data); + + /* Map I/O register */ + if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, + &sc->sc_iot, &sc->sc_ioh, &sc->sc_iob, &sc->sc_ios, 0)) { + printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname); + return; + } + + /* Initialize softc */ + sc->sc_tag = tag; + sc->sc_pct = pc; + sc->sc_dmat = pa->pa_dmat; + + /* Map and establish an interrupt */ + if (pci_intr_map(pa, &ih)) { + printf("%s: can't map interrupt\n", sc->sc_dev.dv_xname); + return; + } + intrstr = pci_intr_string(pc, ih); + sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, esa_intr, self, + sc->sc_dev.dv_xname); + if (sc->sc_ih == NULL) { + printf("%s: can't establish interrupt", sc->sc_dev.dv_xname); + if (intrstr != NULL) + printf(" at %s", intrstr); + printf("\n"); + return; + } + printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); + + /* Power up chip */ + esa_power(sc, PCI_PMCSR_STATE_D0); + + /* Init chip */ + if (esa_init(sc) == -1) { + printf("%s: esa_attach: unable to initialize the card\n", + sc->sc_dev.dv_xname); + return; + } + + /* create suspend save area */ + len = sizeof(u_int16_t) * (ESA_REV_B_CODE_MEMORY_LENGTH + + ESA_REV_B_DATA_MEMORY_LENGTH + 1); + sc->savemem = (u_int16_t *)malloc(len, M_DEVBUF, M_NOWAIT); + if (sc->savemem == NULL) { + printf("%s: unable to allocate suspend buffer\n", + sc->sc_dev.dv_xname); + return; + } + bzero(sc->savemem, len); + + /* + * Every card I've seen has had their channels swapped with respect + * to the mixer. Ie: + * $ mixerctl -w outputs.master=0,191 + * Would result in the _right_ speaker being turned off. + * + * So, we will swap the left and right mixer channels to compensate + * for this. + */ + sc->codec_flags |= AC97_HOST_SWAPPED_CHANNELS; + sc->codec_flags |= AC97_HOST_DONT_READ; + + /* Attach AC97 host interface */ + sc->host_if.arg = self; + sc->host_if.attach = esa_attach_codec; + sc->host_if.read = esa_read_codec; + sc->host_if.write = esa_write_codec; + sc->host_if.reset = esa_reset_codec; + sc->host_if.flags = esa_flags_codec; + + if (ac97_attach(&sc->host_if) != 0) + return; + + /* initialize list management structures */ + sc->mixer_list.mem_addr = ESA_KDATA_MIXER_XFER0; + sc->mixer_list.max = ESA_MAX_VIRTUAL_MIXER_CHANNELS; + sc->adc1_list.mem_addr = ESA_KDATA_ADC1_XFER0; + sc->adc1_list.max = ESA_MAX_VIRTUAL_ADC1_CHANNELS; + sc->dma_list.mem_addr = ESA_KDATA_DMA_XFER0; + sc->dma_list.max = ESA_MAX_VIRTUAL_DMA_CHANNELS; + sc->msrc_list.mem_addr = ESA_KDATA_INSTANCE0_MINISRC; + sc->msrc_list.max = ESA_MAX_INSTANCE_MINISRC; + + /* initialize index maps */ + for (i = 0; i < ESA_NUM_VOICES * 2; i++) { + sc->mixer_list.indexmap[i] = -1; + sc->msrc_list.indexmap[i] = -1; + sc->dma_list.indexmap[i] = -1; + sc->adc1_list.indexmap[i] = -1; + } + for (i = 0; i < ESA_NUM_VOICES; i++) { + sc->voice[i].parent = (struct device *)sc; + sc->voice[i].index = i; + sc->sc_audiodev[i] = + audio_attach_mi(&esa_hw_if, &sc->voice[i], &sc->sc_dev); + } + + sc->powerhook = powerhook_establish(esa_powerhook, sc); + if (sc->powerhook == NULL) + printf("%s: WARNING: unable to establish powerhook\n", + sc->sc_dev.dv_xname); + + return; +} + +int +esa_detach(struct device *self, int flags) +{ + struct esa_softc *sc = (struct esa_softc *)self; + int i; + + for (i = 0; i < ESA_NUM_VOICES; i++) { + if (sc->sc_audiodev[i] != NULL) + config_detach(sc->sc_audiodev[i], flags); + } + + if (sc->sc_ih != NULL) + pci_intr_disestablish(sc->sc_pct, sc->sc_ih); + if (sc->sc_ios) + bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); + + free(sc->savemem, M_DEVBUF); + + return (0); +} + +u_int16_t +esa_read_assp(struct esa_softc *sc, u_int16_t region, u_int16_t index) +{ + u_int16_t data; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + + bus_space_write_2(iot, ioh, ESA_DSP_PORT_MEMORY_TYPE, + region & ESA_MEMTYPE_MASK); + bus_space_write_2(iot, ioh, ESA_DSP_PORT_MEMORY_INDEX, index); + data = bus_space_read_2(iot, ioh, ESA_DSP_PORT_MEMORY_DATA); + + return (data); +} + +void +esa_write_assp(struct esa_softc *sc, u_int16_t region, u_int16_t index, + u_int16_t data) +{ + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + + bus_space_write_2(iot, ioh, ESA_DSP_PORT_MEMORY_TYPE, + region & ESA_MEMTYPE_MASK); + bus_space_write_2(iot, ioh, ESA_DSP_PORT_MEMORY_INDEX, index); + bus_space_write_2(iot, ioh, ESA_DSP_PORT_MEMORY_DATA, data); + + return; +} + +int +esa_init_codec(struct esa_softc *sc) +{ + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + u_int32_t data; + + data = bus_space_read_1(iot, ioh, ESA_CODEC_COMMAND); + + return ((data & 0x1) ? 0 : 1); +} + +int +esa_attach_codec(void *aux, struct ac97_codec_if *codec_if) +{ + struct esa_softc *sc = aux; + + sc->codec_if = codec_if; + + return (0); +} + +int +esa_read_codec(void *aux, u_int8_t reg, u_int16_t *result) +{ + struct esa_softc *sc = aux; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + + if (esa_wait(sc)) + printf("%s: esa_read_codec: timed out\n", sc->sc_dev.dv_xname); + bus_space_write_1(iot, ioh, ESA_CODEC_COMMAND, (reg & 0x7f) | 0x80); + delay(50); + if (esa_wait(sc)) + printf("%s: esa_read_codec: timed out\n", sc->sc_dev.dv_xname); + *result = bus_space_read_2(iot, ioh, ESA_CODEC_DATA); + + return (0); +} + +int +esa_write_codec(void *aux, u_int8_t reg, u_int16_t data) +{ + struct esa_softc *sc = aux; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + + if (esa_wait(sc)) { + printf("%s: esa_write_codec: timed out\n", sc->sc_dev.dv_xname); + return (-1); + } + bus_space_write_2(iot, ioh, ESA_CODEC_DATA, data); + bus_space_write_1(iot, ioh, ESA_CODEC_COMMAND, reg & 0x7f); + delay(50); + + return (0); +} + +void +esa_reset_codec(void *aux) +{ + + return; +} + +enum ac97_host_flags +esa_flags_codec(void *aux) +{ + struct esa_softc *sc = aux; + + return (sc->codec_flags); +} + +int +esa_wait(struct esa_softc *sc) +{ + int i, val; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + + for (i = 0; i < 20; i++) { + val = bus_space_read_1(iot, ioh, ESA_CODEC_STATUS); + if ((val & 1) == 0) + return (0); + delay(2); + } + + return (-1); +} + +int +esa_init(struct esa_softc *sc) +{ + struct esa_voice *vc; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + pcitag_t tag = sc->sc_tag; + pci_chipset_tag_t pc = sc->sc_pct; + u_int32_t data, i, size; + u_int8_t reset_state; + int data_bytes = (((ESA_MINISRC_TMP_BUFFER_SIZE & ~1) + + (ESA_MINISRC_IN_BUFFER_SIZE & ~1) + + (ESA_MINISRC_OUT_BUFFER_SIZE & ~1) + 4) + 255) + &~ 255; + + /* Disable legacy emulation */ + data = pci_conf_read(pc, tag, PCI_LEGACY_AUDIO_CTRL); + data |= DISABLE_LEGACY; + pci_conf_write(pc, tag, PCI_LEGACY_AUDIO_CTRL, data); + + esa_config(sc); + + reset_state = esa_assp_halt(sc); + + esa_init_codec(sc); + esa_codec_reset(sc); + + /* Zero kernel and mixer data */ + size = ESA_REV_B_DATA_MEMORY_UNIT_LENGTH * ESA_NUM_UNITS_KERNEL_DATA; + for (i = 0; i < size / 2; i++) { + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_BASE_ADDR + i, 0); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_BASE_ADDR2 + i, 0); + } + + /* Init DMA pointer */ + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, ESA_KDATA_CURRENT_DMA, + ESA_KDATA_DMA_XFER0); + + /* Write kernel code into memory */ + size = sizeof(esa_assp_kernel_image); + for (i = 0; i < size / 2; i++) + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_CODE, + ESA_REV_B_CODE_MEMORY_BEGIN + i, esa_assp_kernel_image[i]); + + size = sizeof(esa_assp_minisrc_image); + for (i = 0; i < size / 2; i++) + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_CODE, 0x400 + i, + esa_assp_minisrc_image[i]); + + /* Write the coefficients for the low pass filter */ + size = sizeof(esa_minisrc_lpf_image); + for (i = 0; i < size / 2; i++) + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_CODE, + 0x400 + ESA_MINISRC_COEF_LOC + i, esa_minisrc_lpf_image[i]); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_CODE, + 0x400 + ESA_MINISRC_COEF_LOC + size, 0x8000); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, ESA_KDATA_TASK0, 0x400); + /* Init the mixer number */ + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_MIXER_TASK_NUMBER, 0); + /* Extreme kernel master volume */ + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_DAC_LEFT_VOLUME, ESA_ARB_VOLUME); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + ESA_KDATA_DAC_RIGHT_VOLUME, ESA_ARB_VOLUME); + + if (esa_amp_enable(sc)) + return (-1); + + /* Zero entire DAC/ADC area */ + for (i = 0x1100; i < 0x1c00; i++) + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, i, 0); + + /* set some sane defaults */ + for (i = 0; i < ESA_NUM_VOICES; i++) { + vc = &sc->voice[i]; + vc->play.data_offset = ESA_DAC_DATA + (data_bytes * i); + vc->rec.data_offset = ESA_DAC_DATA + (data_bytes * i * 2); + } + + esa_enable_interrupts(sc); + + bus_space_write_1(iot, ioh, ESA_DSP_PORT_CONTROL_REG_B, + reset_state | ESA_REGB_ENABLE_RESET); + + return (0); +} + +void +esa_config(struct esa_softc *sc) +{ + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + pcitag_t tag = sc->sc_tag; + pci_chipset_tag_t pc = sc->sc_pct; + u_int32_t data; + + data = pci_conf_read(pc, tag, ESA_PCI_ALLEGRO_CONFIG); + data &= ESA_REDUCED_DEBOUNCE; + data |= ESA_PM_CTRL_ENABLE | ESA_CLK_DIV_BY_49 | ESA_USE_PCI_TIMING; + pci_conf_write(pc, tag, ESA_PCI_ALLEGRO_CONFIG, data); + + bus_space_write_1(iot, ioh, ESA_ASSP_CONTROL_B, ESA_RESET_ASSP); + data = pci_conf_read(pc, tag, ESA_PCI_ALLEGRO_CONFIG); + data &= ~ESA_INT_CLK_SELECT; + if (sc->type == ESS_MAESTRO3) { + data &= ~ESA_INT_CLK_MULT_ENABLE; + data |= ESA_INT_CLK_SRC_NOT_PCI; + } + data &= ~(ESA_CLK_MULT_MODE_SELECT | ESA_CLK_MULT_MODE_SELECT_2); + pci_conf_write(pc, tag, ESA_PCI_ALLEGRO_CONFIG, data); + + if (sc->type == ESS_ALLEGRO1) { + data = pci_conf_read(pc, tag, ESA_PCI_USER_CONFIG); + data |= ESA_IN_CLK_12MHZ_SELECT; + pci_conf_write(pc, tag, ESA_PCI_USER_CONFIG, data); + } + + data = bus_space_read_1(iot, ioh, ESA_ASSP_CONTROL_A); + data &= ~(ESA_DSP_CLK_36MHZ_SELECT | ESA_ASSP_CLK_49MHZ_SELECT); + data |= ESA_ASSP_CLK_49MHZ_SELECT; /* XXX: Assumes 49MHz DSP */ + data |= ESA_ASSP_0_WS_ENABLE; + bus_space_write_1(iot, ioh, ESA_ASSP_CONTROL_A, data); + + bus_space_write_1(iot, ioh, ESA_ASSP_CONTROL_B, ESA_RUN_ASSP); + + return; +} + +u_int8_t +esa_assp_halt(struct esa_softc *sc) +{ + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + u_int8_t data, reset_state; + + data = bus_space_read_1(iot, ioh, ESA_DSP_PORT_CONTROL_REG_B); + reset_state = data & ~ESA_REGB_STOP_CLOCK; + delay(10000); /* XXX use tsleep */ + bus_space_write_1(iot, ioh, ESA_DSP_PORT_CONTROL_REG_B, + reset_state & ~ESA_REGB_ENABLE_RESET); + delay(10000); /* XXX use tsleep */ + + return (reset_state); +} + +void +esa_codec_reset(struct esa_softc *sc) +{ + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + u_int16_t data, dir; + int retry = 0; + + do { + data = bus_space_read_2(iot, ioh, ESA_GPIO_DIRECTION); + dir = data | 0x10; /* assuming pci bus master? */ + + /* remote codec config */ + data = bus_space_read_2(iot, ioh, ESA_RING_BUS_CTRL_B); + bus_space_write_2(iot, ioh, ESA_RING_BUS_CTRL_B, + data & ~ESA_SECOND_CODEC_ID_MASK); + data = bus_space_read_2(iot, ioh, ESA_SDO_OUT_DEST_CTRL); + bus_space_write_2(iot, ioh, ESA_SDO_OUT_DEST_CTRL, + data & ~ESA_COMMAND_ADDR_OUT); + data = bus_space_read_2(iot, ioh, ESA_SDO_IN_DEST_CTRL); + bus_space_write_2(iot, ioh, ESA_SDO_IN_DEST_CTRL, + data & ~ESA_STATUS_ADDR_IN); + + bus_space_write_2(iot, ioh, ESA_RING_BUS_CTRL_A, + ESA_IO_SRAM_ENABLE); + delay(20); + + bus_space_write_2(iot, ioh, ESA_GPIO_DIRECTION, + dir & ~ESA_GPO_PRIMARY_AC97); + bus_space_write_2(iot, ioh, ESA_GPIO_MASK, + ~ESA_GPO_PRIMARY_AC97); + bus_space_write_2(iot, ioh, ESA_GPIO_DATA, 0); + bus_space_write_2(iot, ioh, ESA_GPIO_DIRECTION, + dir | ESA_GPO_PRIMARY_AC97); + delay(sc->delay1 * 1000); + bus_space_write_2(iot, ioh, ESA_GPIO_DATA, + ESA_GPO_PRIMARY_AC97); + delay(5); + bus_space_write_2(iot, ioh, ESA_RING_BUS_CTRL_A, + ESA_IO_SRAM_ENABLE | ESA_SERIAL_AC_LINK_ENABLE); + bus_space_write_2(iot, ioh, ESA_GPIO_MASK, ~0); + delay(sc->delay2 * 1000); + + esa_read_codec(sc, 0x7c, &data); + if ((data == 0) || (data == 0xffff)) { + retry++; + if (retry > 3) { + printf("%s: esa_codec_reset: failed\n", + sc->sc_dev.dv_xname); + break; + } + printf("%s: esa_codec_reset: retrying\n", + sc->sc_dev.dv_xname); + } else + retry = 0; + } while (retry); + + return; +} + +int +esa_amp_enable(struct esa_softc *sc) +{ + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + u_int32_t gpo, polarity_port, polarity; + u_int16_t data; + + switch (sc->type) { + case ESS_ALLEGRO1: + polarity_port = 0x1800; + break; + case ESS_MAESTRO3: + polarity_port = 0x1100; + break; + default: + printf("%s: esa_amp_enable: Unknown chip type!!!\n", + sc->sc_dev.dv_xname); + return (1); + } + + gpo = (polarity_port >> 8) & 0x0f; + polarity = polarity_port >> 12; + polarity = !polarity; /* Enable */ + polarity = polarity << gpo; + gpo = 1 << gpo; + bus_space_write_2(iot, ioh, ESA_GPIO_MASK, ~gpo); + data = bus_space_read_2(iot, ioh, ESA_GPIO_DIRECTION); + bus_space_write_2(iot, ioh, ESA_GPIO_DIRECTION, data | gpo); + data = ESA_GPO_SECONDARY_AC97 | ESA_GPO_PRIMARY_AC97 | polarity; + bus_space_write_2(iot, ioh, ESA_GPIO_DATA, data); + bus_space_write_2(iot, ioh, ESA_GPIO_MASK, ~0); + + return (0); +} + +void +esa_enable_interrupts(struct esa_softc *sc) +{ + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + u_int8_t data; + + bus_space_write_2(iot, ioh, ESA_HOST_INT_CTRL, + ESA_ASSP_INT_ENABLE | ESA_HV_INT_ENABLE); + data = bus_space_read_1(iot, ioh, ESA_ASSP_CONTROL_C); + bus_space_write_1(iot, ioh, ESA_ASSP_CONTROL_C, + data | ESA_ASSP_HOST_INT_ENABLE); +} + +/* + * List management + */ +int +esa_add_list(struct esa_voice *vc, struct esa_list *el, + u_int16_t val, int index) +{ + struct esa_softc *sc = (struct esa_softc *)vc->parent; + + el->indexmap[index] = el->currlen; + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + el->mem_addr + el->currlen, + val); + + return (el->currlen++); +} + +void +esa_remove_list(struct esa_voice *vc, struct esa_list *el, int index) +{ + struct esa_softc *sc = (struct esa_softc *)vc->parent; + u_int16_t val; + int lastindex = el->currlen - 1; + int vindex = el->indexmap[index]; + int i; + + /* reset our virtual index */ + el->indexmap[index] = -1; + + if (vindex != lastindex) { + val = esa_read_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + el->mem_addr + lastindex); + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + el->mem_addr + vindex, + val); + for (i = 0; i < ESA_NUM_VOICES * 2; i++) + if (el->indexmap[i] == lastindex) + break; + if (i >= ESA_NUM_VOICES * 2) + printf("%s: esa_remove_list: invalid task index\n", + sc->sc_dev.dv_xname); + else + el->indexmap[i] = vindex; + } + + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, + el->mem_addr + lastindex, 0); + el->currlen--; + + return; +} + +int +esa_power(struct esa_softc *sc, int state) +{ + pcitag_t tag = sc->sc_tag; + pci_chipset_tag_t pc = sc->sc_pct; + pcireg_t data; + int pmcapreg; + + if (pci_get_capability(pc, tag, PCI_CAP_PWRMGMT, &pmcapreg, 0)) { + data = pci_conf_read(pc, tag, pmcapreg + 4); + if ((data && PCI_PMCSR_STATE_MASK) != state) + pci_conf_write(pc, tag, pmcapreg + 4, state); + } + + return (0); +} + +void +esa_powerhook(int why, void *hdl) +{ + struct esa_softc *sc = (struct esa_softc *)hdl; + + switch (why) { + case PWR_SUSPEND: + case PWR_STANDBY: + esa_suspend(sc); + break; + case PWR_RESUME: + esa_resume(sc); + (sc->codec_if->vtbl->restore_ports)(sc->codec_if); + break; + } +} + +int +esa_suspend(struct esa_softc *sc) +{ + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + int i, index; + + index = 0; + + bus_space_write_2(iot, ioh, ESA_HOST_INT_CTRL, 0); + bus_space_write_1(iot, ioh, ESA_ASSP_CONTROL_C, 0); + + esa_assp_halt(sc); + + /* Save ASSP state */ + for (i = ESA_REV_B_CODE_MEMORY_BEGIN; i <= ESA_REV_B_CODE_MEMORY_END; + i++) + sc->savemem[index++] = esa_read_assp(sc, + ESA_MEMTYPE_INTERNAL_CODE, i); + for (i = ESA_REV_B_DATA_MEMORY_BEGIN; i <= ESA_REV_B_DATA_MEMORY_END; + i++) + sc->savemem[index++] = esa_read_assp(sc, + ESA_MEMTYPE_INTERNAL_DATA, i); + + esa_power(sc, PCI_PMCSR_STATE_D3); + + return (0); +} + +int +esa_resume(struct esa_softc *sc) { + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; + int i, index; + u_int8_t reset_state; + + index = 0; + + esa_power(sc, PCI_PMCSR_STATE_D0); + delay(10000); + + esa_config(sc); + + reset_state = esa_assp_halt(sc); + + esa_codec_reset(sc); + + /* restore ASSP */ + for (i = ESA_REV_B_CODE_MEMORY_BEGIN; i <= ESA_REV_B_CODE_MEMORY_END; + i++) + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_CODE, i, + sc->savemem[index++]); + for (i = ESA_REV_B_DATA_MEMORY_BEGIN; i <= ESA_REV_B_DATA_MEMORY_END; + i++) + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, i, + sc->savemem[index++]); + + esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, ESA_KDATA_DMA_ACTIVE, 0); + bus_space_write_1(iot, ioh, ESA_DSP_PORT_CONTROL_REG_B, + reset_state | ESA_REGB_ENABLE_RESET); + + esa_enable_interrupts(sc); + esa_amp_enable(sc); + + return (0); +} + +u_int32_t +esa_get_pointer(struct esa_softc *sc, struct esa_channel *ch) +{ + u_int16_t hi = 0, lo = 0; + u_int32_t addr; + int data_offset = ch->data_offset; + + hi = esa_read_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, data_offset + + ESA_CDATA_HOST_SRC_CURRENTH); + lo = esa_read_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, data_offset + + ESA_CDATA_HOST_SRC_CURRENTL); + + addr = lo | ((u_int32_t)hi << 16); + return (addr - ch->start); +} + +paddr_t +esa_mappage(void *addr, void *mem, off_t off, int prot) +{ + struct esa_voice *vc = addr; + struct esa_softc *sc = (struct esa_softc *)vc->parent; + struct esa_dma *p; + + if (off < 0) + return (-1); + for (p = vc->dma; p && KERNADDR(p) != mem; p = p->next) + ; + if (!p) + return (-1); + return (bus_dmamem_mmap(sc->sc_dmat, p->segs, p->nsegs, + off, prot, BUS_DMA_WAITOK)); +} diff --git a/sys/dev/pci/esareg.h b/sys/dev/pci/esareg.h new file mode 100644 index 00000000000..a393283cfea --- /dev/null +++ b/sys/dev/pci/esareg.h @@ -0,0 +1,620 @@ +/* $OpenBSD: esareg.h,v 1.1 2002/04/08 01:47:33 frantzen Exp $ */ +/* $NetBSD: esareg.h,v 1.8 2002/03/06 18:30:31 jmcneill Exp $ */ + +/* + * Copyright (c) 2002 Lennart Augustsson + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * ESS Allegro-1 / Maestro3 Audio Driver + * + * Lots of magic based on the FreeBSD maestro3 driver and + * reverse engineering. + * Original driver by Don Kim. + * + */ + +/* Allegro PCI configuration registers */ +#define PCI_LEGACY_AUDIO_CTRL 0x40 +#define DISABLE_LEGACY 0x00008000 + +#define ESA_PCI_ALLEGRO_CONFIG 0x50 +#define ESA_SB_ADDR_240 0x00000004 +#define ESA_MPU_ADDR_MASK 0x00000018 +#define ESA_MPU_ADDR_330 0x00000000 +#define ESA_MPU_ADDR_300 0x00000008 +#define ESA_MPU_ADDR_320 0x00000010 +#define ESA_MPU_ADDR_340 0x00000018 +#define ESA_USE_PCI_TIMING 0x00000040 +#define ESA_POSTED_WRITE_ENABLE 0x00000080 +#define ESA_DMA_POLICY_MASK 0x00000700 +#define ESA_DMA_DDMA 0x00000000 +#define ESA_DMA_TDMA 0x00000100 +#define ESA_DMA_PCPCI 0x00000200 +#define ESA_DMA_WBDMA16 0x00000400 +#define ESA_DMA_WBDMA4 0x00000500 +#define ESA_DMA_WBDMA2 0x00000600 +#define ESA_DMA_WBDMA1 0x00000700 +#define ESA_DMA_SAFE_GUARD 0x00000800 +#define ESA_HI_PERF_GP_ENABLE 0x00001000 +#define ESA_PIC_SNOOP_MODE_0 0x00002000 +#define ESA_PIC_SNOOP_MODE_1 0x00004000 +#define ESA_SOUNDBLASTER_IRQ_MASK 0x00008000 +#define ESA_RING_IN_ENABLE 0x00010000 +#define ESA_SPDIF_TEST_MODE 0x00020000 +#define ESA_CLK_MULT_MODE_SELECT_2 0x00040000 +#define ESA_EEPROM_WRITE_ENABLE 0x00080000 +#define ESA_CODEC_DIR_IN 0x00100000 +#define ESA_HV_BUTTON_FROM_GD 0x00200000 +#define ESA_REDUCED_DEBOUNCE 0x00400000 +#define ESA_HV_CTRL_ENABLE 0x00800000 +#define ESA_SPDIF_ENABLE 0x01000000 +#define ESA_CLK_DIV_SELECT 0x06000000 +#define ESA_CLK_DIV_BY_48 0x00000000 +#define ESA_CLK_DIV_BY_49 0x02000000 +#define ESA_CLK_DIV_BY_50 0x04000000 +#define ESA_CLK_DIV_RESERVED 0x06000000 +#define ESA_PM_CTRL_ENABLE 0x08000000 +#define ESA_CLK_MULT_MODE_SELECT 0x30000000 +#define ESA_CLK_MULT_MODE_SHIFT 28 +#define ESA_CLK_MULT_MODE_0 0x00000000 +#define ESA_CLK_MULT_MODE_1 0x10000000 +#define ESA_CLK_MULT_MODE_2 0x20000000 +#define ESA_CLK_MULT_MODE_3 0x30000000 +#define ESA_INT_CLK_SELECT 0x40000000 +#define ESA_INT_CLK_MULT_RESET 0x80000000 + +/* M3 */ +#define ESA_INT_CLK_SRC_NOT_PCI 0x00100000 +#define ESA_INT_CLK_MULT_ENABLE 0x80000000 + +#define ESA_PCI_ACPI_CONTROL 0x54 +#define ESA_PCI_ACPI_D0 0x00000000 +#define ESA_PCI_ACPI_D1 0xB4F70000 +#define ESA_PCI_ACPI_D2 0xB4F7B4F7 + +#define ESA_PCI_USER_CONFIG 0x58 +#define ESA_EXT_PCI_MASTER_ENABLE 0x00000001 +#define ESA_SPDIF_OUT_SELECT 0x00000002 +#define ESA_TEST_PIN_DIR_CTRL 0x00000004 +#define ESA_AC97_CODEC_TEST 0x00000020 +#define ESA_TRI_STATE_BUFFER 0x00000080 +#define ESA_IN_CLK_12MHZ_SELECT 0x00000100 +#define ESA_MULTI_FUNC_DISABLE 0x00000200 +#define ESA_EXT_MASTER_PAIR_SEL 0x00000400 +#define ESA_PCI_MASTER_SUPPORT 0x00000800 +#define ESA_STOP_CLOCK_ENABLE 0x00001000 +#define ESA_EAPD_DRIVE_ENABLE 0x00002000 +#define ESA_REQ_TRI_STATE_ENABLE 0x00004000 +#define ESA_REQ_LOW_ENABLE 0x00008000 +#define ESA_MIDI_1_ENABLE 0x00010000 +#define ESA_MIDI_2_ENABLE 0x00020000 +#define ESA_SB_AUDIO_SYNC 0x00040000 +#define ESA_HV_CTRL_TEST 0x00100000 +#define ESA_SOUNDBLASTER_TEST 0x00400000 + +#define ESA_PCI_USER_CONFIG_C 0x5C + +#define ESA_PCI_DDMA_CTRL 0x60 +#define ESA_DDMA_ENABLE 0x00000001 + + +/* Allegro registers */ +#define ESA_HOST_INT_CTRL 0x18 +#define ESA_SB_INT_ENABLE 0x0001 +#define ESA_MPU401_INT_ENABLE 0x0002 +#define ESA_ASSP_INT_ENABLE 0x0010 +#define ESA_RING_INT_ENABLE 0x0020 +#define ESA_HV_INT_ENABLE 0x0040 +#define ESA_CLKRUN_GEN_ENABLE 0x0100 +#define ESA_HV_CTRL_TO_PME 0x0400 +#define ESA_SOFTWARE_RESET_ENABLE 0x8000 + +/* + * should be using the above defines, probably. + */ +#define ESA_REGB_ENABLE_RESET 0x01 +#define ESA_REGB_STOP_CLOCK 0x10 + +#define ESA_HOST_INT_STATUS 0x1A +#define ESA_SB_INT_PENDING 0x01 +#define ESA_MPU401_INT_PENDING 0x02 +#define ESA_ASSP_INT_PENDING 0x10 +#define ESA_RING_INT_PENDING 0x20 +#define ESA_HV_INT_PENDING 0x40 + +#define ESA_HARDWARE_VOL_CTRL 0x1B +#define ESA_SHADOW_MIX_REG_VOICE 0x1C +#define ESA_HW_VOL_COUNTER_VOICE 0x1D +#define ESA_SHADOW_MIX_REG_MASTER 0x1E +#define ESA_HW_VOL_COUNTER_MASTER 0x1F + +#define ESA_CODEC_COMMAND 0x30 +#define ESA_CODEC_READ_B 0x80 + +#define ESA_CODEC_STATUS 0x30 +#define ESA_CODEC_BUSY_B 0x01 + +#define ESA_CODEC_DATA 0x32 + +#define ESA_RING_BUS_CTRL_A 0x36 +#define ESA_RAC_PME_ENABLE 0x0100 +#define ESA_RAC_SDFS_ENABLE 0x0200 +#define ESA_LAC_PME_ENABLE 0x0400 +#define ESA_LAC_SDFS_ENABLE 0x0800 +#define ESA_SERIAL_AC_LINK_ENABLE 0x1000 +#define ESA_IO_SRAM_ENABLE 0x2000 +#define ESA_IIS_INPUT_ENABLE 0x8000 + +#define ESA_RING_BUS_CTRL_B 0x38 +#define ESA_SECOND_CODEC_ID_MASK 0x0003 +#define ESA_SPDIF_FUNC_ENABLE 0x0010 +#define ESA_SECOND_AC_ENABLE 0x0020 +#define ESA_SB_MODULE_INTF_ENABLE 0x0040 +#define ESA_SSPE_ENABLE 0x0040 +#define ESA_M3I_DOCK_ENABLE 0x0080 + +#define ESA_SDO_OUT_DEST_CTRL 0x3A +#define ESA_COMMAND_ADDR_OUT 0x0003 +#define ESA_PCM_LR_OUT_LOCAL 0x0000 +#define ESA_PCM_LR_OUT_REMOTE 0x0004 +#define ESA_PCM_LR_OUT_MUTE 0x0008 +#define ESA_PCM_LR_OUT_BOTH 0x000C +#define ESA_LINE1_DAC_OUT_LOCAL 0x0000 +#define ESA_LINE1_DAC_OUT_REMOTE 0x0010 +#define ESA_LINE1_DAC_OUT_MUTE 0x0020 +#define ESA_LINE1_DAC_OUT_BOTH 0x0030 +#define ESA_PCM_CLS_OUT_LOCAL 0x0000 +#define ESA_PCM_CLS_OUT_REMOTE 0x0040 +#define ESA_PCM_CLS_OUT_MUTE 0x0080 +#define ESA_PCM_CLS_OUT_BOTH 0x00C0 +#define ESA_PCM_RLF_OUT_LOCAL 0x0000 +#define ESA_PCM_RLF_OUT_REMOTE 0x0100 +#define ESA_PCM_RLF_OUT_MUTE 0x0200 +#define ESA_PCM_RLF_OUT_BOTH 0x0300 +#define ESA_LINE2_DAC_OUT_LOCAL 0x0000 +#define ESA_LINE2_DAC_OUT_REMOTE 0x0400 +#define ESA_LINE2_DAC_OUT_MUTE 0x0800 +#define ESA_LINE2_DAC_OUT_BOTH 0x0C00 +#define ESA_HANDSET_OUT_LOCAL 0x0000 +#define ESA_HANDSET_OUT_REMOTE 0x1000 +#define ESA_HANDSET_OUT_MUTE 0x2000 +#define ESA_HANDSET_OUT_BOTH 0x3000 +#define ESA_IO_CTRL_OUT_LOCAL 0x0000 +#define ESA_IO_CTRL_OUT_REMOTE 0x4000 +#define ESA_IO_CTRL_OUT_MUTE 0x8000 +#define ESA_IO_CTRL_OUT_BOTH 0xC000 + +#define ESA_SDO_IN_DEST_CTRL 0x3C +#define ESA_STATUS_ADDR_IN 0x0003 +#define ESA_PCM_LR_IN_LOCAL 0x0000 +#define ESA_PCM_LR_IN_REMOTE 0x0004 +#define ESA_PCM_LR_RESERVED 0x0008 +#define ESA_PCM_LR_IN_BOTH 0x000C +#define ESA_LINE1_ADC_IN_LOCAL 0x0000 +#define ESA_LINE1_ADC_IN_REMOTE 0x0010 +#define ESA_LINE1_ADC_IN_MUTE 0x0020 +#define ESA_MIC_ADC_IN_LOCAL 0x0000 +#define ESA_MIC_ADC_IN_REMOTE 0x0040 +#define ESA_MIC_ADC_IN_MUTE 0x0080 +#define ESA_LINE2_DAC_IN_LOCAL 0x0000 +#define ESA_LINE2_DAC_IN_REMOTE 0x0400 +#define ESA_LINE2_DAC_IN_MUTE 0x0800 +#define ESA_HANDSET_IN_LOCAL 0x0000 +#define ESA_HANDSET_IN_REMOTE 0x1000 +#define ESA_HANDSET_IN_MUTE 0x2000 +#define ESA_IO_STATUS_IN_LOCAL 0x0000 +#define ESA_IO_STATUS_IN_REMOTE 0x4000 + +#define ESA_SPDIF_IN_CTRL 0x3E +#define ESA_SPDIF_IN_ENABLE 0x0001 + +#define ESA_GPIO_DATA 0x60 +#define ESA_GPIO_DATA_MASK 0x0FFF +#define ESA_GPIO_HV_STATUS 0x3000 +#define ESA_GPIO_PME_STATUS 0x4000 + +#define ESA_GPIO_MASK 0x64 +#define ESA_GPIO_DIRECTION 0x68 +#define ESA_GPO_PRIMARY_AC97 0x0001 +#define ESA_GPI_LINEOUT_SENSE 0x0004 +#define ESA_GPO_SECONDARY_AC97 0x0008 +#define ESA_GPI_VOL_DOWN 0x0010 +#define ESA_GPI_VOL_UP 0x0020 +#define ESA_GPI_IIS_CLK 0x0040 +#define ESA_GPI_IIS_LRCLK 0x0080 +#define ESA_GPI_IIS_DATA 0x0100 +#define ESA_GPI_DOCKING_STATUS 0x0100 +#define ESA_GPI_HEADPHONE_SENSE 0x0200 +#define ESA_GPO_EXT_AMP_SHUTDOWN 0x1000 + +/* M3 */ +#define ESA_GPO_M3_EXT_AMP_SHUTDN 0x0002 + +#define ESA_ASSP_INDEX_PORT 0x80 +#define ESA_ASSP_MEMORY_PORT 0x82 +#define ESA_ASSP_DATA_PORT 0x84 + +#define ESA_MPU401_DATA_PORT 0x98 +#define ESA_MPU401_STATUS_PORT 0x99 + +#define ESA_CLK_MULT_DATA_PORT 0x9C + +#define ESA_ASSP_CONTROL_A 0xA2 +#define ESA_ASSP_0_WS_ENABLE 0x01 +#define ESA_ASSP_CTRL_A_RESERVED1 0x02 +#define ESA_ASSP_CTRL_A_RESERVED2 0x04 +#define ESA_ASSP_CLK_49MHZ_SELECT 0x08 +#define ESA_FAST_PLU_ENABLE 0x10 +#define ESA_ASSP_CTRL_A_RESERVED3 0x20 +#define ESA_DSP_CLK_36MHZ_SELECT 0x40 + +#define ESA_ASSP_CONTROL_B 0xA4 +#define ESA_RESET_ASSP 0x00 +#define ESA_RUN_ASSP 0x01 +#define ESA_ENABLE_ASSP_CLOCK 0x00 +#define ESA_STOP_ASSP_CLOCK 0x10 +#define ESA_RESET_TOGGLE 0x40 + +#define ESA_ASSP_CONTROL_C 0xA6 +#define ESA_ASSP_HOST_INT_ENABLE 0x01 +#define ESA_FM_ADDR_REMAP_DISABLE 0x02 +#define ESA_HOST_WRITE_PORT_ENABLE 0x08 + +#define ESA_ASSP_HOST_INT_STATUS 0xAC +#define ESA_DSP2HOST_REQ_PIORECORD 0x01 +#define ESA_DSP2HOST_REQ_I2SRATE 0x02 +#define ESA_DSP2HOST_REQ_TIMER 0x04 + +/* + * ASSP control regs + */ +#define ESA_DSP_PORT_TIMER_COUNT 0x06 + +#define ESA_DSP_PORT_MEMORY_INDEX 0x80 + +#define ESA_DSP_PORT_MEMORY_TYPE 0x82 +#define ESA_MEMTYPE_INTERNAL_CODE 0x0002 +#define ESA_MEMTYPE_INTERNAL_DATA 0x0003 +#define ESA_MEMTYPE_MASK 0x0003 + +#define ESA_DSP_PORT_MEMORY_DATA 0x84 + +#define ESA_DSP_PORT_CONTROL_REG_A 0xA2 +#define ESA_DSP_PORT_CONTROL_REG_B 0xA4 +#define ESA_DSP_PORT_CONTROL_REG_C 0xA6 + +#define ESA_REV_A_CODE_MEMORY_BEGIN 0x0000 +#define ESA_REV_A_CODE_MEMORY_END 0x0FFF +#define ESA_REV_A_CODE_MEMORY_UNIT_LENGTH 0x0040 +#define ESA_REV_A_CODE_MEMORY_LENGTH (ESA_REV_A_CODE_MEMORY_END - ESA_REV_A_CODE_MEMORY_BEGIN + 1) + +#define ESA_REV_B_CODE_MEMORY_BEGIN 0x0000 +#define ESA_REV_B_CODE_MEMORY_END 0x0BFF +#define ESA_REV_B_CODE_MEMORY_UNIT_LENGTH 0x0040 +#define ESA_REV_B_CODE_MEMORY_LENGTH (ESA_REV_B_CODE_MEMORY_END - ESA_REV_B_CODE_MEMORY_BEGIN + 1) + +#define ESA_REV_A_DATA_MEMORY_BEGIN 0x1000 +#define ESA_REV_A_DATA_MEMORY_END 0x2FFF +#define ESA_REV_A_DATA_MEMORY_UNIT_LENGTH 0x0080 +#define ESA_REV_A_DATA_MEMORY_LENGTH (ESA_REV_A_DATA_MEMORY_END - ESA_REV_A_DATA_MEMORY_BEGIN + 1) + +#define ESA_REV_B_DATA_MEMORY_BEGIN 0x1000 +#define ESA_REV_B_DATA_MEMORY_END 0x2BFF +#define ESA_REV_B_DATA_MEMORY_UNIT_LENGTH 0x0080 +#define ESA_REV_B_DATA_MEMORY_LENGTH (ESA_REV_B_DATA_MEMORY_END - ESA_REV_B_DATA_MEMORY_BEGIN + 1) + + +#define ESA_NUM_UNITS_KERNEL_CODE 16 +#define ESA_NUM_UNITS_KERNEL_DATA 2 + +#define ESA_NUM_UNITS_KERNEL_CODE_WITH_HSP 16 +#define ESA_NUM_UNITS_KERNEL_DATA_WITH_HSP 5 + +/* + * Kernel data layout + */ + +#define ESA_DP_SHIFT_COUNT 7 + +#define ESA_KDATA_BASE_ADDR 0x1000 +#define ESA_KDATA_BASE_ADDR2 0x1080 + +#define ESA_KDATA_TASK0 (ESA_KDATA_BASE_ADDR + 0x0000) +#define ESA_KDATA_TASK1 (ESA_KDATA_BASE_ADDR + 0x0001) +#define ESA_KDATA_TASK2 (ESA_KDATA_BASE_ADDR + 0x0002) +#define ESA_KDATA_TASK3 (ESA_KDATA_BASE_ADDR + 0x0003) +#define ESA_KDATA_TASK4 (ESA_KDATA_BASE_ADDR + 0x0004) +#define ESA_KDATA_TASK5 (ESA_KDATA_BASE_ADDR + 0x0005) +#define ESA_KDATA_TASK6 (ESA_KDATA_BASE_ADDR + 0x0006) +#define ESA_KDATA_TASK7 (ESA_KDATA_BASE_ADDR + 0x0007) +#define ESA_KDATA_TASK_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0008) + +#define ESA_KDATA_CURRENT_TASK (ESA_KDATA_BASE_ADDR + 0x0009) +#define ESA_KDATA_TASK_SWITCH (ESA_KDATA_BASE_ADDR + 0x000A) + +#define ESA_KDATA_INSTANCE0_POS3D (ESA_KDATA_BASE_ADDR + 0x000B) +#define ESA_KDATA_INSTANCE1_POS3D (ESA_KDATA_BASE_ADDR + 0x000C) +#define ESA_KDATA_INSTANCE2_POS3D (ESA_KDATA_BASE_ADDR + 0x000D) +#define ESA_KDATA_INSTANCE3_POS3D (ESA_KDATA_BASE_ADDR + 0x000E) +#define ESA_KDATA_INSTANCE4_POS3D (ESA_KDATA_BASE_ADDR + 0x000F) +#define ESA_KDATA_INSTANCE5_POS3D (ESA_KDATA_BASE_ADDR + 0x0010) +#define ESA_KDATA_INSTANCE6_POS3D (ESA_KDATA_BASE_ADDR + 0x0011) +#define ESA_KDATA_INSTANCE7_POS3D (ESA_KDATA_BASE_ADDR + 0x0012) +#define ESA_KDATA_INSTANCE8_POS3D (ESA_KDATA_BASE_ADDR + 0x0013) +#define ESA_KDATA_INSTANCE_POS3D_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0014) + +#define ESA_KDATA_INSTANCE0_SPKVIRT (ESA_KDATA_BASE_ADDR + 0x0015) +#define ESA_KDATA_INSTANCE_SPKVIRT_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0016) + +#define ESA_KDATA_INSTANCE0_SPDIF (ESA_KDATA_BASE_ADDR + 0x0017) +#define ESA_KDATA_INSTANCE_SPDIF_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0018) + +#define ESA_KDATA_INSTANCE0_MODEM (ESA_KDATA_BASE_ADDR + 0x0019) +#define ESA_KDATA_INSTANCE_MODEM_ENDMARK (ESA_KDATA_BASE_ADDR + 0x001A) + +#define ESA_KDATA_INSTANCE0_SRC (ESA_KDATA_BASE_ADDR + 0x001B) +#define ESA_KDATA_INSTANCE1_SRC (ESA_KDATA_BASE_ADDR + 0x001C) +#define ESA_KDATA_INSTANCE_SRC_ENDMARK (ESA_KDATA_BASE_ADDR + 0x001D) + +#define ESA_KDATA_INSTANCE0_MINISRC (ESA_KDATA_BASE_ADDR + 0x001E) +#define ESA_KDATA_INSTANCE1_MINISRC (ESA_KDATA_BASE_ADDR + 0x001F) +#define ESA_KDATA_INSTANCE2_MINISRC (ESA_KDATA_BASE_ADDR + 0x0020) +#define ESA_KDATA_INSTANCE3_MINISRC (ESA_KDATA_BASE_ADDR + 0x0021) +#define ESA_KDATA_INSTANCE_MINISRC_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0022) + +#define ESA_KDATA_INSTANCE0_CPYTHRU (ESA_KDATA_BASE_ADDR + 0x0023) +#define ESA_KDATA_INSTANCE1_CPYTHRU (ESA_KDATA_BASE_ADDR + 0x0024) +#define ESA_KDATA_INSTANCE_CPYTHRU_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0025) + +#define ESA_KDATA_CURRENT_DMA (ESA_KDATA_BASE_ADDR + 0x0026) +#define ESA_KDATA_DMA_SWITCH (ESA_KDATA_BASE_ADDR + 0x0027) +#define ESA_KDATA_DMA_ACTIVE (ESA_KDATA_BASE_ADDR + 0x0028) + +#define ESA_KDATA_DMA_XFER0 (ESA_KDATA_BASE_ADDR + 0x0029) +#define ESA_KDATA_DMA_XFER1 (ESA_KDATA_BASE_ADDR + 0x002A) +#define ESA_KDATA_DMA_XFER2 (ESA_KDATA_BASE_ADDR + 0x002B) +#define ESA_KDATA_DMA_XFER3 (ESA_KDATA_BASE_ADDR + 0x002C) +#define ESA_KDATA_DMA_XFER4 (ESA_KDATA_BASE_ADDR + 0x002D) +#define ESA_KDATA_DMA_XFER5 (ESA_KDATA_BASE_ADDR + 0x002E) +#define ESA_KDATA_DMA_XFER6 (ESA_KDATA_BASE_ADDR + 0x002F) +#define ESA_KDATA_DMA_XFER7 (ESA_KDATA_BASE_ADDR + 0x0030) +#define ESA_KDATA_DMA_XFER8 (ESA_KDATA_BASE_ADDR + 0x0031) +#define ESA_KDATA_DMA_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0032) + +#define ESA_KDATA_I2S_SAMPLE_COUNT (ESA_KDATA_BASE_ADDR + 0x0033) +#define ESA_KDATA_I2S_INT_METER (ESA_KDATA_BASE_ADDR + 0x0034) +#define ESA_KDATA_I2S_ACTIVE (ESA_KDATA_BASE_ADDR + 0x0035) + +#define ESA_KDATA_TIMER_COUNT_RELOAD (ESA_KDATA_BASE_ADDR + 0x0036) +#define ESA_KDATA_TIMER_COUNT_CURRENT (ESA_KDATA_BASE_ADDR + 0x0037) + +#define ESA_KDATA_HALT_SYNCH_CLIENT (ESA_KDATA_BASE_ADDR + 0x0038) +#define ESA_KDATA_HALT_SYNCH_DMA (ESA_KDATA_BASE_ADDR + 0x0039) +#define ESA_KDATA_HALT_ACKNOWLEDGE (ESA_KDATA_BASE_ADDR + 0x003A) + +#define ESA_KDATA_ADC1_XFER0 (ESA_KDATA_BASE_ADDR + 0x003B) +#define ESA_KDATA_ADC1_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x003C) +#define ESA_KDATA_ADC1_LEFT_VOLUME (ESA_KDATA_BASE_ADDR + 0x003D) +#define ESA_KDATA_ADC1_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR + 0x003E) +#define ESA_KDATA_ADC1_LEFT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x003F) +#define ESA_KDATA_ADC1_RIGHT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0040) + +#define ESA_KDATA_ADC2_XFER0 (ESA_KDATA_BASE_ADDR + 0x0041) +#define ESA_KDATA_ADC2_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0042) +#define ESA_KDATA_ADC2_LEFT_VOLUME (ESA_KDATA_BASE_ADDR + 0x0043) +#define ESA_KDATA_ADC2_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR + 0x0044) +#define ESA_KDATA_ADC2_LEFT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0045) +#define ESA_KDATA_ADC2_RIGHT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0046) + +#define ESA_KDATA_CD_XFER0 (ESA_KDATA_BASE_ADDR + 0x0047) +#define ESA_KDATA_CD_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0048) +#define ESA_KDATA_CD_LEFT_VOLUME (ESA_KDATA_BASE_ADDR + 0x0049) +#define ESA_KDATA_CD_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR + 0x004A) +#define ESA_KDATA_CD_LEFT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x004B) +#define ESA_KDATA_CD_RIGHT_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x004C) + +#define ESA_KDATA_MIC_XFER0 (ESA_KDATA_BASE_ADDR + 0x004D) +#define ESA_KDATA_MIC_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x004E) +#define ESA_KDATA_MIC_VOLUME (ESA_KDATA_BASE_ADDR + 0x004F) +#define ESA_KDATA_MIC_SUR_VOL (ESA_KDATA_BASE_ADDR + 0x0050) + +#define ESA_KDATA_I2S_XFER0 (ESA_KDATA_BASE_ADDR + 0x0051) +#define ESA_KDATA_I2S_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0052) + +#define ESA_KDATA_CHI_XFER0 (ESA_KDATA_BASE_ADDR + 0x0053) +#define ESA_KDATA_CHI_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x0054) + +#define ESA_KDATA_SPDIF_XFER (ESA_KDATA_BASE_ADDR + 0x0055) +#define ESA_KDATA_SPDIF_CURRENT_FRAME (ESA_KDATA_BASE_ADDR + 0x0056) +#define ESA_KDATA_SPDIF_FRAME0 (ESA_KDATA_BASE_ADDR + 0x0057) +#define ESA_KDATA_SPDIF_FRAME1 (ESA_KDATA_BASE_ADDR + 0x0058) +#define ESA_KDATA_SPDIF_FRAME2 (ESA_KDATA_BASE_ADDR + 0x0059) + +#define ESA_KDATA_SPDIF_REQUEST (ESA_KDATA_BASE_ADDR + 0x005A) +#define ESA_KDATA_SPDIF_TEMP (ESA_KDATA_BASE_ADDR + 0x005B) + +#define ESA_KDATA_SPDIFIN_XFER0 (ESA_KDATA_BASE_ADDR + 0x005C) +#define ESA_KDATA_SPDIFIN_XFER_ENDMARK (ESA_KDATA_BASE_ADDR + 0x005D) +#define ESA_KDATA_SPDIFIN_INT_METER (ESA_KDATA_BASE_ADDR + 0x005E) + +#define ESA_KDATA_DSP_RESET_COUNT (ESA_KDATA_BASE_ADDR + 0x005F) +#define ESA_KDATA_DEBUG_OUTPUT (ESA_KDATA_BASE_ADDR + 0x0060) + +#define ESA_KDATA_KERNEL_ISR_LIST (ESA_KDATA_BASE_ADDR + 0x0061) + +#define ESA_KDATA_KERNEL_ISR_CBSR1 (ESA_KDATA_BASE_ADDR + 0x0062) +#define ESA_KDATA_KERNEL_ISR_CBER1 (ESA_KDATA_BASE_ADDR + 0x0063) +#define ESA_KDATA_KERNEL_ISR_CBCR (ESA_KDATA_BASE_ADDR + 0x0064) +#define ESA_KDATA_KERNEL_ISR_AR0 (ESA_KDATA_BASE_ADDR + 0x0065) +#define ESA_KDATA_KERNEL_ISR_AR1 (ESA_KDATA_BASE_ADDR + 0x0066) +#define ESA_KDATA_KERNEL_ISR_AR2 (ESA_KDATA_BASE_ADDR + 0x0067) +#define ESA_KDATA_KERNEL_ISR_AR3 (ESA_KDATA_BASE_ADDR + 0x0068) +#define ESA_KDATA_KERNEL_ISR_AR4 (ESA_KDATA_BASE_ADDR + 0x0069) +#define ESA_KDATA_KERNEL_ISR_AR5 (ESA_KDATA_BASE_ADDR + 0x006A) +#define ESA_KDATA_KERNEL_ISR_BRCR (ESA_KDATA_BASE_ADDR + 0x006B) +#define ESA_KDATA_KERNEL_ISR_PASR (ESA_KDATA_BASE_ADDR + 0x006C) +#define ESA_KDATA_KERNEL_ISR_PAER (ESA_KDATA_BASE_ADDR + 0x006D) + +#define ESA_KDATA_CLIENT_SCRATCH0 (ESA_KDATA_BASE_ADDR + 0x006E) +#define ESA_KDATA_CLIENT_SCRATCH1 (ESA_KDATA_BASE_ADDR + 0x006F) +#define ESA_KDATA_KERNEL_SCRATCH (ESA_KDATA_BASE_ADDR + 0x0070) +#define ESA_KDATA_KERNEL_ISR_SCRATCH (ESA_KDATA_BASE_ADDR + 0x0071) + +#define ESA_KDATA_OUEUE_LEFT (ESA_KDATA_BASE_ADDR + 0x0072) +#define ESA_KDATA_QUEUE_RIGHT (ESA_KDATA_BASE_ADDR + 0x0073) + +#define ESA_KDATA_ADC1_REQUEST (ESA_KDATA_BASE_ADDR + 0x0074) +#define ESA_KDATA_ADC2_REQUEST (ESA_KDATA_BASE_ADDR + 0x0075) +#define ESA_KDATA_CD_REQUEST (ESA_KDATA_BASE_ADDR + 0x0076) +#define ESA_KDATA_MIC_REQUEST (ESA_KDATA_BASE_ADDR + 0x0077) + +#define ESA_KDATA_ADC1_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x0078) +#define ESA_KDATA_ADC2_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x0079) +#define ESA_KDATA_CD_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x007A) +#define ESA_KDATA_MIC_MIXER_REQUEST (ESA_KDATA_BASE_ADDR + 0x007B) +#define ESA_KDATA_MIC_SYNC_COUNTER (ESA_KDATA_BASE_ADDR + 0x007C) + +/* + * second 'segment' (?) reserved for mixer + * buffers.. + */ + +#define ESA_KDATA_MIXER_WORD0 (ESA_KDATA_BASE_ADDR2 + 0x0000) +#define ESA_KDATA_MIXER_WORD1 (ESA_KDATA_BASE_ADDR2 + 0x0001) +#define ESA_KDATA_MIXER_WORD2 (ESA_KDATA_BASE_ADDR2 + 0x0002) +#define ESA_KDATA_MIXER_WORD3 (ESA_KDATA_BASE_ADDR2 + 0x0003) +#define ESA_KDATA_MIXER_WORD4 (ESA_KDATA_BASE_ADDR2 + 0x0004) +#define ESA_KDATA_MIXER_WORD5 (ESA_KDATA_BASE_ADDR2 + 0x0005) +#define ESA_KDATA_MIXER_WORD6 (ESA_KDATA_BASE_ADDR2 + 0x0006) +#define ESA_KDATA_MIXER_WORD7 (ESA_KDATA_BASE_ADDR2 + 0x0007) +#define ESA_KDATA_MIXER_WORD8 (ESA_KDATA_BASE_ADDR2 + 0x0008) +#define ESA_KDATA_MIXER_WORD9 (ESA_KDATA_BASE_ADDR2 + 0x0009) +#define ESA_KDATA_MIXER_WORDA (ESA_KDATA_BASE_ADDR2 + 0x000A) +#define ESA_KDATA_MIXER_WORDB (ESA_KDATA_BASE_ADDR2 + 0x000B) +#define ESA_KDATA_MIXER_WORDC (ESA_KDATA_BASE_ADDR2 + 0x000C) +#define ESA_KDATA_MIXER_WORDD (ESA_KDATA_BASE_ADDR2 + 0x000D) +#define ESA_KDATA_MIXER_WORDE (ESA_KDATA_BASE_ADDR2 + 0x000E) +#define ESA_KDATA_MIXER_WORDF (ESA_KDATA_BASE_ADDR2 + 0x000F) + +#define ESA_KDATA_MIXER_XFER0 (ESA_KDATA_BASE_ADDR2 + 0x0010) +#define ESA_KDATA_MIXER_XFER1 (ESA_KDATA_BASE_ADDR2 + 0x0011) +#define ESA_KDATA_MIXER_XFER2 (ESA_KDATA_BASE_ADDR2 + 0x0012) +#define ESA_KDATA_MIXER_XFER3 (ESA_KDATA_BASE_ADDR2 + 0x0013) +#define ESA_KDATA_MIXER_XFER4 (ESA_KDATA_BASE_ADDR2 + 0x0014) +#define ESA_KDATA_MIXER_XFER5 (ESA_KDATA_BASE_ADDR2 + 0x0015) +#define ESA_KDATA_MIXER_XFER6 (ESA_KDATA_BASE_ADDR2 + 0x0016) +#define ESA_KDATA_MIXER_XFER7 (ESA_KDATA_BASE_ADDR2 + 0x0017) +#define ESA_KDATA_MIXER_XFER8 (ESA_KDATA_BASE_ADDR2 + 0x0018) +#define ESA_KDATA_MIXER_XFER9 (ESA_KDATA_BASE_ADDR2 + 0x0019) +#define ESA_KDATA_MIXER_XFER_ENDMARK (ESA_KDATA_BASE_ADDR2 + 0x001A) + +#define ESA_KDATA_MIXER_TASK_NUMBER (ESA_KDATA_BASE_ADDR2 + 0x001B) +#define ESA_KDATA_CURRENT_MIXER (ESA_KDATA_BASE_ADDR2 + 0x001C) +#define ESA_KDATA_MIXER_ACTIVE (ESA_KDATA_BASE_ADDR2 + 0x001D) +#define ESA_KDATA_MIXER_BANK_STATUS (ESA_KDATA_BASE_ADDR2 + 0x001E) +#define ESA_KDATA_DAC_LEFT_VOLUME (ESA_KDATA_BASE_ADDR2 + 0x001F) +#define ESA_KDATA_DAC_RIGHT_VOLUME (ESA_KDATA_BASE_ADDR2 + 0x0020) + +#define ESA_MAX_INSTANCE_MINISRC (ESA_KDATA_INSTANCE_MINISRC_ENDMARK - ESA_KDATA_INSTANCE0_MINISRC) +#define ESA_MAX_VIRTUAL_DMA_CHANNELS (ESA_KDATA_DMA_XFER_ENDMARK - ESA_KDATA_DMA_XFER0) +#define ESA_MAX_VIRTUAL_MIXER_CHANNELS (ESA_KDATA_MIXER_XFER_ENDMARK - ESA_KDATA_MIXER_XFER0) +#define ESA_MAX_VIRTUAL_ADC1_CHANNELS (ESA_KDATA_ADC1_XFER_ENDMARK - ESA_KDATA_ADC1_XFER0) + +/* + * client data area offsets + */ +#define ESA_CDATA_INSTANCE_READY 0x00 + +#define ESA_CDATA_HOST_SRC_ADDRL 0x01 +#define ESA_CDATA_HOST_SRC_ADDRH 0x02 +#define ESA_CDATA_HOST_SRC_END_PLUS_1L 0x03 +#define ESA_CDATA_HOST_SRC_END_PLUS_1H 0x04 +#define ESA_CDATA_HOST_SRC_CURRENTL 0x05 +#define ESA_CDATA_HOST_SRC_CURRENTH 0x06 + +#define ESA_CDATA_IN_BUF_CONNECT 0x07 +#define ESA_CDATA_OUT_BUF_CONNECT 0x08 + +#define ESA_CDATA_IN_BUF_BEGIN 0x09 +#define ESA_CDATA_IN_BUF_END_PLUS_1 0x0A +#define ESA_CDATA_IN_BUF_HEAD 0x0B +#define ESA_CDATA_IN_BUF_TAIL 0x0C +#define ESA_CDATA_OUT_BUF_BEGIN 0x0D +#define ESA_CDATA_OUT_BUF_END_PLUS_1 0x0E +#define ESA_CDATA_OUT_BUF_HEAD 0x0F +#define ESA_CDATA_OUT_BUF_TAIL 0x10 + +#define ESA_CDATA_DMA_CONTROL 0x11 +#define ESA_CDATA_RESERVED 0x12 + +#define ESA_CDATA_FREQUENCY 0x13 +#define ESA_CDATA_LEFT_VOLUME 0x14 +#define ESA_CDATA_RIGHT_VOLUME 0x15 +#define ESA_CDATA_LEFT_SUR_VOL 0x16 +#define ESA_CDATA_RIGHT_SUR_VOL 0x17 + +#define ESA_CDATA_HEADER_LEN 0x18 + +#define ESA_SRC3_DIRECTION_OFFSET ESA_CDATA_HEADER_LEN +#define ESA_SRC3_MODE_OFFSET (ESA_CDATA_HEADER_LEN + 1) +#define ESA_SRC3_WORD_LENGTH_OFFSET (ESA_CDATA_HEADER_LEN + 2) +#define ESA_SRC3_PARAMETER_OFFSET (ESA_CDATA_HEADER_LEN + 3) +#define ESA_SRC3_COEFF_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 8) +#define ESA_SRC3_FILTAP_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 10) +#define ESA_SRC3_TEMP_INBUF_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 16) +#define ESA_SRC3_TEMP_OUTBUF_ADDR_OFFSET (ESA_CDATA_HEADER_LEN + 17) + +#define ESA_MINISRC_IN_BUFFER_SIZE (0x50 * 2) +#define ESA_MINISRC_OUT_BUFFER_SIZE (0x50 * 2 * 2) +#define ESA_MINISRC_OUT_BUFFER_SIZE (0x50 * 2 * 2) +#define ESA_MINISRC_TMP_BUFFER_SIZE (112 + (ESA_MINISRC_BIQUAD_STAGE * 3 + 4) * 2 * 2) +#define ESA_MINISRC_BIQUAD_STAGE 2 +#define ESA_MINISRC_COEF_LOC 0x175 + +#define ESA_DMACONTROL_BLOCK_MASK 0x000F +#define ESA_DMAC_BLOCK0_SELECTOR 0x0000 +#define ESA_DMAC_BLOCK1_SELECTOR 0x0001 +#define ESA_DMAC_BLOCK2_SELECTOR 0x0002 +#define ESA_DMAC_BLOCK3_SELECTOR 0x0003 +#define ESA_DMAC_BLOCK4_SELECTOR 0x0004 +#define ESA_DMAC_BLOCK5_SELECTOR 0x0005 +#define ESA_DMAC_BLOCK6_SELECTOR 0x0006 +#define ESA_DMAC_BLOCK7_SELECTOR 0x0007 +#define ESA_DMAC_BLOCK8_SELECTOR 0x0008 +#define ESA_DMAC_BLOCK9_SELECTOR 0x0009 +#define ESA_DMAC_BLOCKA_SELECTOR 0x000A +#define ESA_DMAC_BLOCKB_SELECTOR 0x000B +#define ESA_DMAC_BLOCKC_SELECTOR 0x000C +#define ESA_DMAC_BLOCKD_SELECTOR 0x000D +#define ESA_DMAC_BLOCKE_SELECTOR 0x000E +#define ESA_DMAC_BLOCKF_SELECTOR 0x000F +#define ESA_DMACONTROL_PAGE_MASK 0x00F0 +#define ESA_DMAC_PAGE0_SELECTOR 0x0030 +#define ESA_DMAC_PAGE1_SELECTOR 0x0020 +#define ESA_DMAC_PAGE2_SELECTOR 0x0010 +#define ESA_DMAC_PAGE3_SELECTOR 0x0000 +#define ESA_DMACONTROL_AUTOREPEAT 0x1000 +#define ESA_DMACONTROL_STOPPED 0x2000 +#define ESA_DMACONTROL_DIRECTION 0x0100 diff --git a/sys/dev/pci/esavar.h b/sys/dev/pci/esavar.h new file mode 100644 index 00000000000..eff4a9ac62c --- /dev/null +++ b/sys/dev/pci/esavar.h @@ -0,0 +1,138 @@ +/* $OpenBSD: esavar.h,v 1.1 2002/04/08 01:47:33 frantzen Exp $ */ +/* $NetBSD: esavar.h,v 1.4 2002/03/16 14:34:01 jmcneill Exp $ */ + +/* + * Copyright (c) 2001, 2002 Jared D. McNeill <jmcneill@invisible.yi.org> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * ESS Allegro-1 / Maestro3 Audio Driver + * + * Based on the FreeBSD maestro3 driver + * + */ + +/* + * Number of simultaneous voices + * + * NOTE: The current code attaches audio0 thru audioESA_NUM_VOICES-1 + * to this driver, and a lot of people probably don't want that. + * So, we'll default to 1 but we'll allow for the possibility of + * more. + * + * The current MINISRC image limits us to a maximum of 4 simultaneous voices. + */ +#ifndef ESA_NUM_VOICES +#define ESA_NUM_VOICES 1 +#endif + +#define KERNADDR(p) ((void *)((p)->addr)) +#define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) + +#define ESA_MINRATE 8000 +#define ESA_MAXRATE 48000 + +struct esa_list { + int currlen; + int mem_addr; + int max; + int indexmap[ESA_NUM_VOICES * 2]; +}; + +struct esa_dma { + bus_dmamap_t map; + caddr_t addr; + bus_dma_segment_t segs[1]; + int nsegs; + size_t size; + struct esa_dma *next; +}; + +struct esa_channel { + int active; + int data_offset; + int index; + size_t bufsize; + int blksize; + int pos; + void *buf; + u_int32_t start; + u_int32_t count; + + /* mode settings */ + struct audio_params mode; + + void (*intr)(void *); + void *arg; +}; + +struct esa_voice { + struct device *parent; /* pointer to our parent */ + struct esa_channel play; + struct esa_channel rec; + struct esa_dma *dma; + int inlist; + int index; /* 0: play, 1: record */ +}; + +struct esa_softc +{ + struct device sc_dev; + bus_space_tag_t sc_iot; + bus_space_handle_t sc_ioh; + bus_addr_t sc_iob; + bus_size_t sc_ios; + + pcitag_t sc_tag; + pci_chipset_tag_t sc_pct; + bus_dma_tag_t sc_dmat; + pcireg_t sc_pcireg; + + void *sc_ih; + + struct ac97_codec_if *codec_if; + struct ac97_host_if host_if; + enum ac97_host_flags codec_flags; + + struct device *sc_audiodev[ESA_NUM_VOICES]; + + struct esa_voice voice[ESA_NUM_VOICES]; + struct esa_dma *sc_dmas; + int count; + + /* timer management */ + int sc_ntimers; + + /* packed list structures */ + struct esa_list mixer_list; + struct esa_list adc1_list; + struct esa_list dma_list; + struct esa_list msrc_list; + + int type; /* Allegro-1 or Maestro 3? */ + int delay1, delay2; + + void *powerhook; + u_int16_t *savemem; +}; |