diff options
author | Stuart Henderson <sthen@cvs.openbsd.org> | 2015-04-13 20:45:50 +0000 |
---|---|---|
committer | Stuart Henderson <sthen@cvs.openbsd.org> | 2015-04-13 20:45:50 +0000 |
commit | bad4cf240d1863775b8d39b524a2a9251edbf226 (patch) | |
tree | 77b2018b3cba63da2c8da9c23df93e00926e7c92 /sys | |
parent | 3940eb858be9f982ea67836918837eacf8854856 (diff) |
Initialize RX/TX on re(4) slightly later; it appears that newer chips
don't setup DMA correctly until more configuration has been done -
enabling RX too soon causes DMA to bad places. KVM corruption problems
reported by Adam Wolk on Lenovo G50-70 (RTL8111GU).
Diff derived by Brad from FreeBSD commit; see bz# 197535 and 193743, inspired by
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=d6e572911a4cb2b9fcd1c26a38d5317a3971f2fd
Tested on the following by Brad, Adam Wolk, box963 at gmail, Jim Smith
re0 at pci4 dev 0 function 0 "Realtek 8168" rev 0x03: RTL8168D/8111D (0x2800), apic 2 int 16, address 00:0a:cd:1a:86:04
re0 at pci2 dev 0 function 0 "Realtek 8168" rev 0x0c: RTL8168G/8111G (0x4c00), msi, address 80:ee:73:76:8e:8a
re0 at pci0 dev 3 function 0 "Realtek 8169" rev 0x10: RTL8110S (0x0400), ivec 0x78c, address 00:22:3f:ee:fa:25
re0 at pci1 dev 0 function 0 "Realtek 8168" rev 0x06: RTL8168E/8111E (0x2c00), msi, address 00:0d:b9:31:2e:88
re0 at pci1 dev 0 function 0 "Realtek 8168" rev 0x10: RTL8168GU/8111GU (0x5080), msi, address 68:f7:28:18:35:8e
ok mpi@ dlg@
Diffstat (limited to 'sys')
-rw-r--r-- | sys/dev/ic/re.c | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/sys/dev/ic/re.c b/sys/dev/ic/re.c index a23e61502fc..c7099caa114 100644 --- a/sys/dev/ic/re.c +++ b/sys/dev/ic/re.c @@ -1,4 +1,4 @@ -/* $OpenBSD: re.c,v 1.177 2015/03/20 12:04:09 dlg Exp $ */ +/* $OpenBSD: re.c,v 1.178 2015/04/13 20:45:49 sthen Exp $ */ /* $FreeBSD: if_re.c,v 1.31 2004/09/04 07:54:05 ru Exp $ */ /* * Copyright (c) 1997, 1998-2003 @@ -1981,11 +1981,6 @@ re_init(struct ifnet *ifp) ~0x00080000); /* - * Enable transmit and receive. - */ - CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB); - - /* * Set the initial TX and RX configuration. */ CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG); @@ -1999,6 +1994,11 @@ re_init(struct ifnet *ifp) rxcfg |= RL_RXCFG_EARLYOFFV2; CSR_WRITE_4(sc, RL_RXCFG, rxcfg); + /* + * Enable transmit and receive. + */ + CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB | RL_CMD_RX_ENB); + /* Program promiscuous mode and multicast filters. */ re_iff(sc); @@ -2010,10 +2010,6 @@ re_init(struct ifnet *ifp) /* Start RX/TX process. */ CSR_WRITE_4(sc, RL_MISSEDPKT, 0); -#ifdef notdef - /* Enable receiver and transmitter. */ - CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB); -#endif /* * For 8169 gigE NICs, set the max allowed RX packet |