Implement correct bus.h functions and our extensions

2 files changed, 89 insertions, 12 deletions

diff --git a/sys/arch/amiga/isa/cross.c b/sys/arch/amiga/isa/cross.c
index e7f758c19f2..22f5fded230 100644
--- a/sys/arch/amiga/isa/cross.c
+++ b/sys/arch/amiga/isa/cross.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cross.c,v 1.4 1996/06/04 13:40:13 niklas Exp $	*/
+/*	$OpenBSD: cross.c,v 1.5 1996/08/04 01:30:48 niklas Exp $	*/
 
 /*
  * Copyright (c) 1994, 1996 Niklas Hallqvist, Carsten Hammer
@@ -74,6 +74,11 @@ void	cross_io_write_multi_1 __P((bus_io_handle_t, bus_io_size_t,
 void	cross_io_write_multi_2 __P((bus_io_handle_t, bus_io_size_t,
 	    const u_int16_t *, bus_io_size_t));
 
+void	cross_io_read_raw_multi_2 __P((bus_io_handle_t, bus_io_size_t,
+	    u_int8_t *, bus_io_size_t));
+void	cross_io_write_raw_multi_2 __P((bus_io_handle_t, bus_io_size_t,
+	    const u_int8_t *, bus_io_size_t));
+
 /*
  * Note that the following unified access functions are prototyped for the
  * I/O access case.  We use casts to get type correctness.
@@ -129,8 +134,11 @@ struct amiga_bus_chipset cross_chipset = {
 	0 /* bc_mem_write_4 */, 0 /* bc_mem_write_8 */,
 
 	/* These are extensions to the general NetBSD bus interface.  */
-	swap, 0 /* bc_to_host_4 */, 0 /* bc_to_host_8 */,
-	swap, 0 /* bc_from_host_4 */, 0 /* bc_from_host_8 */,
+	cross_io_read_raw_multi_2,
+	0 /* bc_io_read_raw_multi_4 */, 0 /* bc_io_read_raw_multi_8 */,
+
+	cross_io_write_raw_multi_2,
+	0 /* bc_io_write_raw_multi_4 */, 0 /* bc_io_write_raw_multi_8 */,
 };
 
 struct cfattach cross_ca = {
@@ -289,6 +297,21 @@ cross_io_read_multi_2(handle, addr, buf, cnt)
 		*buf++ = cross_read_2(handle, addr);
 }
 
+void
+cross_io_read_raw_multi_2(handle, addr, buf, cnt)
+	bus_io_handle_t handle;
+	bus_io_size_t addr;
+	u_int8_t *buf;
+	bus_io_size_t cnt;
+{
+	u_int16_t *buf16 = (u_int16_t *)buf;
+
+	while (cnt) {
+		cnt -= 2;
+		*buf16++ = swap(cross_read_2(handle, addr));
+	}
+}
+
 __inline void
 cross_write_1(handle, addr, val)
 	bus_io_handle_t handle;
@@ -336,6 +359,21 @@ cross_io_write_multi_2(handle, addr, buf, cnt)
 		cross_write_2(handle, addr, *buf++);
 }
 
+void
+cross_io_write_raw_multi_2(handle, addr, buf, cnt)
+	bus_io_handle_t handle;
+	bus_io_size_t addr;
+	const u_int8_t *buf;
+	bus_io_size_t cnt;
+{
+	const u_int16_t *buf16 = (const u_int16_t *)buf;
+
+	while (cnt) {
+		cnt -= 2;
+		cross_write_2(handle, addr, swap(*buf16++));
+	}
+}
+
 static cross_int_map[] = {
     0, 0, 0, 0, CROSS_IRQ3, CROSS_IRQ4, CROSS_IRQ5, CROSS_IRQ6, CROSS_IRQ7, 0,
     CROSS_IRQ9, CROSS_IRQ10, CROSS_IRQ11, CROSS_IRQ12, 0, CROSS_IRQ14,
diff --git a/sys/arch/amiga/isa/ggbus.c b/sys/arch/amiga/isa/ggbus.c
index 970ba20301f..7864220395a 100644
--- a/sys/arch/amiga/isa/ggbus.c
+++ b/sys/arch/amiga/isa/ggbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ggbus.c,v 1.4 1996/06/04 13:40:14 niklas Exp $	*/
+/*	$OpenBSD: ggbus.c,v 1.5 1996/08/04 01:30:49 niklas Exp $	*/
 
 /*
  * Copyright (c) 1994, 1995, 1996 Niklas Hallqvist
@@ -87,6 +87,11 @@ __inline u_int16_t ggbus_read_2 __P((bus_io_handle_t, bus_io_size_t));
 __inline void ggbus_write_1 __P((bus_io_handle_t, bus_io_size_t, u_int8_t));
 __inline void ggbus_write_2 __P((bus_io_handle_t, bus_io_size_t, u_int16_t));
 
+void	ggbus_io_read_raw_multi_2 __P((bus_io_handle_t, bus_io_size_t,
+	    u_int8_t *, bus_io_size_t));
+void	ggbus_io_write_raw_multi_2 __P((bus_io_handle_t, bus_io_size_t,
+	    const u_int8_t *, bus_io_size_t));
+
 /*
  * In order to share the access function implementations for I/O and memory
  * access we cast the functions for the memory access case.  These typedefs
@@ -130,9 +135,11 @@ struct amiga_bus_chipset ggbus1_chipset = {
 	0 /* bc_mem_write_1 */, 0 /* bc_mem_write_2 */,
 	0 /* bc_mem_write_4 */, 0 /* bc_mem_write_8 */,
 
-	/* These are extensions to the general NetBSD bus interface.  */
-	swap, 0 /* bc_to_host_4 */, 0 /* bc_to_host_8 */,
-	swap, 0 /* bc_from_host_4 */, 0 /* bc_from_host_8 */,
+	0 /* bc_io_read_raw_multi_2 */,
+	0 /* bc_io_read_raw_multi_4 */, 0 /* bc_io_read_raw_multi_8 */,
+
+	0 /* bc_io_write_raw_multi_2 */,
+	0 /* bc_io_write_raw_multi_4 */, 0 /* bc_io_write_raw_multi_8 */,
 };
 
 /* Golden Gate II.  */
@@ -155,9 +162,11 @@ struct amiga_bus_chipset ggbus2_chipset = {
 	(bus_mem_write_1_t)ggbus_write_1, (bus_mem_write_2_t)ggbus_write_2,
 	0 /* bc_mem_write_4 */, 0 /* bc_mem_write_8 */,
 
-	/* These are extensions to the general NetBSD bus interface.  */
-	swap, 0 /* bc_to_host_4 */, 0 /* bc_to_host_8 */,
-	swap, 0 /* bc_from_host_4 */, 0 /* bc_from_host_8 */,
+	ggbus_io_read_raw_multi_2,
+	0 /* bc_io_read_raw_multi_4 */, 0 /* bc_io_read_raw_multi_8 */,
+
+	ggbus_io_write_raw_multi_2,
+	0 /* bc_io_write_raw_multi_4 */, 0 /* bc_io_write_raw_multi_8 */,
 };
 
 struct cfattach ggbus_ca = {
@@ -287,7 +296,7 @@ ggbus_read_2(handle, addr)
 	bus_io_handle_t handle;
 	bus_io_size_t addr;
 {
-	return swap(*(volatile u_int16_t *)(handle + 2 * addr));
+	return *(volatile u_int16_t *)(handle + 2 * addr);
 }
 
 void
@@ -312,6 +321,21 @@ ggbus_io_read_multi_2(handle, addr, buf, cnt)
 		*buf++ = ggbus_read_2(handle, addr);
 }
 
+void
+ggbus_io_read_raw_multi_2(handle, addr, buf, cnt)
+	bus_io_handle_t handle;
+	bus_io_size_t addr;
+	u_int8_t *buf;
+	bus_io_size_t cnt;
+{
+	u_int16_t *buf16 = (u_int16_t *)buf;
+
+	while (cnt) {
+		cnt -= 2;
+		*buf16++ = swap(ggbus_read_2(handle, addr));
+	}
+}
+
 __inline void
 ggbus_write_1(handle, addr, val)
 	bus_io_handle_t handle;
@@ -330,7 +354,7 @@ ggbus_write_2(handle, addr, val)
 	bus_io_size_t addr;
 	u_int16_t val;
 {
-	*(volatile u_int16_t *)(handle + 2 * addr) = swap(val);
+	*(volatile u_int16_t *)(handle + 2 * addr) = val;
 }
 
 void
@@ -355,6 +379,21 @@ ggbus_io_write_multi_2(handle, addr, buf, cnt)
 		ggbus_write_2(handle, addr, *buf++);
 }
 
+void
+ggbus_io_write_raw_multi_2(handle, addr, buf, cnt)
+	bus_io_handle_t handle;
+	bus_io_size_t addr;
+	const u_int8_t *buf;
+	bus_io_size_t cnt;
+{
+	const u_int16_t *buf16 = (const u_int16_t *)buf;
+
+	while (cnt) {
+		cnt -= 2;
+		ggbus_write_2(handle, addr, swap(*buf16++));
+	}
+}
+
 static ggbus_int_map[] = {
     0, 0, 0, 0, GG2_IRQ3, GG2_IRQ4, GG2_IRQ5, GG2_IRQ6, GG2_IRQ7, 0,
     GG2_IRQ9, GG2_IRQ10, GG2_IRQ11, GG2_IRQ12, 0, GG2_IRQ14, GG2_IRQ15