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authorAlexander Yurchenko <grange@cvs.openbsd.org>2003-10-16 20:03:41 +0000
committerAlexander Yurchenko <grange@cvs.openbsd.org>2003-10-16 20:03:41 +0000
commitbf80ccfeffcda091c06e3dfc5b627a2b62152da7 (patch)
tree5cc16d91b458be28639e71445af18b8a4b1c7ff6 /sys
parent564ee638bb6d69a70bc2ef088e638a61401d1c97 (diff)
spaces/tabs cleanup
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/ata/atareg.h98
-rw-r--r--sys/dev/ata/atavar.h12
-rw-r--r--sys/dev/ata/wdvar.h14
3 files changed, 62 insertions, 62 deletions
diff --git a/sys/dev/ata/atareg.h b/sys/dev/ata/atareg.h
index 8fa92f70ff7..476599f9e37 100644
--- a/sys/dev/ata/atareg.h
+++ b/sys/dev/ata/atareg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: atareg.h,v 1.9 2003/10/16 10:02:45 grange Exp $ */
+/* $OpenBSD: atareg.h,v 1.10 2003/10/16 20:03:40 grange Exp $ */
/* $NetBSD: atareg.h,v 1.5 1999/01/18 20:06:24 bouyer Exp $ */
#ifndef __DEV_ATA_ATAREG_H__
@@ -13,10 +13,10 @@
struct ataparams {
/* drive info */
u_int16_t atap_config; /* 0: general configuration */
-#define WDC_CFG_ATAPI_MASK 0xc000
-#define WDC_CFG_ATAPI 0x8000
-#define ATA_CFG_REMOVABLE 0x0080
-#define ATA_CFG_FIXED 0x0040
+#define WDC_CFG_ATAPI_MASK 0xc000
+#define WDC_CFG_ATAPI 0x8000
+#define ATA_CFG_REMOVABLE 0x0080
+#define ATA_CFG_FIXED 0x0040
#define ATAPI_CFG_TYPE_MASK 0x1f00
#define ATAPI_CFG_TYPE(x) (((x) & ATAPI_CFG_TYPE_MASK) >> 8)
#define ATAPI_CFG_TYPE_DIRECT 0x00
@@ -24,7 +24,7 @@ struct ataparams {
#define ATAPI_CFG_TYPE_CDROM 0x05
#define ATAPI_CFG_TYPE_OPTICAL 0x07
#define ATAPI_CFG_TYPE_NODEVICE 0x1F
-#define ATAPI_CFG_REMOV 0x0080
+#define ATAPI_CFG_REMOV 0x0080
#define ATAPI_CFG_DRQ_MASK 0x0060
#define ATAPI_CFG_STD_DRQ 0x0000
#define ATAPI_CFG_IRQ_DRQ 0x0020
@@ -50,12 +50,12 @@ struct ataparams {
u_int16_t atap_capabilities1; /* 49: capability flags */
#define WDC_CAP_IORDY 0x0800
#define WDC_CAP_IORDY_DSBL 0x0400
-#define WDC_CAP_LBA 0x0200
-#define WDC_CAP_DMA 0x0100
+#define WDC_CAP_LBA 0x0200
+#define WDC_CAP_DMA 0x0100
#define ATA_CAP_STBY 0x2000
#define ATAPI_CAP_INTERL_DMA 0x8000
#define ATAPI_CAP_CMD_QUEUE 0x4000
-#define ATAPI_CAP_OVERLP 0x2000
+#define ATAPI_CAP_OVERLP 0x2000
#define ATAPI_CAP_ATA_RST 0x1000
u_int16_t atap_capabilities2; /* 50: capability flags (ATA) */
#if BYTE_ORDER == LITTLE_ENDIAN
@@ -81,29 +81,29 @@ struct ataparams {
u_int16_t atap_curmulti; /* 59: current multi-sector setting */
#define WDC_MULTI_VALID 0x0100
#define WDC_MULTI_MASK 0x00ff
- u_int16_t atap_capacity[2]; /* 60-61: total capacity (LBA only) */
+ u_int16_t atap_capacity[2]; /* 60-61: total capacity (LBA only) */
u_int16_t __retired4;
#if BYTE_ORDER == LITTLE_ENDIAN
- u_int8_t atap_dmamode_supp; /* 63: multiword DMA mode supported */
- u_int8_t atap_dmamode_act; /* multiword DMA mode active */
- u_int8_t atap_piomode_supp; /* 64: PIO mode supported */
+ u_int8_t atap_dmamode_supp; /* 63: multiword DMA mode supported */
+ u_int8_t atap_dmamode_act; /* multiword DMA mode active */
+ u_int8_t atap_piomode_supp; /* 64: PIO mode supported */
u_int8_t __junk4;
#else
- u_int8_t atap_dmamode_act; /* multiword DMA mode active */
- u_int8_t atap_dmamode_supp; /* 63: multiword DMA mode supported */
+ u_int8_t atap_dmamode_act; /* multiword DMA mode active */
+ u_int8_t atap_dmamode_supp; /* 63: multiword DMA mode supported */
u_int8_t __junk4;
- u_int8_t atap_piomode_supp; /* 64: PIO mode supported */
+ u_int8_t atap_piomode_supp; /* 64: PIO mode supported */
#endif
u_int16_t atap_dmatiming_mimi; /* 65: minimum DMA cycle time */
u_int16_t atap_dmatiming_recom; /* 66: recomended DMA cycle time */
- u_int16_t atap_piotiming; /* 67: mini PIO cycle time without FC */
+ u_int16_t atap_piotiming; /* 67: mini PIO cycle time without FC */
u_int16_t atap_piotiming_iordy; /* 68: mini PIO cycle time with IORDY FC */
u_int16_t __reserved3[2];
/* words 71-72 are ATAPI only */
u_int16_t atap_pkt_br; /* 71: time (ns) to bus release */
u_int16_t atap_pkt_bsyclr; /* 72: tme to clear BSY after service */
u_int16_t __reserved4[2];
- u_int16_t atap_queuedepth; /* 75: */
+ u_int16_t atap_queuedepth; /* 75: */
#define WDC_QUEUE_DEPTH_MASK 0x1f
u_int16_t atap_sata_caps; /* 76: SATA capabilities */
#define SATA_SIGNAL_GEN1 0x0002 /* SATA Gen-1 signaling speed */
@@ -116,23 +116,23 @@ struct ataparams {
#define SATA_DMA_SETUP_AUTO 0x0004 /* DMA setup auto-activate */
#define SATA_DRIVE_PWR_MGMT 0x0008 /* power management (device) */
u_int16_t atap_sata_features_en; /* 79: SATA features enabled */
- u_int16_t atap_ata_major; /* 80: Major version number */
-#define WDC_VER_ATA1 0x0002
-#define WDC_VER_ATA2 0x0004
-#define WDC_VER_ATA3 0x0008
-#define WDC_VER_ATA4 0x0010
-#define WDC_VER_ATA5 0x0020
-#define WDC_VER_ATA6 0x0040
-#define WDC_VER_ATA7 0x0080
-#define WDC_VER_ATA8 0x0100
-#define WDC_VER_ATA9 0x0200
-#define WDC_VER_ATA10 0x0400
-#define WDC_VER_ATA11 0x0800
-#define WDC_VER_ATA12 0x1000
-#define WDC_VER_ATA13 0x2000
-#define WDC_VER_ATA14 0x4000
- u_int16_t atap_ata_minor; /* 81: Minor version number */
- u_int16_t atap_cmd_set1; /* 82: command set supported */
+ u_int16_t atap_ata_major; /* 80: Major version number */
+#define WDC_VER_ATA1 0x0002
+#define WDC_VER_ATA2 0x0004
+#define WDC_VER_ATA3 0x0008
+#define WDC_VER_ATA4 0x0010
+#define WDC_VER_ATA5 0x0020
+#define WDC_VER_ATA6 0x0040
+#define WDC_VER_ATA7 0x0080
+#define WDC_VER_ATA8 0x0100
+#define WDC_VER_ATA9 0x0200
+#define WDC_VER_ATA10 0x0400
+#define WDC_VER_ATA11 0x0800
+#define WDC_VER_ATA12 0x1000
+#define WDC_VER_ATA13 0x2000
+#define WDC_VER_ATA14 0x4000
+ u_int16_t atap_ata_minor; /* 81: Minor version number */
+ u_int16_t atap_cmd_set1; /* 82: command set supported */
#define WDC_CMD1_NOP 0x4000
#define WDC_CMD1_RB 0x2000
#define WDC_CMD1_WB 0x1000
@@ -147,7 +147,7 @@ struct ataparams {
#define WDC_CMD1_REMOV 0x0004
#define WDC_CMD1_SEC 0x0002
#define WDC_CMD1_SMART 0x0001
- u_int16_t atap_cmd_set2; /* 83: command set supported */
+ u_int16_t atap_cmd_set2; /* 83: command set supported */
#define ATAPI_CMD2_FCE 0x2000 /* Flush Cache Ext supported */
#define ATAPI_CMD2_FC 0x1000 /* Flush Cache supported */
#define ATAPI_CMD2_DCO 0x0800 /* Device Configuration Overlay supported */
@@ -172,11 +172,11 @@ struct ataparams {
u_int16_t atap_cmd_def; /* 87: cmd/features default */
/* bits are NOT the same as atap_cmd_ext */
#if BYTE_ORDER == LITTLE_ENDIAN
- u_int8_t atap_udmamode_supp; /* 88: Ultra-DMA mode supported */
- u_int8_t atap_udmamode_act; /* Ultra-DMA mode active */
+ u_int8_t atap_udmamode_supp; /* 88: Ultra-DMA mode supported */
+ u_int8_t atap_udmamode_act; /* Ultra-DMA mode active */
#else
- u_int8_t atap_udmamode_act; /* Ultra-DMA mode active */
- u_int8_t atap_udmamode_supp; /* 88: Ultra-DMA mode supported */
+ u_int8_t atap_udmamode_act; /* Ultra-DMA mode active */
+ u_int8_t atap_udmamode_supp; /* 88: Ultra-DMA mode supported */
#endif
/* 89-92 are ATA-only */
u_int16_t atap_seu_time; /* 89: Sec. Erase Unit compl. time */
@@ -195,11 +195,11 @@ struct ataparams {
#define ATA_HWRES_D0_CSEL 0x0004 /* Device 0 used CSEL for address */
#define ATA_HWRES_D0_JUMP 0x0002 /* Device 0 jumpered to address */
#if BYTE_ORDER == LITTLE_ENDIAN
- u_int8_t atap_acoustic_val; /* 94: Current acoustic level */
- u_int8_t atap_acoustic_def; /* recommended level */
+ u_int8_t atap_acoustic_val; /* 94: Current acoustic level */
+ u_int8_t atap_acoustic_def; /* recommended level */
#else
- u_int8_t atap_acoustic_def; /* recommended level */
- u_int8_t atap_acoustic_val; /* 94: Current acoustic level */
+ u_int8_t atap_acoustic_def; /* recommended level */
+ u_int8_t atap_acoustic_val; /* 94: Current acoustic level */
#endif
u_int16_t __reserved6[5]; /* 95-99: reserved */
u_int16_t atap_max_lba[4]; /* 100-103: Max. user LBA add */
@@ -217,7 +217,7 @@ struct ataparams {
#define WDC_SEC_SUPP 0x0001
u_int16_t __reserved8[31]; /* 129-159: vendor specific */
u_int16_t atap_cfa_power; /* 160: CFA powermode */
-#define ATAPI_CFA_MAX_MASK 0x0FFF
+#define ATAPI_CFA_MAX_MASK 0x0FFF
#define ATAPI_CFA_MODE1_DIS 0x1000 /* CFA Mode 1 Disabled */
#define ATAPI_CFA_MODE1_REQ 0x2000 /* CFA Mode 1 Required */
#define ATAPI_CFA_WORD160 0x8000 /* Word 160 supported */
@@ -225,11 +225,11 @@ struct ataparams {
u_int8_t atap_media_serial[60]; /* 176-205: media serial number */
u_int16_t __reserved10[49]; /* 206-254: reserved */
#if BYTE_ORDER == LITTLE_ENDIAN
- u_int8_t atap_signature; /* 255: Signature */
- u_int8_t atap_checksum; /* Checksum */
+ u_int8_t atap_signature; /* 255: Signature */
+ u_int8_t atap_checksum; /* Checksum */
#else
- u_int8_t atap_checksum; /* Checksum */
- u_int8_t atap_signature; /* 255: Signature */
+ u_int8_t atap_checksum; /* Checksum */
+ u_int8_t atap_signature; /* 255: Signature */
#endif
};
diff --git a/sys/dev/ata/atavar.h b/sys/dev/ata/atavar.h
index e63c344f69a..506573d6631 100644
--- a/sys/dev/ata/atavar.h
+++ b/sys/dev/ata/atavar.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: atavar.h,v 1.14 2003/09/28 21:01:42 grange Exp $ */
+/* $OpenBSD: atavar.h,v 1.15 2003/10/16 20:03:40 grange Exp $ */
/* $NetBSD: atavar.h,v 1.13 1999/03/10 13:11:43 bouyer Exp $ */
/*
@@ -148,9 +148,9 @@ struct wdc_command {
#define AT_TIMEOU 0x0080 /* command timed out */
#define AT_DF 0x0100 /* Drive fault */
#define AT_READREG 0x0200 /* Read registers on completion */
- int timeout; /* timeout (in ms) */
+ int timeout; /* timeout (in ms) */
void *data; /* Data buffer address */
- int bcount; /* number of bytes to transfer */
+ int bcount; /* number of bytes to transfer */
void (*callback)(void *); /* command to call once command completed */
void *callback_arg; /* argument passed to *callback() */
};
@@ -158,8 +158,8 @@ struct wdc_command {
extern int at_poll;
int wdc_exec_command(struct ata_drive_datas *, struct wdc_command*);
-#define WDC_COMPLETE 0x01
-#define WDC_QUEUED 0x02
+#define WDC_COMPLETE 0x01
+#define WDC_QUEUED 0x02
#define WDC_TRY_AGAIN 0x03
void wdc_probe_caps(struct ata_drive_datas*, struct ataparams *);
@@ -173,7 +173,7 @@ void wdc_ata_delref(struct ata_drive_datas *);
void wdc_ata_kill_pending(struct ata_drive_datas *);
int ata_get_params(struct ata_drive_datas*, u_int8_t,
- struct ataparams *);
+ struct ataparams *);
int ata_set_mode(struct ata_drive_datas*, u_int8_t, u_int8_t);
/* return code for these cmds */
#define CMD_OK 0
diff --git a/sys/dev/ata/wdvar.h b/sys/dev/ata/wdvar.h
index 41ea3770d1a..11731287c45 100644
--- a/sys/dev/ata/wdvar.h
+++ b/sys/dev/ata/wdvar.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: wdvar.h,v 1.8 2003/09/28 21:01:42 grange Exp $ */
+/* $OpenBSD: wdvar.h,v 1.9 2003/10/16 20:03:40 grange Exp $ */
/* $NetBSD: wdvar.h,v 1.3 1998/11/11 19:38:27 bouyer Exp $ */
/*
@@ -52,11 +52,11 @@ struct ata_bio {
long bcount; /* total number of bytes */
char *databuf; /* data buffer adress */
volatile int error;
-#define NOERROR 0 /* There was no error (r_error invalid) */
-#define ERROR 1 /* check r_error */
-#define ERR_DF 2 /* Drive fault */
-#define ERR_DMA 3 /* DMA error */
-#define TIMEOUT 4 /* device timed out */
+#define NOERROR 0 /* There was no error (r_error invalid) */
+#define ERROR 1 /* check r_error */
+#define ERR_DF 2 /* Drive fault */
+#define ERR_DMA 3 /* DMA error */
+#define TIMEOUT 4 /* device timed out */
#define ERR_NODEV 5 /* device bas been detached */
u_int8_t r_error; /* copy of error register */
daddr_t badsect[127]; /* 126 plus trailing -1 marker */
@@ -66,7 +66,7 @@ struct ata_bio {
/* drive states stored in ata_drive_datas */
#define RECAL 0
#define RECAL_WAIT 1
-#define PIOMODE 2
+#define PIOMODE 2
#define PIOMODE_WAIT 3
#define DMAMODE 4
#define DMAMODE_WAIT 5
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-19 00:28:50 +0000