diff options
author | Jonathan Gray <jsg@cvs.openbsd.org> | 2023-08-16 07:26:06 +0000 |
---|---|---|
committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2023-08-16 07:26:06 +0000 |
commit | e369555b24c8421b46ebe65fda6633cc229dae11 (patch) | |
tree | 01cf946fae8a4b64c3e8cdd1fea1c3db89165fbe /sys | |
parent | 4dabe284befd394dc597c768306bbd4fa9abfbf7 (diff) |
avoid patch level msr on amd families < 0fh
Paul de Weerd reported it isn't implemented on ALIX with
cpu0: Geode(TM) Integrated Processor by AMD PCS ("AuthenticAMD" 586-class) 499 MHz, 05-0a-02
the earliest amd microcode update files I can find are for family 0fh (K8)
ok guenther@
Diffstat (limited to 'sys')
-rw-r--r-- | sys/arch/i386/i386/machdep.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c index 8f943685c82..7bbefdfcd6c 100644 --- a/sys/arch/i386/i386/machdep.c +++ b/sys/arch/i386/i386/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.666 2023/08/09 00:01:44 jsg Exp $ */ +/* $OpenBSD: machdep.c,v 1.667 2023/08/16 07:26:05 jsg Exp $ */ /* $NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $ */ /*- @@ -1863,7 +1863,8 @@ identifycpu(struct cpu_info *ci) uint64_t level = 0; uint32_t dummy; - if (strcmp(cpu_vendor, "AuthenticAMD") == 0) { + if (strcmp(cpu_vendor, "AuthenticAMD") == 0 && + ci->ci_family >= 0x0f) { level = rdmsr(MSR_PATCH_LEVEL); } else if (strcmp(cpu_vendor, "GenuineIntel") == 0) { wrmsr(MSR_BIOS_SIGN, 0); |