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authorMark Kettenis <kettenis@cvs.openbsd.org>2017-10-24 17:06:52 +0000
committerMark Kettenis <kettenis@cvs.openbsd.org>2017-10-24 17:06:52 +0000
commitf2f07b61011a2bc77e821efe33cace7e4532dde5 (patch)
treec4611ba130b7abbaa3567e1eb7cfec9e70747e00 /sys
parent93eacccd24690707631fd70aefc638c09d559921 (diff)
Use "static inline" instead of "extern inline" for compatibility with
proper C99 compilers. ok deraadt@, visa@, mpi@
Diffstat (limited to 'sys')
-rw-r--r--sys/arch/sparc64/include/ctlreg.h38
-rw-r--r--sys/arch/sparc64/include/psl.h37
2 files changed, 36 insertions, 39 deletions
diff --git a/sys/arch/sparc64/include/ctlreg.h b/sys/arch/sparc64/include/ctlreg.h
index 09457821cb9..407162b6f01 100644
--- a/sys/arch/sparc64/include/ctlreg.h
+++ b/sys/arch/sparc64/include/ctlreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: ctlreg.h,v 1.28 2017/05/25 03:19:39 dlg Exp $ */
+/* $OpenBSD: ctlreg.h,v 1.29 2017/10/24 17:06:51 kettenis Exp $ */
/* $NetBSD: ctlreg.h,v 1.28 2001/08/06 23:55:34 eeh Exp $ */
/*
@@ -528,8 +528,8 @@ do { \
#define sparc_rd(name) sparc_rd_ ## name()
#define GEN_RD(name) \
-extern __inline u_int64_t sparc_rd_ ## name(void); \
-extern __inline u_int64_t \
+static inline u_int64_t sparc_rd_ ## name(void); \
+static inline u_int64_t \
sparc_rd_ ## name() \
{ \
u_int64_t r; \
@@ -540,8 +540,8 @@ sparc_rd_ ## name() \
#define sparc_rdpr(name) sparc_rdpr_ ## name()
#define GEN_RDPR(name) \
-extern __inline u_int64_t sparc_rdpr_ ## name(void); \
-extern __inline u_int64_t \
+static inline u_int64_t sparc_rdpr_ ## name(void); \
+static inline u_int64_t \
sparc_rdpr_ ## name() \
{ \
u_int64_t r; \
@@ -573,8 +573,8 @@ GEN_RDPR(ver);
/* Generate ld*a/st*a functions for non-constant ASI's. */
#define LDNC_GEN(tp, o) \
- extern __inline tp o ## _asi(paddr_t); \
- extern __inline tp \
+ static inline tp o ## _asi(paddr_t); \
+ static inline tp \
o ## _asi(paddr_t va) \
{ \
tp r; \
@@ -585,8 +585,8 @@ GEN_RDPR(ver);
: "%g0"); \
return (r); \
} \
- extern __inline tp o ## _nc(paddr_t, int); \
- extern __inline tp \
+ static inline tp o ## _nc(paddr_t, int); \
+ static inline tp \
o ## _nc(paddr_t va, int asi) \
{ \
sparc_wr(asi, asi, 0); \
@@ -626,8 +626,8 @@ LDNC_GEN(int, lda);
#define ldxa(va, asi) LD_GENERIC(va, asi, ldx, u_int64_t)
#define STNC_GEN(tp, o) \
- extern __inline void o ## _asi(paddr_t, tp); \
- extern __inline void \
+ static inline void o ## _asi(paddr_t, tp); \
+ static inline void \
o ## _asi(paddr_t va, tp val) \
{ \
__asm volatile( \
@@ -636,8 +636,8 @@ LDNC_GEN(int, lda);
: "r" (val), "r" ((volatile tp *)va) \
: "memory"); \
} \
- extern __inline void o ## _nc(paddr_t, int, tp); \
- extern __inline void \
+ static inline void o ## _nc(paddr_t, int, tp); \
+ static inline void \
o ## _nc(paddr_t va, int asi, tp val) \
{ \
sparc_wr(asi, asi, 0); \
@@ -675,23 +675,23 @@ STNC_GEN(u_int, sta);
#define stxa(va, asi, val) ST_GENERIC(va, asi, val, stx, u_int64_t)
-extern __inline void asi_set(int);
-extern __inline
+static inline void asi_set(int);
+static inline
void asi_set(int asi)
{
sparc_wr(asi, asi, 0);
}
-extern __inline u_int8_t asi_get(void);
-extern __inline
+static inline u_int8_t asi_get(void);
+static inline
u_int8_t asi_get(void)
{
return sparc_rd(asi);
}
/* flush address from instruction cache */
-extern __inline void flush(void *);
-extern __inline
+static inline void flush(void *);
+static inline
void flush(void *p)
{
__asm volatile("flush %0"
diff --git a/sys/arch/sparc64/include/psl.h b/sys/arch/sparc64/include/psl.h
index 26c93ce4368..b8c549a0251 100644
--- a/sys/arch/sparc64/include/psl.h
+++ b/sys/arch/sparc64/include/psl.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: psl.h,v 1.32 2017/05/25 03:19:39 dlg Exp $ */
+/* $OpenBSD: psl.h,v 1.33 2017/10/24 17:06:51 kettenis Exp $ */
/* $NetBSD: psl.h,v 1.20 2001/04/13 23:30:05 thorpej Exp $ */
/*
@@ -229,9 +229,6 @@
#if defined(_KERNEL) && !defined(_LOCORE)
extern u_int64_t ver; /* Copy of v9 version register. We need to read this only once, in locore.s. */
-#ifndef SPLDEBUG
-extern __inline void splx(int);
-#endif
#ifdef DIAGNOSTIC
/*
@@ -255,42 +252,42 @@ void splassert_check(int, const char *);
/*
* GCC pseudo-functions for manipulating privileged registers
*/
-extern __inline u_int64_t getpstate(void);
-extern __inline
+static inline u_int64_t getpstate(void);
+static inline
u_int64_t getpstate(void)
{
return (sparc_rdpr(pstate));
}
-extern __inline void setpstate(u_int64_t);
-extern __inline void setpstate(u_int64_t newpstate)
+static inline void setpstate(u_int64_t);
+static inline void setpstate(u_int64_t newpstate)
{
sparc_wrpr(pstate, newpstate, 0);
}
-extern __inline int getcwp(void);
-extern __inline
+static inline int getcwp(void);
+static inline
int getcwp(void)
{
return (sparc_rdpr(cwp));
}
-extern __inline void setcwp(u_int64_t);
-extern __inline void
+static inline void setcwp(u_int64_t);
+static inline void
setcwp(u_int64_t newcwp)
{
sparc_wrpr(cwp, newcwp, 0);
}
-extern __inline u_int64_t getver(void);
-extern __inline
+static inline u_int64_t getver(void);
+static inline
u_int64_t getver(void)
{
return (sparc_rdpr(ver));
}
-extern __inline u_int64_t intr_disable(void);
-extern __inline u_int64_t
+static inline u_int64_t intr_disable(void);
+static inline u_int64_t
intr_disable(void)
{
u_int64_t s;
@@ -300,15 +297,15 @@ intr_disable(void)
return (s);
}
-extern __inline void intr_restore(u_int64_t);
-extern __inline void
+static inline void intr_restore(u_int64_t);
+static inline void
intr_restore(u_int64_t s)
{
sparc_wrpr(pstate, s, 0);
}
-extern __inline void stxa_sync(u_int64_t, u_int64_t, u_int64_t);
-extern __inline void
+static inline void stxa_sync(u_int64_t, u_int64_t, u_int64_t);
+static inline void
stxa_sync(u_int64_t va, u_int64_t asi, u_int64_t val)
{
u_int64_t s = intr_disable();