On IP30 and IP35 systems, try harder to figure out exactly what model we are

running on, and report this both as the hw.product sysctl and in dmesg.
Fuel and Origin 350 are no longer reported as being Origin 300 systems!

10 files changed, 165 insertions, 34 deletions

diff --git a/sys/arch/sgi/pci/iocreg.h b/sys/arch/sgi/pci/iocreg.h
index 6f28557cfa5..c9c2fa54909 100644
--- a/sys/arch/sgi/pci/iocreg.h
+++ b/sys/arch/sgi/pci/iocreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: iocreg.h,v 1.3 2009/08/18 19:32:47 miod Exp $	*/
+/*	$OpenBSD: iocreg.h,v 1.4 2009/10/14 20:21:14 miod Exp $	*/
 
 /*
  * Copyright (c) 2008 Joel Sing.
@@ -29,11 +29,36 @@
 #define IOCDEV_RTC		4
 #define IOCDEV_EF		5
 
-#define IOC3_SIO_IR		0x0000001c
-#define IOC3_SIO_IES		0x00000020
-#define IOC3_SIO_IEC		0x00000024
-#define IOC3_SIO_CR		0x00000028
-#define	IOC3_MCR		0x00000030
+/* SuperIO registers */
+#define IOC3_SIO_IR		0x0000001c	/* SIO interrupt register */
+#define IOC3_SIO_IES		0x00000020	/* SIO interrupt enable */
+#define IOC3_SIO_IEC		0x00000024	/* SIO interrupt disable */
+#define IOC3_SIO_CR		0x00000028	/* SIO control register */
+#define	IOC3_MCR		0x00000030	/* MicroLan control register */
+
+/* GPIO registers */
+#define	IOC3_GPCR_S		0x00000034	/* GPIO control bit set */
+#define	IOC3_GPCR_C		0x00000038	/* GPIO control bit clear */
+#define	IOC3_GPDR		0x0000003c	/* GPIO data */
+#define	IOC3_GPPR_BASE		0x00000040	/* 9 GPIO pin registers */
+#define	IOC3_GPPR(x)		(IOC3_GPPR_BASE + (x) * 4)
+
+/* Non-16550 mode UART registers */
+#define	IOC3_UARTA_SSCR		0x000000b8	/* control register */
+#define	IOC3_UARTA_STPIR	0x000000bc	/* TX producer index register */
+#define	IOC3_UARTA_STCIR	0x000000c0	/* TX consumer index register */
+#define	IOC3_UARTA_SRPIR	0x000000c4	/* RX producer index register */
+#define	IOC3_UARTA_SRCIR	0x000000c8	/* RX consumer index register */
+#define	IOC3_UARTA_SRTR		0x000000cc	/* receive timer register */
+#define	IOC3_UARTA_SHADOW	0x000000d0	/* 16550 shadow register */
+
+#define	IOC3_UARTB_SSCR		0x000000d4
+#define	IOC3_UARTB_STPIR	0x000000d8
+#define	IOC3_UARTB_STCIR	0x000000dc
+#define	IOC3_UARTB_SRPIR	0x000000e0
+#define	IOC3_UARTB_SRCIR	0x000000e4
+#define	IOC3_UARTB_SRTR		0x000000e8
+#define	IOC3_UARTB_SHADOW	0x000000ec
 
 /* bits in the SIO interrupt register */
 #define	IOC3_IRQ_UARTA		0x00000040	/* UART A passthrough */
@@ -41,6 +66,14 @@
 #define	IOC3_IRQ_LPT		0x00040000	/* parallel port passthrough */
 #define	IOC3_IRQ_KBC		0x00400000	/* keyboard controller */
 
+/* bits in GPCR */
+#define	IOC3_GPCR_UARTA_PIO	0x00000040	/* UARTA in PIO mode */
+#define	IOC3_GPCR_UARTB_PIO	0x00000080	/* UARTB in PIO mode */
+#define	IOC3_GPCR_MLAN		0x00200000	/* MicroLan enable */
+
+/* bits in SSCR */
+#define	IOC3_SSCR_RESET		0x80000000
+
 #define	IOC3_LPT_BASE		0x00000080
 #define	IOC3_LPT_SIZE		0x0000001c
 
diff --git a/sys/arch/sgi/sgi/ip27_machdep.c b/sys/arch/sgi/sgi/ip27_machdep.c
index 8447e67cd2e..7e52f6828b1 100644
--- a/sys/arch/sgi/sgi/ip27_machdep.c
+++ b/sys/arch/sgi/sgi/ip27_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ip27_machdep.c,v 1.21 2009/10/07 08:35:47 syuu Exp $	*/
+/*	$OpenBSD: ip27_machdep.c,v 1.22 2009/10/14 20:21:16 miod Exp $	*/
 
 /*
  * Copyright (c) 2008, 2009 Miodrag Vallat.
@@ -47,6 +47,8 @@
 
 #include <dev/ic/comvar.h>
 
+extern char *hw_prod;
+
 extern void (*md_halt)(int);
 
 paddr_t	ip27_widget_short(int16_t, u_int);
@@ -81,6 +83,8 @@ ip27_setup()
 	size_t gsz;
 	uint node;
 	uint32_t ctrl;
+	uint64_t synergy0_0;
+	int brick;
 	nmi_t *nmi;
 
 	uncached_base = PHYS_TO_XKPHYS_UNCACHED(0, SP_NC);
@@ -88,6 +92,42 @@ ip27_setup()
 
 	ip35 = sys_config.system_type == SGI_O300;
 
+	if (ip35) {
+		/*
+		 * Get brick model type.
+		 * We need to access the Synergy registers through the remote
+		 * HUB interface, local access is protected on some models.
+		 * Synergy0 register #0 is a 16 bits identification register.
+		 */
+		synergy0_0 = IP27_RHSPEC_L(0, HSPEC_SYNERGY(0, 0));
+		brick = (synergy0_0 & 0xf000) >> 12;
+		switch (brick) {
+		case 0x02:	/* Chimera */
+			hw_prod = "Origin 350";
+			break;
+		case 0x04:	/* Asterix */
+			hw_prod = "Fuel";
+			break;
+		case 0x08:	/* Speedo2 */
+			hw_prod = "Origin 300";
+			break;
+		default:
+		    {
+			static char unknown_model[20];
+			snprintf(unknown_model, sizeof unknown_model,
+			    "Unknown IP35 type %x", brick);
+			hw_prod = unknown_model;
+		    }
+			break;
+		}
+	} else {
+		/*
+		 * XXX need to look for Sn00 type in LBOOT space to tell
+		 * XXX Origin 2000 and Origin 200 apart.
+		 */
+		hw_prod = "Origin 200";
+	}
+
 	xbow_widget_base = ip27_widget_short;
 	xbow_widget_map = ip27_widget_map;
 	xbow_widget_id = ip27_widget_id;
@@ -679,7 +719,7 @@ ip27_hub_do_pending_int(int newcpl)
 	__asm__ (" .set noreorder\n");
 	ci->ci_cpl = newcpl;
 	__asm__ (" sync\n .set reorder\n");
-	if(CPU_IS_PRIMARY(ci))
+	if (CPU_IS_PRIMARY(ci))
 		hw_setintrmask(newcpl);
 	/* If we still have softints pending trigger processing. */
 	if (ci->ci_ipending & SINT_ALLMASK & ~newcpl)
diff --git a/sys/arch/sgi/sgi/ip30.h b/sys/arch/sgi/sgi/ip30.h
index cc9af4b67f5..ec49844d798 100644
--- a/sys/arch/sgi/sgi/ip30.h
+++ b/sys/arch/sgi/sgi/ip30.h
@@ -1,7 +1,7 @@
-/*	$OpenBSD: ip30.h,v 1.1 2008/04/07 22:43:45 miod Exp $	*/
+/*	$OpenBSD: ip30.h,v 1.2 2009/10/14 20:21:16 miod Exp $	*/
 
 /*
- * Copyright (c) 2008 Miodrag Vallat.
+ * Copyright (c) 2008, 2009 Miodrag Vallat.
  *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
@@ -16,5 +16,23 @@
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
+/*
+ * Physical memory on Octane starts at 512MB.
+ *
+ * This allows the small windows of all widgets to appear under physical
+ * memory, and the Bridge window (#f) to sport the machine PROM at the
+ * physical address where the CPU expects it on reset.
+ */
+
 #define	IP30_MEMORY_BASE		0x20000000
 #define	IP30_MEMORY_ARCBIOS_LIMIT	0x40000000
+
+/*
+ * On-board IOC3 specific GPIO registers wiring
+ */
+
+/* LED bar control: 0 to dim, 1 to lit */
+#define	IP30_GPIO_WHITE_LED		0
+#define	IP30_GPIO_RED_LED		1
+/* Classic Octane (1) vs Octane 2 (0), read only */
+#define	IP30_GPIO_CLASSIC		2
diff --git a/sys/arch/sgi/sgi/ip30_machdep.c b/sys/arch/sgi/sgi/ip30_machdep.c
index 55df4a85791..56f7984e9bd 100644
--- a/sys/arch/sgi/sgi/ip30_machdep.c
+++ b/sys/arch/sgi/sgi/ip30_machdep.c
@@ -1,7 +1,7 @@
-/*	$OpenBSD: ip30_machdep.c,v 1.9 2009/08/18 19:31:56 miod Exp $	*/
+/*	$OpenBSD: ip30_machdep.c,v 1.10 2009/10/14 20:21:16 miod Exp $	*/
 
 /*
- * Copyright (c) 2008 Miodrag Vallat.
+ * Copyright (c) 2008, 2009 Miodrag Vallat.
  *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
@@ -43,6 +43,8 @@
 
 #include <dev/ic/comvar.h>
 
+extern char *hw_prod;
+
 paddr_t	ip30_widget_short(int16_t, u_int);
 paddr_t	ip30_widget_long(int16_t, u_int);
 paddr_t	ip30_widget_map(int16_t, u_int, bus_addr_t *, bus_size_t *);
@@ -57,6 +59,7 @@ ip30_setup()
 	uint32_t memcfg;
 	uint64_t start, count;
 #endif
+	paddr_t iocbase;
 
 	/*
 	 * Although being r10k/r12k based, the uncached spaces are
@@ -100,18 +103,15 @@ ip30_setup()
 
 	/*
 	 * Initialize the early console parameters.
-	 * This assumes BRIDGE is on widget 15 and IOC3 is mapped in
-	 * memory space at address 0x500000.
-	 *
-	 * XXX And that 0x500000 should be computed from the first BAR
-	 * XXX of the IOC3 in pci configuration space. Joy. I'll get there
-	 * XXX eventually.
+	 * On Octane, the BRIDGE is always widet 15, and IOC3 is always
+	 * mapped in memory space at address 0x500000.
 	 *
 	 * Also, note that by using a direct widget bus_space, there is
 	 * no endianness conversion done on the bus addresses. Which is
 	 * exactly what we need, since the IOC3 doesn't need any. Some
 	 * may consider this an evil abuse of bus_space knowledge, though.
 	 */
+
 	xbow_build_bus_space(&sys_config.console_io, 0, 15);
 	sys_config.console_io.bus_base = ip30_widget_long(0, 15) +
 	    BRIDGE_PCI0_MEM_SPACE_BASE;
@@ -119,6 +119,16 @@ ip30_setup()
 	comconsaddr = 0x500000 + IOC3_UARTA_BASE;
 	comconsfreq = 22000000 / 3;
 	comconsiot = &sys_config.console_io;
+
+	/*
+	 * Octane and Octane2 can be told apart with a GPIO source bit
+	 * in the onboard IOC3.
+	 */
+	iocbase = ip30_widget_long(0, 15) + 0x500000;
+	if (*(volatile uint32_t *)(iocbase + IOC3_GPPR(IP30_GPIO_CLASSIC)) != 0)
+		hw_prod = "Octane";
+	else
+		hw_prod = "Octane2";
 }
 
 /*
diff --git a/sys/arch/sgi/sgi/ip32_machdep.c b/sys/arch/sgi/sgi/ip32_machdep.c
index 72fc6542985..ff271e3b424 100644
--- a/sys/arch/sgi/sgi/ip32_machdep.c
+++ b/sys/arch/sgi/sgi/ip32_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ip32_machdep.c,v 1.6 2009/05/21 16:28:12 miod Exp $ */
+/*	$OpenBSD: ip32_machdep.c,v 1.7 2009/10/14 20:21:16 miod Exp $ */
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -48,6 +48,8 @@
 
 #include <dev/ic/comvar.h>
 
+extern char *hw_prod;
+
 void crime_configure_memory(void);
 
 void
@@ -145,4 +147,7 @@ ip32_setup()
 	comconsaddr = MACE_ISA_SER1_OFFS;
 	comconsfreq = 1843200;
 	comconsiot = &macebus_tag;
+
+	/* not sure if there is a way to tell O2 and O2+ apart */
+	hw_prod = "O2";
 }
diff --git a/sys/arch/sgi/sgi/machdep.c b/sys/arch/sgi/sgi/machdep.c
index d941ce5f241..eb16254a97b 100644
--- a/sys/arch/sgi/sgi/machdep.c
+++ b/sys/arch/sgi/sgi/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.83 2009/09/30 06:22:00 syuu Exp $ */
+/*	$OpenBSD: machdep.c,v 1.84 2009/10/14 20:21:16 miod Exp $ */
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -144,7 +144,7 @@ mips_init(int argc, void *argv, caddr_t boot_esym)
 	vaddr_t tlb_handler, xtlb_handler;
 	extern char start[], edata[], end[];
 	extern char exception[], e_exception[];
-	extern char *hw_vendor, *hw_prod;
+	extern char *hw_vendor;
 	extern void tlb_miss;
 	extern void tlb_miss_err_r5k;
 	extern void xtlb_miss;
@@ -217,7 +217,6 @@ mips_init(int argc, void *argv, caddr_t boot_esym)
 #if defined(TGT_O2)
 	case SGI_O2:
 		bios_printf("Found SGI-IP32, setting up.\n");
-		hw_prod = "O2";
 		strlcpy(cpu_model, "IP32", sizeof(cpu_model));
 		ip32_setup();
 
@@ -232,7 +231,6 @@ mips_init(int argc, void *argv, caddr_t boot_esym)
 #if defined(TGT_ORIGIN200) || defined(TGT_ORIGIN2000)
 	case SGI_O200:
 		bios_printf("Found SGI-IP27, setting up.\n");
-		hw_prod = "Origin 200";
 		strlcpy(cpu_model, "IP27", sizeof(cpu_model));
 		ip27_setup();
 
@@ -240,7 +238,6 @@ mips_init(int argc, void *argv, caddr_t boot_esym)
 
 	case SGI_O300:
 		bios_printf("Found SGI-IP35, setting up.\n");
-		hw_prod = "Origin 300";
 		/* IP27 is intentional, we use the same kernel */
 		strlcpy(cpu_model, "IP27", sizeof(cpu_model));
 		ip27_setup();
@@ -251,7 +248,6 @@ mips_init(int argc, void *argv, caddr_t boot_esym)
 #if defined(TGT_OCTANE)
 	case SGI_OCTANE:
 		bios_printf("Found SGI-IP30, setting up.\n");
-		hw_prod = "Octane";
 		strlcpy(cpu_model, "IP30", sizeof(cpu_model));
 		ip30_setup();
 
@@ -366,7 +362,6 @@ mips_init(int argc, void *argv, caddr_t boot_esym)
 			uvm_page_physload(fp, lp, fp, lp, freelist);
 	}
 
-
 	switch (sys_config.system_type) {
 #if defined(TGT_O2) || defined(TGT_OCTANE)
 	case SGI_O2:
diff --git a/sys/arch/sgi/sgi/mainbus.c b/sys/arch/sgi/sgi/mainbus.c
index 3828b6d521b..7780da007a9 100644
--- a/sys/arch/sgi/sgi/mainbus.c
+++ b/sys/arch/sgi/sgi/mainbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mainbus.c,v 1.1 2009/06/13 21:48:03 miod Exp $ */
+/*	$OpenBSD: mainbus.c,v 1.2 2009/10/14 20:21:16 miod Exp $ */
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -62,7 +62,10 @@ void
 mbattach(struct device *parent, struct device *self, void *aux)
 {
 	struct confargs nca;
+	extern char *hw_prod;
 
+	if (hw_prod != NULL)
+		printf(": %s", hw_prod);
 	printf("\n");
 
 	/*
diff --git a/sys/arch/sgi/xbow/hub.h b/sys/arch/sgi/xbow/hub.h
index a1754183e55..e80ea8dd508 100644
--- a/sys/arch/sgi/xbow/hub.h
+++ b/sys/arch/sgi/xbow/hub.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: hub.h,v 1.4 2009/07/06 22:46:43 miod Exp $	*/
+/*	$OpenBSD: hub.h,v 1.5 2009/10/14 20:21:16 miod Exp $	*/
 
 /*
  * Copyright (c) 2009 Miodrag Vallat.
@@ -40,12 +40,39 @@
 #define IP27_RHUB_PI_L(n, s, r)		*(IP27_RHUB_PI_ADDR((n), (s), (r)))
 #define	IP27_RHUB_PI_S(n, s, r, d)	*(IP27_RHUB_PI_ADDR((n), (s), (r))) = (d)
 
+#define	NODE_HSPEC_BASE(nasid) \
+        (IP27_NODE_HSPEC_BASE(nasid))
+
+#define	IP27_LHSPEC_ADDR(_x) \
+	((volatile uint64_t *)(NODE_HSPEC_BASE(0) + (_x)))
+#define	IP27_RHSPEC_ADDR(_n, _x) \
+	((volatile uint64_t *)(NODE_HSPEC_BASE(_n) + 0x20000000 + (_x)))
+
+#define	IP27_LHSPEC_L(r)		*(IP27_LHSPEC_ADDR(r))
+#define	IP27_LHSPEC_S(r, d)		*(IP27_LHSPEC_ADDR(r)) = (d)
+#define	IP27_RHSPEC_L(n, r)		*(IP27_RHSPEC_ADDR((n), (r)))
+#define	IP27_RHSPEC_S(n, r, d)		*(IP27_RHSPEC_ADDR((n), (r))) = (d)
+
 /*
- * IP27 specific registers
+ * HUB SPECIAL space (very incomplete)
  */
 
+#define	LBOOTBASE_IP27		0x10000000
+#define	LBOOTSIZE_IP27		0x10000000
+
+#define	LREGBASE_IP35		0x10000000
+#define	LREGSIZE_IP35		0x08000000
+#define	LBOOTBASE_IP35		0x18000000
+#define	LBOOTSIZE_IP35		0x08000000
+
+#define	HSPEC_SYNERGY0		0x04000000	/* synergy #0 base */
+#define	HSPEC_SYNERGY1		0x05000000	/* synergy #1 base */
+
+#define	HSPEC_SYNERGY(s,r) \
+	(LREGBASE_IP35 + ((s) ? HSPEC_SYNERGY1 : HSPEC_SYNERGY0) + ((r) << 3))
+
 /*
- * HUB space (very incomplete)
+ * HUB IO space (very incomplete)
  */
 
 /*
diff --git a/sys/arch/sgi/xbow/xbowdevs.h b/sys/arch/sgi/xbow/xbowdevs.h
index dbab72b2df2..b6e95bf0c40 100644
--- a/sys/arch/sgi/xbow/xbowdevs.h
+++ b/sys/arch/sgi/xbow/xbowdevs.h
@@ -2,7 +2,7 @@
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *	OpenBSD: xbowdevs,v 1.4 2009/10/08 19:13:00 miod Exp 
+ *	OpenBSD: xbowdevs,v 1.5 2009/10/14 20:19:23 miod Exp 
  */
 /*
  * Copyright (c) 2008 Miodrag Vallat.
@@ -32,7 +32,7 @@
 
 #define	XBOW_PRODUCT_SGI_XBOW	0x0000		/* XBow */
 #define	XBOW_PRODUCT_SGI_XXBOW	0xd000		/* XXBow */
-#define	XBOW_PRODUCT_SGI_BEDROCK	0xd100		/* Bedrock */
+#define	XBOW_PRODUCT_SGI_BEDROCK	0xd100		/* PXBow */
 
 #define	XBOW_PRODUCT_SGI2_ODYSSEY	0xc013		/* Odyssey */
 
diff --git a/sys/arch/sgi/xbow/xbowdevs_data.h b/sys/arch/sgi/xbow/xbowdevs_data.h
index a64dfe6c903..fc7aeee5e38 100644
--- a/sys/arch/sgi/xbow/xbowdevs_data.h
+++ b/sys/arch/sgi/xbow/xbowdevs_data.h
@@ -2,7 +2,7 @@
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *	OpenBSD: xbowdevs,v 1.4 2009/10/08 19:13:00 miod Exp 
+ *	OpenBSD: xbowdevs,v 1.5 2009/10/14 20:19:23 miod Exp 
  */
 
 /*
@@ -40,7 +40,7 @@ static const struct xbow_product xbow_products[] = {
 	},
 	{
 	    XBOW_VENDOR_SGI, XBOW_PRODUCT_SGI_BEDROCK,
-	    "Bedrock",
+	    "PXBow",
 	},
 	{
 	    XBOW_VENDOR_SGI2, XBOW_PRODUCT_SGI2_ODYSSEY,