Map the raven, pcic, and isa/pci io space virtual rather than 1:1.

7 files changed, 250 insertions, 236 deletions

diff --git a/sys/arch/mvmeppc/dev/nvramreg.h b/sys/arch/mvmeppc/dev/nvramreg.h
index 86769c4f801..4b5a427628b 100644
--- a/sys/arch/mvmeppc/dev/nvramreg.h
+++ b/sys/arch/mvmeppc/dev/nvramreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: nvramreg.h,v 1.3 2004/01/28 23:50:17 miod Exp $ */
+/*	$OpenBSD: nvramreg.h,v 1.4 2004/01/29 10:58:06 miod Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -59,13 +59,13 @@
  *	1ff8-1fff	TOD clock
  */
 
-#define	NVRAM_PA		0x80000000
-#define	NVRAM_SIZE		0x2000
-
+#define	NVRAM_BASE		0x80000000	/* access thrugh ISA space! */
 #define NVRAM_S0		0x00000074
 #define NVRAM_S1		0x00000075
 #define NVRAM_DATA		0x00000077
 
+#define	NVRAM_SIZE		0x2000
+
 #define RTC_SECONDS		0x1FF9
 #define RTC_MINUTES		0x1FFA
 #define RTC_HOURS		0x1FFB
diff --git a/sys/arch/mvmeppc/dev/openpic.c b/sys/arch/mvmeppc/dev/openpic.c
index 37df045e6d5..545e05af5fc 100644
--- a/sys/arch/mvmeppc/dev/openpic.c
+++ b/sys/arch/mvmeppc/dev/openpic.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: openpic.c,v 1.10 2003/06/02 23:27:53 millert Exp $	*/
+/*	$OpenBSD: openpic.c,v 1.11 2004/01/29 10:58:06 miod Exp $	*/
 
 /*-
  * Copyright (c) 1995 Per Fogelstrom
@@ -58,10 +58,10 @@
 
 #define ICU_LEN 32
 #define LEGAL_IRQ(x) ((x >= 0) && (x < ICU_LEN))
-#define IO_ICU1	(RAVEN_P_ISA_IO_SPACE + 0x20)
-#define IO_ICU2	(RAVEN_P_ISA_IO_SPACE + 0xA0)
-#define IO_ELCR1	(RAVEN_P_ISA_IO_SPACE + 0x4D0)
-#define IO_ELCR2	(RAVEN_P_ISA_IO_SPACE + 0x4D1)
+#define IO_ICU1	(isaspace_va + 0x20)
+#define IO_ICU2	(isaspace_va + 0xA0)
+#define IO_ELCR1	(isaspace_va + 0x4D0)
+#define IO_ELCR2	(isaspace_va + 0x4D1)
 #define IRQ_SLAVE	2
 #define ICU_OFFSET	0
 #define PIC_OFFSET	16
@@ -73,23 +73,21 @@ unsigned char elcr2_val = 0x00;
 
 #define SET_ICUS()	(outb(IO_ICU1 + 1, imen), outb(IO_ICU2 + 1, imen >> 8))
 
-static int intrtype[ICU_LEN], intrmask[ICU_LEN], intrlevel[ICU_LEN];
-static struct intrhand *intrhand[ICU_LEN] = { 0};
-static int hwirq[ICU_LEN], virq[ICU_LEN];
+int intrtype[ICU_LEN], intrmask[ICU_LEN], intrlevel[ICU_LEN];
+struct intrhand *intrhand[ICU_LEN];
+int hwirq[ICU_LEN], virq[ICU_LEN];
 unsigned int imen	/* = 0xffffffff */; /* XXX */
-static int virq_max = 0;
+int virq_max;
 
 struct evcnt evirq[ICU_LEN];
 
-static int fakeintr(void *);
-static char *intr_typename(int type);
-static void intr_calculatemasks(void);
+int fakeintr(void *);
+const char *intr_typename(int type);
+void intr_calculatemasks(void);
 static __inline int cntlzw(int x);
-static int mapirq(int irq);
+int mapirq(int irq);
 void openpic_enable_irq_mask(int irq_mask);
 
-static struct raven_reg *ravenp = (struct raven_reg *)NULL;
-
 #define HWIRQ_MAX 27
 #define HWIRQ_MASK 0x0fffffff
 
@@ -122,16 +120,14 @@ void  openpic_do_pending_int(void);
 void  ext_intr_openpic(void);
 
 struct cfattach openpic_ca = { 
-	sizeof(struct openpic_softc),
-	openpic_match,
-	openpic_attach
+	sizeof(struct openpic_softc), openpic_match, openpic_attach
 };
 
 struct cfdriver openpic_cd = {
 	NULL, "openpic", DV_DULL
 };
 
-struct pci_route {
+const struct pci_route {
 	int pci;
 	int openpic;
 } pci_routes[] = {
@@ -142,24 +138,17 @@ struct pci_route {
 	{ 0, 0 }
 };
 
-static int isaintrs = 0;
+int isaintrs;
 
 int
 openpic_match(parent, cf, aux) 
-struct device *parent;
-void *cf;
-void *aux;
+	struct device *parent;
+	void *cf;
+	void *aux;
 {
 	/* We must be a child of the raven device */
 	if (strcmp(parent->dv_cfdata->cf_driver->cd_name, "raven") != 0)
 		return (0);
-	/* don't attach more than once. */
-	if (ravenp != (struct raven_reg *)NULL) {
-#ifdef DIAGNOSTIC
-		printf("openpic: trying to attach more than once!");
-#endif
-		return (0);
-	}
 	/* If there is a raven, then there is a mpic! */
 	return 1;
 }
@@ -167,8 +156,8 @@ void *aux;
 u_int8_t *interrupt_reg;
 typedef void  (void_f) (void);
 extern void_f *pending_int_f;
-static int abort_switch (void *arg);
-static int i8259_dummy (void *arg);
+int abort_switch (void *arg);
+int i8259_dummy (void *arg);
 
 typedef int mac_intr_handle_t;
 
@@ -176,7 +165,9 @@ typedef void  *(intr_establish_t)(void *, mac_intr_handle_t,
     int, int, int (*)(void *), void *, char *);
 typedef void (intr_disestablish_t)(void *, void *);
 
-static vaddr_t openpic_base;
+vaddr_t openpic_base;
+extern vaddr_t isaspace_va;
+
 void * openpic_intr_establish(void *, int, int, int, int (*)(void *), void *,
     char *);
 void openpic_intr_disestablish(void *, void *);
@@ -184,16 +175,18 @@ void openpic_collect_preconf_intr(void);
 
 void
 openpic_attach(parent, self, aux)
-struct device *parent, *self;
-void *aux;
+	struct device *parent, *self;
+	void *aux;
 {
 	extern intr_establish_t *intr_establish_func;
 	extern intr_disestablish_t *intr_disestablish_func;
-#if 0
-	extern intr_establish_t *mac_intr_establish_func;
-	extern intr_disestablish_t *mac_intr_disestablish_func;
-#endif 
-	openpic_base = (vaddr_t)mapiodev(MPCIC_REG, 0x22000);
+
+	if ((openpic_base = (vaddr_t)mapiodev(MPCIC_BASE, MPCIC_SIZE)) == NULL) {
+		printf(": can't map MPCIC!\n");
+		return;
+	}
+
+	/* the ICU area in isa space already mapped */
 
 	printf(": version 0x%x", openpic_read(OPENPIC_FEATURE) & 0xFF);
 
@@ -203,10 +196,6 @@ void *aux;
 	pending_int_f = openpic_do_pending_int;
 	intr_establish_func  = i8259_intr_establish;
 	intr_disestablish_func  = openpic_intr_disestablish;
-#if 0
-	mac_intr_establish_func  = openpic_intr_establish;
-	mac_intr_disestablish_func  = openpic_intr_disestablish;
-#endif 
 	install_extint(ext_intr_openpic);
 
 #if 1
@@ -242,8 +231,8 @@ openpic_collect_preconf_intr()
 	}
 }
 
-static int
-abort_switch (void *arg)
+int
+abort_switch(void *arg)
 {
 #ifdef DDB
 	printf("Abort button pressed, entering debugger.\n");
@@ -254,15 +243,15 @@ abort_switch (void *arg)
 	return 1;
 }
 
-static int
-i8259_dummy (void *arg)
+int
+i8259_dummy(void *arg)
 {
 	return 1;
 }
 
-static int
+int
 fakeintr(arg)
-void *arg;
+	void *arg;
 {
 
 	return 0;
@@ -273,13 +262,13 @@ void *arg;
  */
 void *
 i8259_intr_establish(lcv, irq, type, level, ih_fun, ih_arg, name)
-void * lcv;
-int irq;
-int type;
-int level;
-int (*ih_fun)(void *);
-void *ih_arg;
-char *name;
+	void * lcv;
+	int irq;
+	int type;
+	int level;
+	int (*ih_fun)(void *);
+	void *ih_arg;
+	char *name;
 {
 	struct intrhand **p, *q, *ih;
 	static struct intrhand fakehand;
@@ -293,9 +282,6 @@ char *name;
 #endif
 	isaintrs++;
 	irq = mapirq(irq + ICU_OFFSET);
-#if 0
-	printf("vI %d ", irq);
-#endif
 
 	/* no point in sleeping unless someone can free memory. */
 	ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
@@ -316,8 +302,8 @@ char *name;
 	case IST_PULSE:
 		if (type != IST_NONE)
 			panic("intr_establish: can't share %s with %s",
-					intr_typename(intrtype[irq]),
-					intr_typename(type));
+			    intr_typename(intrtype[irq]),
+			    intr_typename(type));
 		break;
 	}
 
@@ -359,26 +345,22 @@ char *name;
  */
 void *
 openpic_intr_establish(lcv, irq, type, level, ih_fun, ih_arg, name)
-void * lcv;
-int irq;
-int type;
-int level;
-int (*ih_fun)(void *);
-void *ih_arg;
-char *name;
+	void * lcv;
+	int irq;
+	int type;
+	int level;
+	int (*ih_fun)(void *);
+	void *ih_arg;
+	char *name;
 {
 	struct intrhand **p, *q, *ih;
 	static struct intrhand fakehand;
-	struct pci_route *pr;
+	const struct pci_route *pr;
 	extern int cold;
 
 	fakehand.ih_next = NULL;
 	fakehand.ih_fun  = fakeintr;
 
-#if 0
-	printf("mac_intr_establish, hI %d L %d ", irq, type);
-#endif
-
 	pr = pci_routes;
 	while (pr->pci !=0) {
 		irq = (pr->pci == irq) ? pr->openpic : irq;
@@ -386,9 +368,6 @@ char *name;
 	}
 
 	irq = mapirq(irq + PIC_OFFSET);
-#if 0
-	printf("vI %d ", irq);
-#endif
 
 	/* no point in sleeping unless someone can free memory. */
 	ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
@@ -409,8 +388,8 @@ char *name;
 	case IST_PULSE:
 		if (type != IST_NONE)
 			panic("intr_establish: can't share %s with %s",
-					intr_typename(intrtype[irq]),
-					intr_typename(type));
+			   intr_typename(intrtype[irq]),
+			   intr_typename(type));
 		break;
 	}
 
@@ -451,8 +430,8 @@ char *name;
  */
 void
 openpic_intr_disestablish(lcp, arg)
-void *lcp;
-void *arg;
+	void *lcp;
+	void *arg;
 {
 	struct intrhand *ih = arg;
 	int irq = ih->ih_irq;
@@ -479,10 +458,9 @@ void *arg;
 		intrtype[irq] = IST_NONE;
 }
 
-
-static char *
+const char *
 intr_typename(type)
-int type;
+	int type;
 {
 
 	switch (type) {
@@ -494,10 +472,9 @@ int type;
 		return ("edge-triggered");
 	case IST_LEVEL:
 		return ("level-triggered");
+#ifdef DIAGNOSTIC
 	default:
 		panic("intr_typename: invalid type %d", type);
-#if 1 /* XXX */
-		return ("unknown");
 #endif
 	}
 }
@@ -508,7 +485,7 @@ int type;
  * would be faster, but the code would be nastier, and we don't expect this to
  * happen very much anyway.
  */
-static void
+void
 intr_calculatemasks()
 {
 	int irq, level;
@@ -582,12 +559,13 @@ intr_calculatemasks()
 	i8259_enable_irq(2, IST_EDGE);
 #endif 
 }
+
 /*
  * Map 64 irqs into 32 (bits).
  */
-static int
+int
 mapirq(irq)
-int irq;
+	int irq;
 {
 	int v;
 
@@ -684,7 +662,7 @@ openpic_do_pending_int()
 
 u_int
 openpic_read(reg)
-int reg;
+	int reg;
 {
 	char *addr = (void *)(openpic_base + reg);
 	
@@ -693,8 +671,8 @@ int reg;
 
 void
 openpic_write(reg, val)
-int reg;
-u_int val;
+	int reg;
+	u_int val;
 {
 	char *addr = (void *)(openpic_base + reg);
 
@@ -703,7 +681,7 @@ u_int val;
 
 void
 openpic_enable_irq_mask(irq_mask)
-int irq_mask;
+	int irq_mask;
 {
 	int irq;
 #ifdef OP_DEBUG
@@ -726,8 +704,8 @@ int irq_mask;
 
 void
 openpic_enable_irq(irq, type)
-int irq;
-int type;
+	int irq;
+	int type;
 {
 	u_int x;
 	/* skip invalid irqs */
@@ -768,7 +746,7 @@ int type;
 
 void
 openpic_disable_irq(irq)
-int irq;
+	int irq;
 {
 	u_int x;
 	/* skip invalid irqs */
@@ -809,7 +787,7 @@ i8259_set_irq_mask(void)
 
 void
 i8259_disable_irq(irq)
-int irq;
+	int irq;
 {
 	if (irq == -1)
 		return;
@@ -825,7 +803,7 @@ int irq;
 
 void 
 i8259_enable_irq(irq, type)
-int irq, type; 
+	int irq, type; 
 {
 	/* skip invalid irqs */
 	if (irq == -1)
@@ -854,7 +832,7 @@ int irq, type;
 
 void
 openpic_set_priority(cpu, pri)
-int cpu, pri;
+	int cpu, pri;
 {
 	u_int x;
 
@@ -866,20 +844,21 @@ int cpu, pri;
 
 int
 openpic_read_irq(cpu)
-int cpu;
+	int cpu;
 {
 	return openpic_read(OPENPIC_IACK(cpu)) & OPENPIC_VECTOR_MASK;
 }
 
 void
 openpic_eoi(cpu)
-int cpu;
+	int cpu;
 {
 	openpic_write(OPENPIC_EOI(cpu), 0);
 	openpic_read(OPENPIC_EOI(cpu));
 }
 
-void i8259_init(void)
+void
+i8259_init(void)
 {
 #if 0
 	/* initialize 8259's */
@@ -897,7 +876,8 @@ void i8259_init(void)
 #endif 
 }
 
-int i8259_intr(void)
+int
+i8259_intr(void)
 {
 	int irq;
 
@@ -991,7 +971,8 @@ ext_intr_openpic()
 	splx(pcpl);		 /* Process pendings. */
 }
 
-void openpic_set_vec_pri(int irq, int pri)
+void
+openpic_set_vec_pri(int irq, int pri)
 {
 	u_int x;
 	x = openpic_read(OPENPIC_SRC_VECTOR(irq));
@@ -1000,7 +981,8 @@ void openpic_set_vec_pri(int irq, int pri)
 	openpic_write(OPENPIC_SRC_VECTOR(irq), x);
 }
 
-void openpic_initirq(int irq, int pri, int vec, int pol, int sense)
+void
+openpic_initirq(int irq, int pri, int vec, int pol, int sense)
 {
 	u_int x;
 	x = (vec & OPENPIC_VECTOR_MASK);
diff --git a/sys/arch/mvmeppc/dev/raven.c b/sys/arch/mvmeppc/dev/raven.c
index 72ccc831778..2dc6024e105 100644
--- a/sys/arch/mvmeppc/dev/raven.c
+++ b/sys/arch/mvmeppc/dev/raven.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: raven.c,v 1.4 2002/03/14 01:26:41 millert Exp $ */
+/*	$OpenBSD: raven.c,v 1.5 2004/01/29 10:58:06 miod Exp $ */
 
 /*
  * Copyright (c) 2001 Steve Murphree, Jr.
@@ -61,36 +61,54 @@ struct cfdriver raven_cd = {
 };
 
 int
-raven_match(parent, match, aux)
-	struct device *parent;
-	void *match, *aux;
+raven_match(struct device *parent, void *match, void *aux)
 {
-	unsigned *reg = (unsigned *)RAVEN_REG;
+	void *va;
+	u_int32_t probe;
+
+	if ((va = mapiodev((paddr_t)RAVEN_BASE, RAVEN_SIZE)) == NULL)
+		return 0;
 
 	/* check for a live address */
-	if (badaddr((char *)reg, 4))
+	if (badaddr(va, 4) != 0) {
+		unmapiodev(va, RAVEN_SIZE);
 		return 0;
+	}
 	
 	/* now check and see if it's a raven ASIC */	
-	if (*reg != RAVEN_MAGIC)
+	probe = *(u_int32_t*)va;
+	unmapiodev((void *)va, RAVEN_SIZE);
+
+	if (probe != RAVEN_MAGIC)
 		return 0;
 	
 	return 1;
 }
 
+/* need to be global for mpcpcibr.c - XXX */
+u_int8_t *ravenregs;
+
 void
-raven_attach(parent, self, aux)
-	struct device *parent, *self;
-	void *aux;
+raven_attach(struct device *parent, struct device *self, void *aux)
 {
-	struct mpic_feature *feature = (struct mpic_feature *)MPCIC_FEATURE;
+	struct raven_softc *sc = (void *)self;
+
+	/*
+	 * Map Raven registers and MPCIC
+	 *
+	 * XXX steal them from devio_ex as well!
+	 */
+	ravenregs = sc->sc_regs = mapiodev((paddr_t)RAVEN_BASE, RAVEN_SIZE);
+	if (sc->sc_regs == NULL) {
+		printf(": can't map registers!\n");
+		return;
+	}
 
 	/* set system type */
 	system_type = MVME;		/* We are a Motorola MVME SBC */
 
-	printf(": RAVEN, Version 0x%x.\n", feature->vid);
+	printf(": version 0x%x\n", sc->sc_regs[RAVEN_REVID]);
+
 	while (config_found(self, NULL, NULL))
 		;
 }
-                 
-
diff --git a/sys/arch/mvmeppc/dev/ravenreg.h b/sys/arch/mvmeppc/dev/ravenreg.h
index 212e3e4c1c1..dff169b24d9 100644
--- a/sys/arch/mvmeppc/dev/ravenreg.h
+++ b/sys/arch/mvmeppc/dev/ravenreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ravenreg.h,v 1.2 2004/01/27 10:04:18 miod Exp $ */
+/*	$OpenBSD: ravenreg.h,v 1.3 2004/01/29 10:58:06 miod Exp $ */
 
 /*
  * Copyright (c) 2001 Steve Murphree, Jr.
@@ -37,31 +37,33 @@
 #ifndef _MACHINE_RAVENREG_H_
 #define _MACHINE_RAVENREG_H_
 
-#define RAVEN_REG		0xFEFF0000
-#define RAVEN_VENDOR		0xFEFF0000
+#define RAVEN_BASE		0xFEFF0000
+#define	RAVEN_SIZE		0x00001000
+
+#define RAVEN_VENDOR		0x00000000
 #define RAVEN_MAGIC		0x10574801 /* vendor information */
-#define RAVEN_DEVICE		0xFEFF0002
-#define RAVEN_REVID		0xFEFF0005
-#define RAVEN_GCSR		0xFEFF0008
-#define RAVEN_FEAT		0xFEFF000A
-#define RAVEN_MARB		0xFEFF000E
-#define RAVEN_PIACK		0xFEFF0030
-
-#define RAVEN_MSADD0		0xFEFF0040 
+#define RAVEN_DEVICE		0x00000002
+#define RAVEN_REVID		0x00000005
+#define RAVEN_GCSR		0x00000008
+#define RAVEN_FEAT		0x0000000A
+#define RAVEN_MARB		0x0000000E
+#define RAVEN_PIACK		0x00000030
+
+#define RAVEN_MSADD0		0x00000040 
 #define RAVEN_MSADD0_PREP	0xC000FCFF
-#define RAVEN_MSOFF0		0xFEFF0044
+#define RAVEN_MSOFF0		0x00000044
 #define RAVEN_MSOFF0_PREP	0x400000C2
-#define RAVEN_MSADD1		0xFEFF0048
+#define RAVEN_MSADD1		0x00000048
 #define RAVEN_MSADD1_PREP	0x00000000
-#define RAVEN_MSOFF1		0xFEFF004C
+#define RAVEN_MSOFF1		0x0000004C
 #define RAVEN_MSOFF1_PREP	0x00000002
-#define RAVEN_MSADD2		0xFEFF0050
+#define RAVEN_MSADD2		0x00000050
 #define RAVEN_MSADD2_PREP	0x00000000
-#define RAVEN_MSOFF2		0xFEFF0054
+#define RAVEN_MSOFF2		0x00000054
 #define RAVEN_MSOFF2_PREP	0x00000002
-#define RAVEN_MSADD3		0xFEFF0058
+#define RAVEN_MSADD3		0x00000058
 #define RAVEN_MSADD3_PREP	0x8000BFFF
-#define RAVEN_MSOFF3		0xFEFF005C
+#define RAVEN_MSOFF3		0x0000005C
 #define RAVEN_MSOFF3_PREP	0x800000C0
 
 /* Where we map the PCI memory space - MAP A*/
@@ -120,4 +122,7 @@
 #define RAVEN_CMD_MEMSP		0x0002
 #define RAVEN_CMD_MASTR		0x0004
 
+/* How much ISA space we'll map initially */
+#define	ISA_SIZE	PAGE_SIZE
+
 #endif /* _MACHINE_RAVENREG_H_ */
diff --git a/sys/arch/mvmeppc/dev/ravenvar.h b/sys/arch/mvmeppc/dev/ravenvar.h
index 3d12774a169..7d4431af63c 100644
--- a/sys/arch/mvmeppc/dev/ravenvar.h
+++ b/sys/arch/mvmeppc/dev/ravenvar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ravenvar.h,v 1.2 2004/01/28 23:52:10 miod Exp $ */
+/*	$OpenBSD: ravenvar.h,v 1.3 2004/01/29 10:58:06 miod Exp $ */
 
 /*
  * Copyright (c) 2001 Steve Murphree, Jr.
@@ -37,81 +37,83 @@
 #ifndef _DEV_RAVENVAR_H_
 #define _DEV_RAVENVAR_H_
 
-#define MPCIC_REG	0xFC000000
-#define MPCIC_FEATURE	(MPCIC_REG | 0x01000)
-#define MPCIC_GCR	(MPCIC_REG | 0x01020)
-#define MPCIC_VID	(MPCIC_REG | 0x01080)
-#define MPCIC_PINIT	(MPCIC_REG | 0x01090)
-#define MPCIC_IPI0	(MPCIC_REG | 0x010A0)
-#define MPCIC_IPI1	(MPCIC_REG | 0x010B0)
-#define MPCIC_IPI2	(MPCIC_REG | 0x010C0)
-#define MPCIC_IPI3	(MPCIC_REG | 0x010D0)
-#define MPCIC_SP	(MPCIC_REG | 0x010E0)
-#define MPCIC_TFR	(MPCIC_REG | 0x010F0)
-#define MPCIC_T0CC	(MPCIC_REG | 0x01100)
-#define MPCIC_T0BC	(MPCIC_REG | 0x01110)
-#define MPCIC_T0VP	(MPCIC_REG | 0x01120)
-#define MPCIC_T0D	(MPCIC_REG | 0x01130)
-#define MPCIC_T1CC	(MPCIC_REG | 0x01140)
-#define MPCIC_T1BC	(MPCIC_REG | 0x01150)
-#define MPCIC_T1VP	(MPCIC_REG | 0x01160)
-#define MPCIC_T1D	(MPCIC_REG | 0x01170)
-#define MPCIC_T2CC	(MPCIC_REG | 0x01180)
-#define MPCIC_T2BC	(MPCIC_REG | 0x01190)
-#define MPCIC_T2VP	(MPCIC_REG | 0x011A0)
-#define MPCIC_T2D	(MPCIC_REG | 0x011B0)
-#define MPCIC_T3CC	(MPCIC_REG | 0x011C0)
-#define MPCIC_T3BC	(MPCIC_REG | 0x011D0)
-#define MPCIC_T3VP	(MPCIC_REG | 0x011E0)
-#define MPCIC_T3D	(MPCIC_REG | 0x011F0)
-#define MPCIC_INT0VP	(MPCIC_REG | 0x10000)
-#define MPCIC_INT0D	(MPCIC_REG | 0x10010)
-#define MPCIC_INT1VP	(MPCIC_REG | 0x10020)
-#define MPCIC_INT1D	(MPCIC_REG | 0x10030)
-#define MPCIC_INT2VP	(MPCIC_REG | 0x10040)
-#define MPCIC_INT2D	(MPCIC_REG | 0x10050)
-#define MPCIC_INT3VP	(MPCIC_REG | 0x10060)
-#define MPCIC_INT3D	(MPCIC_REG | 0x10070)
-#define MPCIC_INT4VP	(MPCIC_REG | 0x10080)
-#define MPCIC_INT4D	(MPCIC_REG | 0x10090)
-#define MPCIC_INT5VP	(MPCIC_REG | 0x100A0)
-#define MPCIC_INT5D	(MPCIC_REG | 0x100B0)
-#define MPCIC_INT6VP	(MPCIC_REG | 0x100C0)
-#define MPCIC_INT6D	(MPCIC_REG | 0x100D0)
-#define MPCIC_INT7VP	(MPCIC_REG | 0x100E0)
-#define MPCIC_INT7D	(MPCIC_REG | 0x100F0)
-#define MPCIC_INT8VP	(MPCIC_REG | 0x10100)
-#define MPCIC_INT8D	(MPCIC_REG | 0x10110)
-#define MPCIC_INT9VP	(MPCIC_REG | 0x10120)
-#define MPCIC_INT9D	(MPCIC_REG | 0x10130)
-#define MPCIC_INT10VP	(MPCIC_REG | 0x10140)
-#define MPCIC_INT10D	(MPCIC_REG | 0x10150)
-#define MPCIC_INT11VP	(MPCIC_REG | 0x10160)
-#define MPCIC_INT11D	(MPCIC_REG | 0x10170)
-#define MPCIC_INT12VP	(MPCIC_REG | 0x10180)
-#define MPCIC_INT12D	(MPCIC_REG | 0x10190)
-#define MPCIC_INT13VP	(MPCIC_REG | 0x101A0)
-#define MPCIC_INT13D	(MPCIC_REG | 0x101B0)
-#define MPCIC_INT14VP	(MPCIC_REG | 0x101C0)
-#define MPCIC_INT14D	(MPCIC_REG | 0x101D0)
-#define MPCIC_INT15VP	(MPCIC_REG | 0x101E0)
-#define MPCIC_INT15D	(MPCIC_REG | 0x101F0)
-#define MPCIC_EVP	(MPCIC_REG | 0x10200)
-#define MPCIC_ED	(MPCIC_REG | 0x10210)
-#define MPCIC_P0_IPI0_D	(MPCIC_REG | 0x20040)
-#define MPCIC_P0_IPI1_D	(MPCIC_REG | 0x20050)
-#define MPCIC_P0_IPI2_D	(MPCIC_REG | 0x20060)
-#define MPCIC_P0_IPI3_D	(MPCIC_REG | 0x20070)
-#define MPCIC_P0_TP	(MPCIC_REG | 0x20080)
-#define MPCIC_P0_IACK	(MPCIC_REG | 0x200A0)
-#define MPCIC_P0_EOI	(MPCIC_REG | 0x200B0)
-#define MPCIC_P1_IPI0_D	(MPCIC_REG | 0x21040)
-#define MPCIC_P1_IPI1_D	(MPCIC_REG | 0x21050)
-#define MPCIC_P1_IPI2_D	(MPCIC_REG | 0x21060)
-#define MPCIC_P1_IPI3_D	(MPCIC_REG | 0x21070)
-#define MPCIC_P1_TP	(MPCIC_REG | 0x21080)
-#define MPCIC_P1_IACK	(MPCIC_REG | 0x210A0)
-#define MPCIC_P1_EOI	(MPCIC_REG | 0x210B0)
+#define MPCIC_BASE	0xFC000000
+#define	MPCIC_SIZE	0x00022000
+
+#define MPCIC_FEATURE	0x01000
+#define MPCIC_GCR	0x01020
+#define MPCIC_VID	0x01080
+#define MPCIC_PINIT	0x01090
+#define MPCIC_IPI0	0x010A0
+#define MPCIC_IPI1	0x010B0
+#define MPCIC_IPI2	0x010C0
+#define MPCIC_IPI3	0x010D0
+#define MPCIC_SP	0x010E0
+#define MPCIC_TFR	0x010F0
+#define MPCIC_T0CC	0x01100
+#define MPCIC_T0BC	0x01110
+#define MPCIC_T0VP	0x01120
+#define MPCIC_T0D	0x01130
+#define MPCIC_T1CC	0x01140
+#define MPCIC_T1BC	0x01150
+#define MPCIC_T1VP	0x01160
+#define MPCIC_T1D	0x01170
+#define MPCIC_T2CC	0x01180
+#define MPCIC_T2BC	0x01190
+#define MPCIC_T2VP	0x011A0
+#define MPCIC_T2D	0x011B0
+#define MPCIC_T3CC	0x011C0
+#define MPCIC_T3BC	0x011D0
+#define MPCIC_T3VP	0x011E0
+#define MPCIC_T3D	0x011F0
+#define MPCIC_INT0VP	0x10000
+#define MPCIC_INT0D	0x10010
+#define MPCIC_INT1VP	0x10020
+#define MPCIC_INT1D	0x10030
+#define MPCIC_INT2VP	0x10040
+#define MPCIC_INT2D	0x10050
+#define MPCIC_INT3VP	0x10060
+#define MPCIC_INT3D	0x10070
+#define MPCIC_INT4VP	0x10080
+#define MPCIC_INT4D	0x10090
+#define MPCIC_INT5VP	0x100A0
+#define MPCIC_INT5D	0x100B0
+#define MPCIC_INT6VP	0x100C0
+#define MPCIC_INT6D	0x100D0
+#define MPCIC_INT7VP	0x100E0
+#define MPCIC_INT7D	0x100F0
+#define MPCIC_INT8VP	0x10100
+#define MPCIC_INT8D	0x10110
+#define MPCIC_INT9VP	0x10120
+#define MPCIC_INT9D	0x10130
+#define MPCIC_INT10VP	0x10140
+#define MPCIC_INT10D	0x10150
+#define MPCIC_INT11VP	0x10160
+#define MPCIC_INT11D	0x10170
+#define MPCIC_INT12VP	0x10180
+#define MPCIC_INT12D	0x10190
+#define MPCIC_INT13VP	0x101A0
+#define MPCIC_INT13D	0x101B0
+#define MPCIC_INT14VP	0x101C0
+#define MPCIC_INT14D	0x101D0
+#define MPCIC_INT15VP	0x101E0
+#define MPCIC_INT15D	0x101F0
+#define MPCIC_EVP	0x10200
+#define MPCIC_ED	0x10210
+#define MPCIC_P0_IPI0_D	0x20040
+#define MPCIC_P0_IPI1_D	0x20050
+#define MPCIC_P0_IPI2_D	0x20060
+#define MPCIC_P0_IPI3_D	0x20070
+#define MPCIC_P0_TP	0x20080
+#define MPCIC_P0_IACK	0x200A0
+#define MPCIC_P0_EOI	0x200B0
+#define MPCIC_P1_IPI0_D	0x21040
+#define MPCIC_P1_IPI1_D	0x21050
+#define MPCIC_P1_IPI2_D	0x21060
+#define MPCIC_P1_IPI3_D	0x21070
+#define MPCIC_P1_TP	0x21080
+#define MPCIC_P1_IACK	0x210A0
+#define MPCIC_P1_EOI	0x210B0
 
 #define PROC0	0x01
 #define PROC1	0x02
@@ -380,7 +382,7 @@ struct raven_reg {
 
 struct raven_softc {
 	struct device	sc_dev;
-	struct raven_reg *sc_reg;
+	u_int8_t	*sc_regs;
 };
 
 #endif /* _DEV_RAVENVAR_H_ */
diff --git a/sys/arch/mvmeppc/mvmeppc/ppc1_machdep.c b/sys/arch/mvmeppc/mvmeppc/ppc1_machdep.c
index c7f99ab36b6..29cdbd63aee 100644
--- a/sys/arch/mvmeppc/mvmeppc/ppc1_machdep.c
+++ b/sys/arch/mvmeppc/mvmeppc/ppc1_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ppc1_machdep.c,v 1.13 2004/01/28 23:50:19 miod Exp $	*/
+/*	$OpenBSD: ppc1_machdep.c,v 1.14 2004/01/29 10:58:08 miod Exp $	*/
 /*	$NetBSD: ofw_machdep.c,v 1.1 1996/09/30 16:34:50 ws Exp $	*/
 
 /*
@@ -41,7 +41,9 @@
 #include <machine/powerpc.h>
 #include <machine/autoconf.h>
 #include <machine/bugio.h>
+
 #include <mvmeppc/dev/nvramreg.h>
+#include <mvmeppc/dev/ravenreg.h>
 
 #include <dev/cons.h>
 
@@ -223,7 +225,7 @@ PPC1_boot(bootspec)
  * because we need to setup the clocks before autoconf.
  */
 
-vaddr_t	nvram_va;
+vaddr_t	isaspace_va;
 
 void
 nvram_map()
@@ -232,11 +234,12 @@ nvram_map()
 	extern struct extent *devio_ex;
 	extern int ppc_malloc_ok;
 
-	if ((error = extent_alloc_region(devio_ex, NVRAM_PA, NVRAM_SIZE,
-	    EX_NOWAIT | (ppc_malloc_ok ? EX_MALLOCOK : 0))) != 0)
-		panic("nvram_map: can't map NVRAM, extent error %d", error);
+	if ((error = extent_alloc_region(devio_ex, RAVEN_P_ISA_IO_SPACE,
+	    ISA_SIZE, EX_NOWAIT | (ppc_malloc_ok ? EX_MALLOCOK : 0))) != 0)
+		panic("nvram_map: can't map ISA space, extent error %d", error);
 
-	if ((nvram_va = (vaddr_t)mapiodev(NVRAM_PA, NVRAM_SIZE)) == NULL)
+	if ((isaspace_va = (vaddr_t)mapiodev(RAVEN_P_ISA_IO_SPACE,
+	    ISA_SIZE)) == NULL)
 		panic("nvram_map: map failed");
 }
 
@@ -244,9 +247,9 @@ unsigned char
 PPC1_nvram_rd(addr)
 	unsigned long addr;
 {
-	outb(nvram_va + NVRAM_S0, addr);
-	outb(nvram_va + NVRAM_S1, addr>>8);
-	return inb(nvram_va + NVRAM_DATA);
+	outb(isaspace_va + NVRAM_S0, addr);
+	outb(isaspace_va + NVRAM_S1, addr>>8);
+	return inb(isaspace_va + NVRAM_DATA);
 }
 
 void
@@ -254,9 +257,9 @@ PPC1_nvram_wr(addr, val)
 	unsigned long addr; 
 	unsigned char val;
 {
-	outb(nvram_va + NVRAM_S0, addr);
-	outb(nvram_va + NVRAM_S1, addr>>8);
-	outb(nvram_va + NVRAM_DATA, val);
+	outb(isaspace_va + NVRAM_S0, addr);
+	outb(isaspace_va + NVRAM_S1, addr>>8);
+	outb(isaspace_va + NVRAM_DATA, val);
 }
 
 /* Function to get ticks per second. */
diff --git a/sys/arch/mvmeppc/pci/mpcpcibr.c b/sys/arch/mvmeppc/pci/mpcpcibr.c
index 8e8af4e8589..5980bbfa16a 100644
--- a/sys/arch/mvmeppc/pci/mpcpcibr.c
+++ b/sys/arch/mvmeppc/pci/mpcpcibr.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mpcpcibr.c,v 1.13 2004/01/28 23:50:19 miod Exp $ */
+/*	$OpenBSD: mpcpcibr.c,v 1.14 2004/01/29 10:58:10 miod Exp $ */
 
 /*
  * Copyright (c) 2001 Steve Murphree, Jr.
@@ -124,6 +124,9 @@ struct powerpc_bus_dma_tag pci_bus_dma_tag = {
 	_bus_dmamem_mmap
 };
 
+extern u_int8_t *ravenregs;
+extern vaddr_t isaspace_va;
+
 int
 mpcpcibrmatch(parent, match, aux)
 	struct device *parent;
@@ -168,8 +171,10 @@ addbatmap(RAVEN_V_PCI_MEM_SPACE, RAVEN_P_PCI_MEM_SPACE, BAT_I);
 	lcp->lc_iot = &sc->sc_iobus_space;
 	lcp->lc_memt = &sc->sc_membus_space;
 
-	lcp->ioh_cf8 = PREP_CONFIG_ADD;
-	lcp->ioh_cfc = PREP_CONFIG_DAT;
+	lcp->ioh_cf8 = (PREP_CONFIG_ADD - RAVEN_P_ISA_IO_SPACE) +
+		(bus_space_handle_t)isaspace_va;
+	lcp->ioh_cfc = (PREP_CONFIG_DAT - RAVEN_P_ISA_IO_SPACE) +
+		(bus_space_handle_t)isaspace_va;
 
 	lcp->config_type = 0;
 
@@ -529,7 +534,7 @@ pci_iack()
 {
 	/* do pci IACK cycle */
 	/* this should be bus allocated. */
-	volatile u_int8_t *iack = (u_int8_t *)RAVEN_PIACK;
+	volatile u_int8_t *iack = ravenregs + RAVEN_PIACK;
 	u_int8_t val;
 
 	val = *iack;
@@ -544,8 +549,7 @@ mpc_cfg_write_1(cp, reg, val)
 {
 	int s;
 	s = splhigh();
-	bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0,
-							RAVEN_REGOFFS(reg));
+	bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
 	bus_space_write_1(cp->lc_iot, cp->ioh_cfc, 0, val);
 	splx(s);
 }