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authorMarcus Glocker <mglocker@cvs.openbsd.org>2007-01-03 18:54:30 +0000
committerMarcus Glocker <mglocker@cvs.openbsd.org>2007-01-03 18:54:30 +0000
commit2b755dd4a0393ce908f591a2271beccbf31a3310 (patch)
tree55beb82397b765ebaea66b714036e4350dbd9996 /sys
parent12be0fc80f44949b884ae2d0f6920a2365d2b629 (diff)
After the firmware has been loaded to the chip, read the exact firmware
revision from the chip and print it in a debug line. Verify that the firmware has the right revision for us.
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/ic/bcw.c63
-rw-r--r--sys/dev/ic/bcwreg.h12
2 files changed, 72 insertions, 3 deletions
diff --git a/sys/dev/ic/bcw.c b/sys/dev/ic/bcw.c
index fe9c3dddc03..9b16bb32875 100644
--- a/sys/dev/ic/bcw.c
+++ b/sys/dev/ic/bcw.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: bcw.c,v 1.24 2007/01/03 14:58:33 mglocker Exp $ */
+/* $OpenBSD: bcw.c,v 1.25 2007/01/03 18:54:29 mglocker Exp $ */
/*
* Copyright (c) 2006 Jon Simola <jsimola@gmail.com>
@@ -64,6 +64,7 @@
#include <uvm/uvm_extern.h>
void bcw_shm_ctl_word(struct bcw_softc *, uint16_t, uint16_t);
+uint16_t bcw_shm_read16(struct bcw_softc *, uint16_t, uint16_t);
void bcw_reset(struct bcw_softc *);
int bcw_init(struct ifnet *);
@@ -118,6 +119,22 @@ bcw_shm_ctl_word(struct bcw_softc *sc, uint16_t routing, uint16_t offset)
BCW_WRITE(sc, BCW_SHM_CONTROL, control);
}
+uint16_t
+bcw_shm_read16(struct bcw_softc *sc, uint16_t routing, uint16_t offset)
+{
+ if (routing == BCW_SHM_CONTROL_SHARED) {
+ if (offset & 0x0003) {
+ bcw_shm_ctl_word(sc, routing, offset >> 2);
+
+ return (BCW_READ16(sc, BCW_SHM_DATAHIGH));
+ }
+ offset >>= 2;
+ }
+ bcw_shm_ctl_word(sc, routing, offset);
+
+ return (BCW_READ16(sc, BCW_SHM_DATA));
+}
+
void
bcw_attach(struct bcw_softc *sc)
{
@@ -1082,7 +1099,8 @@ int
bcw_init(struct ifnet *ifp)
{
struct bcw_softc *sc = ifp->if_softc;
- int error;
+ uint16_t val16;
+ int error, i;
BCW_WRITE(sc, BCW_SBF, BCW_SBF_CORE_READY | BCW_SBF_400_MAGIC);
@@ -1090,6 +1108,47 @@ bcw_init(struct ifnet *ifp)
if ((error = bcw_load_firmware(sc)))
return (error);
+ /*
+ * verify firmware revision
+ */
+ BCW_WRITE(sc, BCW_GIR, 0xffffffff);
+ BCW_WRITE(sc, BCW_SBF, 0x00020402);
+ for (i = 0; i < 50; i++) {
+ if (BCW_READ(sc, BCW_GIR) == BCW_INTR_READY)
+ break;
+ delay(10);
+ }
+ if (i == 50) {
+ printf("%s: interrupt-ready timeout!\n", sc->sc_dev.dv_xname);
+ return (1);
+ }
+ BCW_READ(sc, BCW_GIR); /* dummy read */
+
+ val16 = bcw_shm_read16(sc, BCW_SHM_CONTROL_SHARED, BCW_UCODE_REVISION);
+
+ DPRINTF(("%s: Firmware revision 0x%x, patchlevel 0x%x "
+ "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n",
+ sc->sc_dev.dv_xname, val16,
+ bcw_shm_read16(sc, BCW_SHM_CONTROL_SHARED, BCW_UCODE_PATCHLEVEL),
+ (bcw_shm_read16(sc, BCW_SHM_CONTROL_SHARED, BCW_UCODE_DATE) >> 12)
+ & 0xf,
+ (bcw_shm_read16(sc, BCW_SHM_CONTROL_SHARED, BCW_UCODE_DATE) >> 8)
+ & 0xf,
+ bcw_shm_read16(sc, BCW_SHM_CONTROL_SHARED, BCW_UCODE_DATE)
+ & 0xff,
+ (bcw_shm_read16(sc, BCW_SHM_CONTROL_SHARED, BCW_UCODE_TIME) >> 11)
+ & 0x1f,
+ (bcw_shm_read16(sc, BCW_SHM_CONTROL_SHARED, BCW_UCODE_TIME) >> 5)
+ & 0x3f,
+ bcw_shm_read16(sc, BCW_SHM_CONTROL_SHARED, BCW_UCODE_TIME)
+ & 0x1f));
+
+ if (val16 > 0x128) {
+ printf("%s: no support for this firmware revision!\n",
+ sc->sc_dev.dv_xname);
+ return (1);
+ }
+
/* load init values */
if ((error = bcw_load_initvals(sc)))
return (error);
diff --git a/sys/dev/ic/bcwreg.h b/sys/dev/ic/bcwreg.h
index c93cf9b2da7..fb9a16d64a3 100644
--- a/sys/dev/ic/bcwreg.h
+++ b/sys/dev/ic/bcwreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: bcwreg.h,v 1.8 2006/12/30 23:23:41 mglocker Exp $ */
+/* $OpenBSD: bcwreg.h,v 1.9 2007/01/03 18:54:29 mglocker Exp $ */
/*
* Copyright (c) 2006 Jon Simola <jsimola@gmail.com>
@@ -324,6 +324,16 @@
#define BCW_PHY_TYPEG 0x2 /* 802.11g PHY */
#define BCW_PHY_TYPEN 0x4 /* 802.11n PHY */
+/* generic interrupt reasons */
+#define BCW_INTR_READY (1 << 0)
+
+/* firmware revision informations */
+#define BCW_UCODE_REVISION 0x0000
+#define BCW_UCODE_PATCHLEVEL 0x0002
+#define BCW_UCODE_DATE 0x0004
+#define BCW_UCODE_TIME 0x0006
+#define BCW_UCODE_STATUS 0x0040
+
#define BCW_READ16(sc, reg) \
bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (reg))
#define BCW_READ(sc, reg) \