Change how PCI bus memory base address is found for powerpc.

This is probably quite a hack. however some bridges have multiple
"memory" segment according to the openfirmware data. one is
the pci device probe register area, and the one or two more
that are real address regions. Such as base 0x80000000 sz 0x10000000,
base 0x90000000 sz 0x10000000. This should really be one region
but detecting the "last" region to avoid the first region causes the
wrong base address to be picked. Currently this hardcodes it to
0x80000000 because it seems to work for "normal" pci currently.
openfirmware puts full address in the field and the other devices
seem to work on tested machines.

1 files changed, 13 insertions, 23 deletions

diff --git a/sys/arch/powerpc/pci/mpcpcibus.c b/sys/arch/powerpc/pci/mpcpcibus.c
index b2309155132..b156544fa11 100644
--- a/sys/arch/powerpc/pci/mpcpcibus.c
+++ b/sys/arch/powerpc/pci/mpcpcibus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mpcpcibus.c,v 1.22 2000/10/19 04:53:06 drahn Exp $ */
+/*	$OpenBSD: mpcpcibus.c,v 1.23 2001/03/03 05:40:01 drahn Exp $ */
 
 /*
  * Copyright (c) 1997 Per Fogelstrom
@@ -411,28 +411,18 @@ mpcpcibrattach(parent, self, aux)
 						prange[found].base;
 				}
 
-				found = 0;
-				/* find mem base, flag == 0x02000000 */
-				for (i = 0; i < rangelen ; i++)
-				{
-					if (prange[i].flags == 0x02000000) {
-						/* find last? */
-						found = i;
-					}
-				}
-				/* found the mem space ranges */
-				if (prange[found].flags == 0x02000000) {
-					sc->sc_membus_space.bus_base =
-						prange[found].base;
-
-				}
-				if ( (sc->sc_iobus_space.bus_base == 0) ||
-					(sc->sc_membus_space.bus_base == 0)) {
-					printf("io or memory base not found"
-						"mem %x io %x\n",
-						sc->sc_membus_space.bus_base,
-						sc->sc_iobus_space.bus_base);
-				}
+				/* the mem space ranges 
+				 * apple openfirmware always puts full
+				 * addresses in config information,
+				 * it is not necessary to have correct bus
+				 * base address, but since 0 is reserved
+				 * and all IO and device memory will be in
+				 * upper 2G of address space, set to
+				 * 0x80000000
+				 */
+                         
+				sc->sc_membus_space.bus_base = 0x80000000;
+				sc->sc_membus_space.bus_reverse = 1;
 
 			}