diff options
| author | Miod Vallat <miod@cvs.openbsd.org> | 2009-10-08 19:14:24 +0000 |
|---|---|---|
| committer | Miod Vallat <miod@cvs.openbsd.org> | 2009-10-08 19:14:24 +0000 |
| commit | a318166c6bd5c77ba2758bb0d70ee82229d403db (patch) | |
| tree | 9f2894da399691b07f7d4ee68ae12b87371ac570 /sys | |
| parent | e29fdd6b602d63cdd6e0495e02dc6fcc61cdab62 (diff) | |
Program the widget interrupt address register as a whole 64 bit register
instead of two 32 bit halves, as the supposedly `upper 32 bits' register
ignores writes; makes interrupt on PIC route correctly.
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/arch/sgi/xbow/xbow.c | 6 | ||||
| -rw-r--r-- | sys/arch/sgi/xbow/xbridge.c | 20 |
2 files changed, 18 insertions, 8 deletions
diff --git a/sys/arch/sgi/xbow/xbow.c b/sys/arch/sgi/xbow/xbow.c index 9d62c838b8e..6d98973722a 100644 --- a/sys/arch/sgi/xbow/xbow.c +++ b/sys/arch/sgi/xbow/xbow.c @@ -1,4 +1,4 @@ -/* $OpenBSD: xbow.c,v 1.19 2009/10/08 19:13:00 miod Exp $ */ +/* $OpenBSD: xbow.c,v 1.20 2009/10/08 19:14:23 miod Exp $ */ /* * Copyright (c) 2008, 2009 Miodrag Vallat. @@ -306,7 +306,9 @@ xbowattach(struct device *parent, struct device *self, void *aux) if (xbow_intr_widget_register == 0) xbow_intr_widget_register = (1UL << 47) /* XIO I/O space */ | - ((paddr_t)IP27_RHUB_ADDR(nasid, HUBPI_IR_CHANGE) - + (nasid << + (sys_config.system_type == SGI_O300 ? 39 : 38)) | + ((paddr_t)IP27_RHUB_ADDR(0, HUBPI_IR_CHANGE) - IP27_NODE_IO_BASE(0)) /* HUB register offset */; klcfg.cfg = &cfg; diff --git a/sys/arch/sgi/xbow/xbridge.c b/sys/arch/sgi/xbow/xbridge.c index e9b41d316f0..7513e2f764b 100644 --- a/sys/arch/sgi/xbow/xbridge.c +++ b/sys/arch/sgi/xbow/xbridge.c @@ -1,4 +1,4 @@ -/* $OpenBSD: xbridge.c,v 1.49 2009/10/08 19:10:53 miod Exp $ */ +/* $OpenBSD: xbridge.c,v 1.50 2009/10/08 19:14:23 miod Exp $ */ /* * Copyright (c) 2008, 2009 Miodrag Vallat. @@ -851,7 +851,8 @@ xbridge_intr_establish(void *cookie, pci_intr_handle_t ih, int level, xi->xi_intrsrc = intrsrc; xb->xb_intr[intrbit] = xi; - } + } else + intrsrc = xi->xi_intrsrc; /* * Register the interrupt at the Heart or Hub level if this is the @@ -2033,10 +2034,17 @@ xbridge_setup(struct xbridge_bus *xb) xbridge_write_reg(xb, BRIDGE_INT_MODE, 0); xbridge_write_reg(xb, BRIDGE_INT_DEV, 0); - xbridge_write_reg(xb, WIDGET_INTDEST_ADDR_UPPER, - (xbow_intr_widget_register >> 32) | (xbow_intr_widget << 16)); - xbridge_write_reg(xb, WIDGET_INTDEST_ADDR_LOWER, - (uint32_t)xbow_intr_widget_register); + if (ISSET(xb->xb_flags, XF_PIC)) { + xbridge_write_reg(xb, WIDGET_INTDEST_ADDR_LOWER, + ((uint64_t)xbow_intr_widget << 48) | + (xbow_intr_widget_register & ((1UL << 48) - 1))); + } else { + xbridge_write_reg(xb, WIDGET_INTDEST_ADDR_UPPER, + (xbow_intr_widget_register >> 32) | + (xbow_intr_widget << 16)); + xbridge_write_reg(xb, WIDGET_INTDEST_ADDR_LOWER, + (uint32_t)xbow_intr_widget_register); + } (void)xbridge_read_reg(xb, WIDGET_TFLUSH); } |