diff options
| author | Jason Wright <jason@cvs.openbsd.org> | 2001-04-08 19:16:51 +0000 |
|---|---|---|
| committer | Jason Wright <jason@cvs.openbsd.org> | 2001-04-08 19:16:51 +0000 |
| commit | bbf09d4b0654214e7f73821c4255d4676163d1e7 (patch) | |
| tree | 9767fae3d7df3dafe52f2729c76fd1ea4b9a3b7d /sys | |
| parent | 21c0c8cc87bd52f029300804114aa046e300aa53 (diff) | |
define boot record
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/pci/if_txpreg.h | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/sys/dev/pci/if_txpreg.h b/sys/dev/pci/if_txpreg.h index 0a0be48a581..9a7f94120e4 100644 --- a/sys/dev/pci/if_txpreg.h +++ b/sys/dev/pci/if_txpreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_txpreg.h,v 1.3 2001/04/08 18:26:38 jason Exp $ */ +/* $OpenBSD: if_txpreg.h,v 1.4 2001/04/08 19:16:50 jason Exp $ */ /* * Copyright (c) 2001 Aaron Campbell <aaron@monkey.org>. @@ -334,6 +334,36 @@ struct txp_resp_desc { u_int32_t resp_par3; }; +/* + * boot record (pointers to rings) + */ +struct txp_boot_record { + volatile u_int32_t br_hostring_lo; /* host ring pointer */ + volatile u_int32_t br_hostring_hi; + volatile u_int32_t br_txlopri_lo; /* tx low pri ring */ + volatile u_int32_t br_txlopri_hi; + volatile u_int32_t br_txlopri_siz; + volatile u_int32_t br_txhipri_lo; /* tx high pri ring */ + volatile u_int32_t br_txhipri_hi; + volatile u_int32_t br_txhipri_siz; + volatile u_int32_t br_rxlopri_lo; /* rx low pri ring */ + volatile u_int32_t br_rxlopri_hi; + volatile u_int32_t br_rxlopri_siz; + volatile u_int32_t br_rxbuf_lo; /* rx buffer ring */ + volatile u_int32_t br_rxbuf_hi; + volatile u_int32_t br_rxbuf_siz; + volatile u_int32_t br_ctrl_lo; /* command ring */ + volatile u_int32_t br_ctrl_hi; + volatile u_int32_t br_ctrl_siz; + volatile u_int32_t br_resp_lo; /* response ring */ + volatile u_int32_t br_resp_hi; + volatile u_int32_t br_resp_siz; + volatile u_int32_t br_zero_lo; /* zero word */ + volatile u_int32_t br_zero_hi; + volatile u_int32_t br_rxhipri_lo; /* rx high pri ring */ + volatile u_int32_t br_rxhipri_hi; + volatile u_int32_t br_rxhipri_siz; +}; /* * TYPHOON status register state (in TXP_A2H_0) |