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authorMark Kettenis <kettenis@cvs.openbsd.org>2008-07-20 18:58:08 +0000
committerMark Kettenis <kettenis@cvs.openbsd.org>2008-07-20 18:58:08 +0000
commitd9298e5b6c0f7706da132898e9488ad1eaa700df (patch)
tree370eb97c7f9dce260feb2ac09fd676776ac34739 /sys
parent94acd454650df65b0bf1c604c521193c6a7b4fd9 (diff)
On TI cardbus bridges, enable PCI interrupt routing if the device has not
been initialized by the firmware. This was probably the intention of the origional code, however, it used the wrong default value for the register in question. Add TI PCI1510 to the list of 12XX-compatible bridges. "be brave" deraadt@
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/pci/pccbb.c6
-rw-r--r--sys/dev/pci/pccbbreg.h4
2 files changed, 7 insertions, 3 deletions
diff --git a/sys/dev/pci/pccbb.c b/sys/dev/pci/pccbb.c
index 3e20f703e91..e30f8443613 100644
--- a/sys/dev/pci/pccbb.c
+++ b/sys/dev/pci/pccbb.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pccbb.c,v 1.60 2008/05/22 19:23:04 mk Exp $ */
+/* $OpenBSD: pccbb.c,v 1.61 2008/07/20 18:58:07 kettenis Exp $ */
/* $NetBSD: pccbb.c,v 1.96 2004/03/28 09:49:31 nakayama Exp $ */
/*
@@ -285,6 +285,8 @@ struct yenta_chipinfo {
PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1451), CB_TI12XX,
PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
+ { MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1510), CB_TI12XX,
+ PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI7XX1), CB_TI12XX,
PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
@@ -745,7 +747,7 @@ pccbb_chipinit(sc)
* The TI125X parts have a different register.
*/
reg = pci_conf_read(pc, tag, PCI12XX_MFUNC);
- if (reg == 0) {
+ if (reg == PCI12XX_MFUNC_DEFAULT) {
reg &= ~PCI12XX_MFUNC_PIN0;
reg |= PCI12XX_MFUNC_PIN0_INTA;
if ((pci_conf_read(pc, tag, PCI_SYSCTRL) &
diff --git a/sys/dev/pci/pccbbreg.h b/sys/dev/pci/pccbbreg.h
index 05d4d211878..2513958a06a 100644
--- a/sys/dev/pci/pccbbreg.h
+++ b/sys/dev/pci/pccbbreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pccbbreg.h,v 1.9 2006/04/26 21:21:53 brad Exp $ */
+/* $OpenBSD: pccbbreg.h,v 1.10 2008/07/20 18:58:07 kettenis Exp $ */
/* $NetBSD: pccbbreg.h,v 1.5 2000/06/07 09:02:47 haya Exp $ */
/*
* Copyright (c) 1999 HAYAKAWA Koichi. All rights reserved.
@@ -143,9 +143,11 @@
#define PCI12XX_MFUNC_PIN1_INTB 0x20
#define PCI12XX_MFUNC_PIN2 0x00000F00
#define PCI12XX_MFUNC_PIN3 0x0000F000
+#define PCI12XX_MFUNC_PIN3_INTSER 0x00001000
#define PCI12XX_MFUNC_PIN4 0x000F0000
#define PCI12XX_MFUNC_PIN5 0x00F00000
#define PCI12XX_MFUNC_PIN6 0x0F000000
+#define PCI12XX_MFUNC_DEFAULT PCI12XX_MFUNC_PIN3_INTSER
/* PCI_CBCTRL bits for TI PCI113X */
#define PCI113X_CBCTRL_INT_SERIAL 0x040000