diff options
author | Owain Ainsworth <oga@cvs.openbsd.org> | 2010-03-27 00:09:52 +0000 |
---|---|---|
committer | Owain Ainsworth <oga@cvs.openbsd.org> | 2010-03-27 00:09:52 +0000 |
commit | e3962809f9680ddc9e99c38fbefb899a9fc1cf97 (patch) | |
tree | 95447ec64dc95160e207843cc630709f5cd5a5f5 /sys | |
parent | 0e101a71f9c747c1bf5f853b2faba8c94458bab9 (diff) |
DRM for R600 and R700 chipsets.
note, only the pcidevs for those chipsets that have been tested are
enabled for now. Please contact me if you have a r600 or r700 that does
not attach radeondrm. Only the 2D/Xv bits are here. I'm ambivalent about
the implementation of the RADEON_CS ioctl for OpenGL since that was
originally kernel-modesetting only. When we update mesa I shall think
about (and test) it.
Tested by quite a number. Zero bad reports. Nagged perpetually by
robert@ (and probably others) for months now.
Diffstat (limited to 'sys')
-rw-r--r-- | sys/dev/pci/drm/drmP.h | 1 | ||||
-rw-r--r-- | sys/dev/pci/drm/files.drm | 4 | ||||
-rw-r--r-- | sys/dev/pci/drm/r300_reg.h | 5 | ||||
-rw-r--r-- | sys/dev/pci/drm/r600_blit.c | 850 | ||||
-rw-r--r-- | sys/dev/pci/drm/r600_blit_shaders.c | 1095 | ||||
-rw-r--r-- | sys/dev/pci/drm/r600_blit_shaders.h | 14 | ||||
-rw-r--r-- | sys/dev/pci/drm/r600_microcode.h | 23292 | ||||
-rw-r--r-- | sys/dev/pci/drm/radeon_cp.c | 2521 | ||||
-rw-r--r-- | sys/dev/pci/drm/radeon_drm.h | 9 | ||||
-rw-r--r-- | sys/dev/pci/drm/radeon_drv.c | 75 | ||||
-rw-r--r-- | sys/dev/pci/drm/radeon_drv.h | 891 | ||||
-rw-r--r-- | sys/dev/pci/drm/radeon_irq.c | 31 | ||||
-rw-r--r-- | sys/dev/pci/drm/radeon_state.c | 231 |
13 files changed, 28600 insertions, 419 deletions
diff --git a/sys/dev/pci/drm/drmP.h b/sys/dev/pci/drm/drmP.h index 9ad87614deb..cedc82d2e0e 100644 --- a/sys/dev/pci/drm/drmP.h +++ b/sys/dev/pci/drm/drmP.h @@ -326,6 +326,7 @@ struct drm_mem { #define DRM_ATI_GART_PCI 1 #define DRM_ATI_GART_PCIE 2 #define DRM_ATI_GART_IGP 3 +#define DRM_ATI_GART_R600 4 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : (1ULL<<(n)) -1) #define upper_32_bits(_val) ((u_int32_t)(((_val) >> 16) >> 16)) diff --git a/sys/dev/pci/drm/files.drm b/sys/dev/pci/drm/files.drm index 38dc1a9ef21..102cfd59e92 100644 --- a/sys/dev/pci/drm/files.drm +++ b/sys/dev/pci/drm/files.drm @@ -1,5 +1,5 @@ # $NetBSD: files.drm,v 1.2 2007/03/28 11:29:37 jmcneill Exp $ -# $OpenBSD: files.drm,v 1.17 2009/04/06 20:56:25 oga Exp $ +# $OpenBSD: files.drm,v 1.18 2010/03/27 00:09:50 oga Exp $ # direct rendering modules define drmbase {} @@ -47,6 +47,8 @@ file dev/pci/drm/r128_state.c ragedrm device radeondrm: drmbase attach radeondrm at drmdev file dev/pci/drm/r300_cmdbuf.c radeondrm +file dev/pci/drm/r600_blit.c radeondrm +file dev/pci/drm/r600_blit_shaders.c radeondrm file dev/pci/drm/radeon_cp.c radeondrm file dev/pci/drm/radeon_drv.c radeondrm file dev/pci/drm/radeon_irq.c radeondrm diff --git a/sys/dev/pci/drm/r300_reg.h b/sys/dev/pci/drm/r300_reg.h index 4b6f6d17d16..9fef96bff04 100644 --- a/sys/dev/pci/drm/r300_reg.h +++ b/sys/dev/pci/drm/r300_reg.h @@ -1773,6 +1773,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define R500_RB3D_COLOR_CLEAR_VALUE_AR 0x46c0 #define R500_RB3D_CONSTANT_COLOR_AR 0x4ef8 +#define R300_SU_REG_DEST 0x42c8 +#define RV530_FG_ZBREG_DEST 0x4be8 +#define R300_ZB_ZPASS_DATA 0x4f58 +#define R300_ZB_ZPASS_ADDR 0x4f5c + #endif /* _R300_REG_H */ /* *INDENT-ON* */ diff --git a/sys/dev/pci/drm/r600_blit.c b/sys/dev/pci/drm/r600_blit.c new file mode 100644 index 00000000000..fba9720ea59 --- /dev/null +++ b/sys/dev/pci/drm/r600_blit.c @@ -0,0 +1,850 @@ +/* + * Copyright 2009 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Alex Deucher <alexander.deucher@amd.com> + */ +#include "drmP.h" +#include "drm.h" +#include "radeon_drm.h" +#include "radeon_drv.h" + +#include "r600_blit_shaders.h" + +#define DI_PT_RECTLIST 0x11 +#define DI_INDEX_SIZE_16_BIT 0x0 +#define DI_SRC_SEL_AUTO_INDEX 0x2 + +#define FMT_8 0x1 +#define FMT_5_6_5 0x8 +#define FMT_8_8_8_8 0x1a +#define COLOR_8 0x1 +#define COLOR_5_6_5 0x8 +#define COLOR_8_8_8_8 0x1a + +void r600_nomm_put_vb(struct drm_device *); +int r600_nomm_get_vb(struct drm_device *); +void *r600_nomm_get_vb_ptr(struct drm_device *); + +static inline void +set_render_target(drm_radeon_private_t *dev_priv, int format, int w, int h, u64 gpu_addr) +{ + u32 cb_color_info; + int pitch, slice; + DRM_DEBUG("\n"); + + h = (h + 7) & ~7; + if (h < 8) + h = 8; + + cb_color_info = ((format << 2) | (1 << 27)); + pitch = (w / 8) - 1; + slice = ((w * h) / 64) - 1; + + if (((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_R600) && + ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV770)) { + BEGIN_RING(21 + 2); + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_CB_COLOR0_BASE - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING(gpu_addr >> 8); + OUT_RING(CP_PACKET3(R600_IT_SURFACE_BASE_UPDATE, 0)); + OUT_RING(2 << 0); + } else { + BEGIN_RING(21); + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_CB_COLOR0_BASE - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING(gpu_addr >> 8); + } + + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_CB_COLOR0_SIZE - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING((pitch << 0) | (slice << 10)); + + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_CB_COLOR0_VIEW - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING(0); + + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_CB_COLOR0_INFO - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING(cb_color_info); + + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_CB_COLOR0_TILE - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING(0); + + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_CB_COLOR0_FRAG - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING(0); + + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_CB_COLOR0_MASK - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING(0); + + ADVANCE_RING(); +} + +static inline void +cp_set_surface_sync(drm_radeon_private_t *dev_priv, + u32 sync_type, u32 size, u64 mc_addr) +{ + u32 cp_coher_size; + DRM_DEBUG("\n"); + + if (size == 0xffffffff) + cp_coher_size = 0xffffffff; + else + cp_coher_size = ((size + 255) >> 8); + + BEGIN_RING(5); + OUT_RING(CP_PACKET3(R600_IT_SURFACE_SYNC, 3)); + OUT_RING(sync_type); + OUT_RING(cp_coher_size); + OUT_RING((mc_addr >> 8)); + OUT_RING(10); /* poll interval */ + ADVANCE_RING(); +} + +static inline void +set_shaders(struct drm_device *dev) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + u64 gpu_addr; + int shader_size, i; + u32 *vs, *ps; + uint32_t sq_pgm_resources; + DRM_DEBUG("\n"); + + /* load shaders */ + vs = (u32 *) ((char *)dev->agp_buffer_map->handle + dev_priv->blit_vb->offset); + ps = (u32 *) ((char *)dev->agp_buffer_map->handle + dev_priv->blit_vb->offset + 256); + + shader_size = r6xx_vs_size; + for (i = 0; i < shader_size; i++) + vs[i] = r6xx_vs[i]; + shader_size = r6xx_ps_size; + for (i = 0; i < shader_size; i++) + ps[i] = r6xx_ps[i]; + + dev_priv->blit_vb->used = 512; + + gpu_addr = dev_priv->gart_buffers_offset + dev_priv->blit_vb->offset; + + /* setup shader regs */ + sq_pgm_resources = (1 << 0); + + BEGIN_RING(9 + 12); + /* VS */ + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_SQ_PGM_START_VS - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING(gpu_addr >> 8); + + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_SQ_PGM_RESOURCES_VS - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING(sq_pgm_resources); + + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_SQ_PGM_CF_OFFSET_VS - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING(0); + + /* PS */ + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_SQ_PGM_START_PS - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING((gpu_addr + 256) >> 8); + + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_SQ_PGM_RESOURCES_PS - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING(sq_pgm_resources | (1 << 28)); + + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_SQ_PGM_EXPORTS_PS - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING(2); + + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 1)); + OUT_RING((R600_SQ_PGM_CF_OFFSET_PS - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING(0); + ADVANCE_RING(); + + cp_set_surface_sync(dev_priv, + R600_SH_ACTION_ENA, 512, gpu_addr); +} + +static inline void +set_vtx_resource(drm_radeon_private_t *dev_priv, u64 gpu_addr) +{ + uint32_t sq_vtx_constant_word2; + DRM_DEBUG("\n"); + + sq_vtx_constant_word2 = (((gpu_addr >> 32) & 0xff) | (16 << 8)); + + BEGIN_RING(9); + OUT_RING(CP_PACKET3(R600_IT_SET_RESOURCE, 7)); + OUT_RING(0x460); + OUT_RING(gpu_addr & 0xffffffff); + OUT_RING(48 - 1); + OUT_RING(sq_vtx_constant_word2); + OUT_RING(1 << 0); + OUT_RING(0); + OUT_RING(0); + OUT_RING(R600_SQ_TEX_VTX_VALID_BUFFER << 30); + ADVANCE_RING(); + + if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)) + cp_set_surface_sync(dev_priv, + R600_TC_ACTION_ENA, 48, gpu_addr); + else + cp_set_surface_sync(dev_priv, + R600_VC_ACTION_ENA, 48, gpu_addr); +} + +static inline void +set_tex_resource(drm_radeon_private_t *dev_priv, + int format, int w, int h, int pitch, u64 gpu_addr) +{ + uint32_t sq_tex_resource_word0, sq_tex_resource_word1, sq_tex_resource_word4; + DRM_DEBUG("\n"); + + if (h < 1) + h = 1; + + sq_tex_resource_word0 = (1 << 0); + sq_tex_resource_word0 |= ((((pitch >> 3) - 1) << 8) | + ((w - 1) << 19)); + + sq_tex_resource_word1 = (format << 26); + sq_tex_resource_word1 |= ((h - 1) << 0); + + sq_tex_resource_word4 = ((1 << 14) | + (0 << 16) | + (1 << 19) | + (2 << 22) | + (3 << 25)); + + BEGIN_RING(9); + OUT_RING(CP_PACKET3(R600_IT_SET_RESOURCE, 7)); + OUT_RING(0); + OUT_RING(sq_tex_resource_word0); + OUT_RING(sq_tex_resource_word1); + OUT_RING(gpu_addr >> 8); + OUT_RING(gpu_addr >> 8); + OUT_RING(sq_tex_resource_word4); + OUT_RING(0); + OUT_RING(R600_SQ_TEX_VTX_VALID_TEXTURE << 30); + ADVANCE_RING(); + +} + +static inline void +set_scissors(drm_radeon_private_t *dev_priv, int x1, int y1, int x2, int y2) +{ + DRM_DEBUG("\n"); + + BEGIN_RING(12); + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 2)); + OUT_RING((R600_PA_SC_SCREEN_SCISSOR_TL - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING((x1 << 0) | (y1 << 16)); + OUT_RING((x2 << 0) | (y2 << 16)); + + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 2)); + OUT_RING((R600_PA_SC_GENERIC_SCISSOR_TL - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING((x1 << 0) | (y1 << 16) | (1 << 31)); + OUT_RING((x2 << 0) | (y2 << 16)); + + OUT_RING(CP_PACKET3(R600_IT_SET_CONTEXT_REG, 2)); + OUT_RING((R600_PA_SC_WINDOW_SCISSOR_TL - R600_SET_CONTEXT_REG_OFFSET) >> 2); + OUT_RING((x1 << 0) | (y1 << 16) | (1 << 31)); + OUT_RING((x2 << 0) | (y2 << 16)); + ADVANCE_RING(); +} + +static inline void +draw_auto(drm_radeon_private_t *dev_priv) +{ + DRM_DEBUG("\n"); + + BEGIN_RING(10); + OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1)); + OUT_RING((R600_VGT_PRIMITIVE_TYPE - R600_SET_CONFIG_REG_OFFSET) >> 2); + OUT_RING(DI_PT_RECTLIST); + + OUT_RING(CP_PACKET3(R600_IT_INDEX_TYPE, 0)); + OUT_RING(DI_INDEX_SIZE_16_BIT); + + OUT_RING(CP_PACKET3(R600_IT_NUM_INSTANCES, 0)); + OUT_RING(1); + + OUT_RING(CP_PACKET3(R600_IT_DRAW_INDEX_AUTO, 1)); + OUT_RING(3); + OUT_RING(DI_SRC_SEL_AUTO_INDEX); + + ADVANCE_RING(); + COMMIT_RING(); +} + +static inline void +set_default_state(drm_radeon_private_t *dev_priv) +{ + int default_state_dw, i; + u32 sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2; + u32 sq_thread_resource_mgmt, sq_stack_resource_mgmt_1, sq_stack_resource_mgmt_2; + int num_ps_gprs, num_vs_gprs, num_temp_gprs, num_gs_gprs, num_es_gprs; + int num_ps_threads, num_vs_threads, num_gs_threads, num_es_threads; + int num_ps_stack_entries, num_vs_stack_entries, num_gs_stack_entries, num_es_stack_entries; + + switch ((dev_priv->flags & RADEON_FAMILY_MASK)) { + case CHIP_R600: + num_ps_gprs = 192; + num_vs_gprs = 56; + num_temp_gprs = 4; + num_gs_gprs = 0; + num_es_gprs = 0; + num_ps_threads = 136; + num_vs_threads = 48; + num_gs_threads = 4; + num_es_threads = 4; + num_ps_stack_entries = 128; + num_vs_stack_entries = 128; + num_gs_stack_entries = 0; + num_es_stack_entries = 0; + break; + case CHIP_RV630: + case CHIP_RV635: + num_ps_gprs = 84; + num_vs_gprs = 36; + num_temp_gprs = 4; + num_gs_gprs = 0; + num_es_gprs = 0; + num_ps_threads = 144; + num_vs_threads = 40; + num_gs_threads = 4; + num_es_threads = 4; + num_ps_stack_entries = 40; + num_vs_stack_entries = 40; + num_gs_stack_entries = 32; + num_es_stack_entries = 16; + break; + case CHIP_RV610: + case CHIP_RV620: + case CHIP_RS780: + case CHIP_RS880: + default: + num_ps_gprs = 84; + num_vs_gprs = 36; + num_temp_gprs = 4; + num_gs_gprs = 0; + num_es_gprs = 0; + num_ps_threads = 136; + num_vs_threads = 48; + num_gs_threads = 4; + num_es_threads = 4; + num_ps_stack_entries = 40; + num_vs_stack_entries = 40; + num_gs_stack_entries = 32; + num_es_stack_entries = 16; + break; + case CHIP_RV670: + num_ps_gprs = 144; + num_vs_gprs = 40; + num_temp_gprs = 4; + num_gs_gprs = 0; + num_es_gprs = 0; + num_ps_threads = 136; + num_vs_threads = 48; + num_gs_threads = 4; + num_es_threads = 4; + num_ps_stack_entries = 40; + num_vs_stack_entries = 40; + num_gs_stack_entries = 32; + num_es_stack_entries = 16; + break; + case CHIP_RV770: + num_ps_gprs = 192; + num_vs_gprs = 56; + num_temp_gprs = 4; + num_gs_gprs = 0; + num_es_gprs = 0; + num_ps_threads = 188; + num_vs_threads = 60; + num_gs_threads = 0; + num_es_threads = 0; + num_ps_stack_entries = 256; + num_vs_stack_entries = 256; + num_gs_stack_entries = 0; + num_es_stack_entries = 0; + break; + case CHIP_RV730: + case CHIP_RV740: + num_ps_gprs = 84; + num_vs_gprs = 36; + num_temp_gprs = 4; + num_gs_gprs = 0; + num_es_gprs = 0; + num_ps_threads = 188; + num_vs_threads = 60; + num_gs_threads = 0; + num_es_threads = 0; + num_ps_stack_entries = 128; + num_vs_stack_entries = 128; + num_gs_stack_entries = 0; + num_es_stack_entries = 0; + break; + case CHIP_RV710: + num_ps_gprs = 192; + num_vs_gprs = 56; + num_temp_gprs = 4; + num_gs_gprs = 0; + num_es_gprs = 0; + num_ps_threads = 144; + num_vs_threads = 48; + num_gs_threads = 0; + num_es_threads = 0; + num_ps_stack_entries = 128; + num_vs_stack_entries = 128; + num_gs_stack_entries = 0; + num_es_stack_entries = 0; + break; + } + + if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)) + sq_config = 0; + else + sq_config = R600_VC_ENABLE; + + sq_config |= (R600_DX9_CONSTS | + R600_ALU_INST_PREFER_VECTOR | + R600_PS_PRIO(0) | + R600_VS_PRIO(1) | + R600_GS_PRIO(2) | + R600_ES_PRIO(3)); + + sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(num_ps_gprs) | + R600_NUM_VS_GPRS(num_vs_gprs) | + R600_NUM_CLAUSE_TEMP_GPRS(num_temp_gprs)); + sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(num_gs_gprs) | + R600_NUM_ES_GPRS(num_es_gprs)); + sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(num_ps_threads) | + R600_NUM_VS_THREADS(num_vs_threads) | + R600_NUM_GS_THREADS(num_gs_threads) | + R600_NUM_ES_THREADS(num_es_threads)); + sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(num_ps_stack_entries) | + R600_NUM_VS_STACK_ENTRIES(num_vs_stack_entries)); + sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(num_gs_stack_entries) | + R600_NUM_ES_STACK_ENTRIES(num_es_stack_entries)); + + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) { + default_state_dw = r7xx_default_size * 4; + BEGIN_RING(default_state_dw + 10); + for (i = 0; i < default_state_dw; i++) + OUT_RING(r7xx_default_state[i]); + } else { + default_state_dw = r6xx_default_size * 4; + BEGIN_RING(default_state_dw + 10); + for (i = 0; i < default_state_dw; i++) + OUT_RING(r6xx_default_state[i]); + } + OUT_RING(CP_PACKET3(R600_IT_EVENT_WRITE, 0)); + OUT_RING(R600_CACHE_FLUSH_AND_INV_EVENT); + /* SQ config */ + OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 6)); + OUT_RING((R600_SQ_CONFIG - R600_SET_CONFIG_REG_OFFSET) >> 2); + OUT_RING(sq_config); + OUT_RING(sq_gpr_resource_mgmt_1); + OUT_RING(sq_gpr_resource_mgmt_2); + OUT_RING(sq_thread_resource_mgmt); + OUT_RING(sq_stack_resource_mgmt_1); + OUT_RING(sq_stack_resource_mgmt_2); + ADVANCE_RING(); +} + +static inline uint32_t i2f(uint32_t input) +{ + u32 result, i, exponent, fraction; + + if ((input & 0x3fff) == 0) + result = 0; /* 0 is a special case */ + else { + exponent = 140; /* exponent biased by 127; */ + fraction = (input & 0x3fff) << 10; /* cheat and only + handle numbers below 2^^15 */ + for (i = 0; i < 14; i++) { + if (fraction & 0x800000) + break; + else { + fraction = fraction << 1; /* keep + shifting left until top bit = 1 */ + exponent = exponent - 1; + } + } + result = exponent << 23 | (fraction & 0x7fffff); /* mask + off top bit; assumed 1 */ + } + return result; +} + + +int r600_nomm_get_vb(struct drm_device *dev) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + dev_priv->blit_vb = radeon_freelist_get(dev); + if (!dev_priv->blit_vb) { + DRM_ERROR("Unable to allocate vertex buffer for blit\n"); + return -EAGAIN; + } + return 0; +} + +void r600_nomm_put_vb(struct drm_device *dev) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + + dev_priv->blit_vb->used = 0; + radeon_cp_discard_buffer(dev, dev_priv->blit_vb); +} + +void *r600_nomm_get_vb_ptr(struct drm_device *dev) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + return (((char *)dev->agp_buffer_map->handle + + dev_priv->blit_vb->offset + dev_priv->blit_vb->used)); +} + +int +r600_prepare_blit_copy(struct drm_device *dev, struct drm_file *file_priv) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + DRM_DEBUG("\n"); + + r600_nomm_get_vb(dev); + + dev_priv->blit_vb->file_priv = file_priv; + + set_default_state(dev_priv); + set_shaders(dev); + + return 0; +} + + +void +r600_done_blit_copy(struct drm_device *dev) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + DRM_DEBUG("\n"); + + BEGIN_RING(5); + OUT_RING(CP_PACKET3(R600_IT_EVENT_WRITE, 0)); + OUT_RING(R600_CACHE_FLUSH_AND_INV_EVENT); + /* wait for 3D idle clean */ + OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1)); + OUT_RING((R600_WAIT_UNTIL - R600_SET_CONFIG_REG_OFFSET) >> 2); + OUT_RING(RADEON_WAIT_3D_IDLE | RADEON_WAIT_3D_IDLECLEAN); + + ADVANCE_RING(); + COMMIT_RING(); + + r600_nomm_put_vb(dev); +} + +void +r600_blit_copy(struct drm_device *dev, + uint64_t src_gpu_addr, uint64_t dst_gpu_addr, + int size_bytes) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + int max_bytes; + u64 vb_addr; + u32 *vb; + + vb = r600_nomm_get_vb_ptr(dev); + + if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) { + max_bytes = 8192; + + while (size_bytes) { + int cur_size = size_bytes; + int src_x = src_gpu_addr & 255; + int dst_x = dst_gpu_addr & 255; + int h = 1; + src_gpu_addr = src_gpu_addr & ~255; + dst_gpu_addr = dst_gpu_addr & ~255; + + if (!src_x && !dst_x) { + h = (cur_size / max_bytes); + if (h > 8192) + h = 8192; + if (h == 0) + h = 1; + else + cur_size = max_bytes; + } else { + if (cur_size > max_bytes) + cur_size = max_bytes; + if (cur_size > (max_bytes - dst_x)) + cur_size = (max_bytes - dst_x); + if (cur_size > (max_bytes - src_x)) + cur_size = (max_bytes - src_x); + } + + if ((dev_priv->blit_vb->used + 48) > dev_priv->blit_vb->total) { + + r600_nomm_put_vb(dev); + r600_nomm_get_vb(dev); + if (!dev_priv->blit_vb) + return; + set_shaders(dev); + vb = r600_nomm_get_vb_ptr(dev); + } + + vb[0] = i2f(dst_x); + vb[1] = 0; + vb[2] = i2f(src_x); + vb[3] = 0; + + vb[4] = i2f(dst_x); + vb[5] = i2f(h); + vb[6] = i2f(src_x); + vb[7] = i2f(h); + + vb[8] = i2f(dst_x + cur_size); + vb[9] = i2f(h); + vb[10] = i2f(src_x + cur_size); + vb[11] = i2f(h); + + /* src */ + set_tex_resource(dev_priv, FMT_8, + src_x + cur_size, h, src_x + cur_size, + src_gpu_addr); + + cp_set_surface_sync(dev_priv, + R600_TC_ACTION_ENA, (src_x + cur_size * h), src_gpu_addr); + + /* dst */ + set_render_target(dev_priv, COLOR_8, + dst_x + cur_size, h, + dst_gpu_addr); + + /* scissors */ + set_scissors(dev_priv, dst_x, 0, dst_x + cur_size, h); + + /* Vertex buffer setup */ + vb_addr = dev_priv->gart_buffers_offset + + dev_priv->blit_vb->offset + + dev_priv->blit_vb->used; + set_vtx_resource(dev_priv, vb_addr); + + /* draw */ + draw_auto(dev_priv); + + cp_set_surface_sync(dev_priv, + R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA, + cur_size * h, dst_gpu_addr); + + vb += 12; + dev_priv->blit_vb->used += 12 * 4; + + src_gpu_addr += cur_size * h; + dst_gpu_addr += cur_size * h; + size_bytes -= cur_size * h; + } + } else { + max_bytes = 8192 * 4; + + while (size_bytes) { + int cur_size = size_bytes; + int src_x = (src_gpu_addr & 255); + int dst_x = (dst_gpu_addr & 255); + int h = 1; + src_gpu_addr = src_gpu_addr & ~255; + dst_gpu_addr = dst_gpu_addr & ~255; + + if (!src_x && !dst_x) { + h = (cur_size / max_bytes); + if (h > 8192) + h = 8192; + if (h == 0) + h = 1; + else + cur_size = max_bytes; + } else { + if (cur_size > max_bytes) + cur_size = max_bytes; + if (cur_size > (max_bytes - dst_x)) + cur_size = (max_bytes - dst_x); + if (cur_size > (max_bytes - src_x)) + cur_size = (max_bytes - src_x); + } + + if ((dev_priv->blit_vb->used + 48) > dev_priv->blit_vb->total) { + r600_nomm_put_vb(dev); + r600_nomm_get_vb(dev); + if (!dev_priv->blit_vb) + return; + + set_shaders(dev); + vb = r600_nomm_get_vb_ptr(dev); + } + + vb[0] = i2f(dst_x / 4); + vb[1] = 0; + vb[2] = i2f(src_x / 4); + vb[3] = 0; + + vb[4] = i2f(dst_x / 4); + vb[5] = i2f(h); + vb[6] = i2f(src_x / 4); + vb[7] = i2f(h); + + vb[8] = i2f((dst_x + cur_size) / 4); + vb[9] = i2f(h); + vb[10] = i2f((src_x + cur_size) / 4); + vb[11] = i2f(h); + + /* src */ + set_tex_resource(dev_priv, FMT_8_8_8_8, + (src_x + cur_size) / 4, + h, (src_x + cur_size) / 4, + src_gpu_addr); + + cp_set_surface_sync(dev_priv, + R600_TC_ACTION_ENA, (src_x + cur_size * h), src_gpu_addr); + + /* dst */ + set_render_target(dev_priv, COLOR_8_8_8_8, + dst_x + cur_size, h, + dst_gpu_addr); + + /* scissors */ + set_scissors(dev_priv, (dst_x / 4), 0, (dst_x + cur_size / 4), h); + + /* Vertex buffer setup */ + vb_addr = dev_priv->gart_buffers_offset + + dev_priv->blit_vb->offset + + dev_priv->blit_vb->used; + set_vtx_resource(dev_priv, vb_addr); + + /* draw */ + draw_auto(dev_priv); + + cp_set_surface_sync(dev_priv, + R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA, + cur_size * h, dst_gpu_addr); + + vb += 12; + dev_priv->blit_vb->used += 12 * 4; + + src_gpu_addr += cur_size * h; + dst_gpu_addr += cur_size * h; + size_bytes -= cur_size * h; + } + } +} + +void +r600_blit_swap(struct drm_device *dev, + uint64_t src_gpu_addr, uint64_t dst_gpu_addr, + int sx, int sy, int dx, int dy, + int w, int h, int src_pitch, int dst_pitch, int cpp) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + int cb_format, tex_format; + u64 vb_addr; + u32 *vb; + + vb = (u32 *) ((char *)dev->agp_buffer_map->handle + + dev_priv->blit_vb->offset + dev_priv->blit_vb->used); + + if ((dev_priv->blit_vb->used + 48) > dev_priv->blit_vb->total) { + + r600_nomm_put_vb(dev); + r600_nomm_get_vb(dev); + if (!dev_priv->blit_vb) + return; + + set_shaders(dev); + vb = r600_nomm_get_vb_ptr(dev); + } + + if (cpp == 4) { + cb_format = COLOR_8_8_8_8; + tex_format = FMT_8_8_8_8; + } else if (cpp == 2) { + cb_format = COLOR_5_6_5; + tex_format = FMT_5_6_5; + } else { + cb_format = COLOR_8; + tex_format = FMT_8; + } + + vb[0] = i2f(dx); + vb[1] = i2f(dy); + vb[2] = i2f(sx); + vb[3] = i2f(sy); + + vb[4] = i2f(dx); + vb[5] = i2f(dy + h); + vb[6] = i2f(sx); + vb[7] = i2f(sy + h); + + vb[8] = i2f(dx + w); + vb[9] = i2f(dy + h); + vb[10] = i2f(sx + w); + vb[11] = i2f(sy + h); + + /* src */ + set_tex_resource(dev_priv, tex_format, + src_pitch / cpp, + sy + h, src_pitch / cpp, + src_gpu_addr); + + cp_set_surface_sync(dev_priv, + R600_TC_ACTION_ENA, (src_pitch * (sy + h)), src_gpu_addr); + + /* dst */ + set_render_target(dev_priv, cb_format, + dst_pitch / cpp, dy + h, + dst_gpu_addr); + + /* scissors */ + set_scissors(dev_priv, dx, dy, dx + w, dy + h); + + /* Vertex buffer setup */ + vb_addr = dev_priv->gart_buffers_offset + + dev_priv->blit_vb->offset + + dev_priv->blit_vb->used; + set_vtx_resource(dev_priv, vb_addr); + + /* draw */ + draw_auto(dev_priv); + + cp_set_surface_sync(dev_priv, + R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA, + dst_pitch * (dy + h), dst_gpu_addr); + + dev_priv->blit_vb->used += 12 * 4; +} diff --git a/sys/dev/pci/drm/r600_blit_shaders.c b/sys/dev/pci/drm/r600_blit_shaders.c new file mode 100644 index 00000000000..d0b5b9c2b29 --- /dev/null +++ b/sys/dev/pci/drm/r600_blit_shaders.c @@ -0,0 +1,1095 @@ +/* + * Copyright 2009 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Alex Deucher <alexander.deucher@amd.com> + */ +#include <sys/param.h> + +const u_int32_t r6xx_default_state[] = +{ + 0xc0002400, + 0x00000000, + 0xc0012800, + 0x80000000, + 0x80000000, + 0xc0004600, + 0x00000016, + 0xc0016800, + 0x00000010, + 0x00028000, + 0xc0016800, + 0x00000010, + 0x00008000, + 0xc0016800, + 0x00000542, + 0x07000003, + 0xc0016800, + 0x000005c5, + 0x00000000, + 0xc0016800, + 0x00000363, + 0x00000000, + 0xc0016800, + 0x0000060c, + 0x82000000, + 0xc0016800, + 0x0000060e, + 0x01020204, + 0xc0016f00, + 0x00000000, + 0x00000000, + 0xc0016f00, + 0x00000001, + 0x00000000, + 0xc0096900, + 0x0000022a, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0xc0016900, + 0x00000004, + 0x00000000, + 0xc0016900, + 0x0000000a, + 0x00000000, + 0xc0016900, + 0x0000000b, + 0x00000000, + 0xc0016900, + 0x0000010c, + 0x00000000, + 0xc0016900, + 0x0000010d, + 0x00000000, + 0xc0016900, + 0x00000200, + 0x00000000, + 0xc0016900, + 0x00000343, + 0x00000060, + 0xc0016900, + 0x00000344, + 0x00000040, + 0xc0016900, + 0x00000351, + 0x0000aa00, + 0xc0016900, + 0x00000104, + 0x00000000, + 0xc0016900, + 0x0000010e, + 0x00000000, + 0xc0046900, + 0x00000105, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0xc0036900, + 0x00000109, + 0x00000000, + 0x00000000, + 0x00000000, + 0xc0046900, + 0x0000030c, + 0x01000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0xc0046900, + 0x00000048, + 0x3f800000, + 0x00000000, + 0x3f800000, + 0x3f800000, + 0xc0016900, + 0x0000008e, + 0x0000000f, + 0xc0016900, + 0x00000080, + 0x00000000, + 0xc0016900, + 0x00000083, + 0x0000ffff, + 0xc0016900, + 0x00000084, + 0x00000000, + 0xc0016900, + 0x00000085, + 0x20002000, + 0xc0016900, + 0x00000086, + 0x00000000, + 0xc0016900, + 0x00000087, + 0x20002000, + 0xc0016900, + 0x00000088, + 0x00000000, + 0xc0016900, + 0x00000089, + 0x20002000, + 0xc0016900, + 0x0000008a, + 0x00000000, + 0xc0016900, + 0x0000008b, + 0x20002000, + 0xc0016900, + 0x0000008c, + 0x00000000, + 0xc0016900, + 0x00000094, + 0x80000000, + 0xc0016900, + 0x00000095, + 0x20002000, + 0xc0026900, + 0x000000b4, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x00000096, + 0x80000000, + 0xc0016900, + 0x00000097, + 0x20002000, + 0xc0026900, + 0x000000b6, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x00000098, + 0x80000000, + 0xc0016900, + 0x00000099, + 0x20002000, + 0xc0026900, + 0x000000b8, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x0000009a, + 0x80000000, + 0xc0016900, + 0x0000009b, + 0x20002000, + 0xc0026900, + 0x000000ba, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x0000009c, + 0x80000000, + 0xc0016900, + 0x0000009d, + 0x20002000, + 0xc0026900, + 0x000000bc, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x0000009e, + 0x80000000, + 0xc0016900, + 0x0000009f, + 0x20002000, + 0xc0026900, + 0x000000be, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000a0, + 0x80000000, + 0xc0016900, + 0x000000a1, + 0x20002000, + 0xc0026900, + 0x000000c0, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000a2, + 0x80000000, + 0xc0016900, + 0x000000a3, + 0x20002000, + 0xc0026900, + 0x000000c2, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000a4, + 0x80000000, + 0xc0016900, + 0x000000a5, + 0x20002000, + 0xc0026900, + 0x000000c4, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000a6, + 0x80000000, + 0xc0016900, + 0x000000a7, + 0x20002000, + 0xc0026900, + 0x000000c6, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000a8, + 0x80000000, + 0xc0016900, + 0x000000a9, + 0x20002000, + 0xc0026900, + 0x000000c8, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000aa, + 0x80000000, + 0xc0016900, + 0x000000ab, + 0x20002000, + 0xc0026900, + 0x000000ca, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000ac, + 0x80000000, + 0xc0016900, + 0x000000ad, + 0x20002000, + 0xc0026900, + 0x000000cc, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000ae, + 0x80000000, + 0xc0016900, + 0x000000af, + 0x20002000, + 0xc0026900, + 0x000000ce, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000b0, + 0x80000000, + 0xc0016900, + 0x000000b1, + 0x20002000, + 0xc0026900, + 0x000000d0, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000b2, + 0x80000000, + 0xc0016900, + 0x000000b3, + 0x20002000, + 0xc0026900, + 0x000000d2, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x00000293, + 0x00004010, + 0xc0016900, + 0x00000300, + 0x00000000, + 0xc0016900, + 0x00000301, + 0x00000000, + 0xc0016900, + 0x00000312, + 0xffffffff, + 0xc0016900, + 0x00000307, + 0x00000000, + 0xc0016900, + 0x00000308, + 0x00000000, + 0xc0016900, + 0x00000283, + 0x00000000, + 0xc0016900, + 0x00000292, + 0x00000000, + 0xc0066900, + 0x0000010f, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0xc0016900, + 0x00000206, + 0x00000000, + 0xc0016900, + 0x00000207, + 0x00000000, + 0xc0016900, + 0x00000208, + 0x00000000, + 0xc0046900, + 0x00000303, + 0x3f800000, + 0x3f800000, + 0x3f800000, + 0x3f800000, + 0xc0016900, + 0x00000205, + 0x00000004, + 0xc0016900, + 0x00000280, + 0x00000000, + 0xc0016900, + 0x00000281, + 0x00000000, + 0xc0016900, + 0x0000037e, + 0x00000000, + 0xc0016900, + 0x00000382, + 0x00000000, + 0xc0016900, + 0x00000380, + 0x00000000, + 0xc0016900, + 0x00000383, + 0x00000000, + 0xc0016900, + 0x00000381, + 0x00000000, + 0xc0016900, + 0x00000282, + 0x00000008, + 0xc0016900, + 0x00000302, + 0x0000002d, + 0xc0016900, + 0x0000037f, + 0x00000000, + 0xc0016900, + 0x000001b2, + 0x00000000, + 0xc0016900, + 0x000001b6, + 0x00000000, + 0xc0016900, + 0x000001b7, + 0x00000000, + 0xc0016900, + 0x000001b8, + 0x00000000, + 0xc0016900, + 0x000001b9, + 0x00000000, + 0xc0016900, + 0x00000225, + 0x00000000, + 0xc0016900, + 0x00000229, + 0x00000000, + 0xc0016900, + 0x00000237, + 0x00000000, + 0xc0016900, + 0x00000100, + 0x00000800, + 0xc0016900, + 0x00000101, + 0x00000000, + 0xc0016900, + 0x00000102, + 0x00000000, + 0xc0016900, + 0x000002a8, + 0x00000000, + 0xc0016900, + 0x000002a9, + 0x00000000, + 0xc0016900, + 0x00000103, + 0x00000000, + 0xc0016900, + 0x00000284, + 0x00000000, + 0xc0016900, + 0x00000290, + 0x00000000, + 0xc0016900, + 0x00000285, + 0x00000000, + 0xc0016900, + 0x00000286, + 0x00000000, + 0xc0016900, + 0x00000287, + 0x00000000, + 0xc0016900, + 0x00000288, + 0x00000000, + 0xc0016900, + 0x00000289, + 0x00000000, + 0xc0016900, + 0x0000028a, + 0x00000000, + 0xc0016900, + 0x0000028b, + 0x00000000, + 0xc0016900, + 0x0000028c, + 0x00000000, + 0xc0016900, + 0x0000028d, + 0x00000000, + 0xc0016900, + 0x0000028e, + 0x00000000, + 0xc0016900, + 0x0000028f, + 0x00000000, + 0xc0016900, + 0x000002a1, + 0x00000000, + 0xc0016900, + 0x000002a5, + 0x00000000, + 0xc0016900, + 0x000002ac, + 0x00000000, + 0xc0016900, + 0x000002ad, + 0x00000000, + 0xc0016900, + 0x000002ae, + 0x00000000, + 0xc0016900, + 0x000002c8, + 0x00000000, + 0xc0016900, + 0x00000206, + 0x00000100, + 0xc0016900, + 0x00000204, + 0x00010000, + 0xc0036e00, + 0x00000000, + 0x00000012, + 0x00000000, + 0x00000000, + 0xc0016900, + 0x0000008f, + 0x0000000f, + 0xc0016900, + 0x000001e8, + 0x00000001, + 0xc0016900, + 0x00000202, + 0x00cc0000, + 0xc0016900, + 0x00000205, + 0x00000244, + 0xc0016900, + 0x00000203, + 0x00000210, + 0xc0016900, + 0x000001b1, + 0x00000000, + 0xc0016900, + 0x00000185, + 0x00000000, + 0xc0016900, + 0x000001b3, + 0x00000001, + 0xc0016900, + 0x000001b4, + 0x00000000, + 0xc0016900, + 0x00000191, + 0x00000b00, + 0xc0016900, + 0x000001b5, + 0x00000000, +}; + +const u_int32_t r7xx_default_state[] = +{ + 0xc0012800, + 0x80000000, + 0x80000000, + 0xc0004600, + 0x00000016, + 0xc0016800, + 0x00000010, + 0x00028000, + 0xc0016800, + 0x00000010, + 0x00008000, + 0xc0016800, + 0x00000542, + 0x07000002, + 0xc0016800, + 0x000005c5, + 0x00000000, + 0xc0016800, + 0x00000363, + 0x00004000, + 0xc0016800, + 0x0000060c, + 0x00000000, + 0xc0016800, + 0x0000060e, + 0x00420204, + 0xc0016f00, + 0x00000000, + 0x00000000, + 0xc0016f00, + 0x00000001, + 0x00000000, + 0xc0096900, + 0x0000022a, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0xc0016900, + 0x00000004, + 0x00000000, + 0xc0016900, + 0x0000000a, + 0x00000000, + 0xc0016900, + 0x0000000b, + 0x00000000, + 0xc0016900, + 0x0000010c, + 0x00000000, + 0xc0016900, + 0x0000010d, + 0x00000000, + 0xc0016900, + 0x00000200, + 0x00000000, + 0xc0016900, + 0x00000343, + 0x00000060, + 0xc0016900, + 0x00000344, + 0x00000000, + 0xc0016900, + 0x00000351, + 0x0000aa00, + 0xc0016900, + 0x00000104, + 0x00000000, + 0xc0016900, + 0x0000010e, + 0x00000000, + 0xc0046900, + 0x00000105, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0xc0046900, + 0x0000030c, + 0x01000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0xc0016900, + 0x0000008e, + 0x0000000f, + 0xc0016900, + 0x00000080, + 0x00000000, + 0xc0016900, + 0x00000083, + 0x0000ffff, + 0xc0016900, + 0x00000084, + 0x00000000, + 0xc0016900, + 0x00000085, + 0x20002000, + 0xc0016900, + 0x00000086, + 0x00000000, + 0xc0016900, + 0x00000087, + 0x20002000, + 0xc0016900, + 0x00000088, + 0x00000000, + 0xc0016900, + 0x00000089, + 0x20002000, + 0xc0016900, + 0x0000008a, + 0x00000000, + 0xc0016900, + 0x0000008b, + 0x20002000, + 0xc0016900, + 0x0000008c, + 0xaaaaaaaa, + 0xc0016900, + 0x00000094, + 0x80000000, + 0xc0016900, + 0x00000095, + 0x20002000, + 0xc0026900, + 0x000000b4, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x00000096, + 0x80000000, + 0xc0016900, + 0x00000097, + 0x20002000, + 0xc0026900, + 0x000000b6, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x00000098, + 0x80000000, + 0xc0016900, + 0x00000099, + 0x20002000, + 0xc0026900, + 0x000000b8, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x0000009a, + 0x80000000, + 0xc0016900, + 0x0000009b, + 0x20002000, + 0xc0026900, + 0x000000ba, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x0000009c, + 0x80000000, + 0xc0016900, + 0x0000009d, + 0x20002000, + 0xc0026900, + 0x000000bc, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x0000009e, + 0x80000000, + 0xc0016900, + 0x0000009f, + 0x20002000, + 0xc0026900, + 0x000000be, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000a0, + 0x80000000, + 0xc0016900, + 0x000000a1, + 0x20002000, + 0xc0026900, + 0x000000c0, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000a2, + 0x80000000, + 0xc0016900, + 0x000000a3, + 0x20002000, + 0xc0026900, + 0x000000c2, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000a4, + 0x80000000, + 0xc0016900, + 0x000000a5, + 0x20002000, + 0xc0026900, + 0x000000c4, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000a6, + 0x80000000, + 0xc0016900, + 0x000000a7, + 0x20002000, + 0xc0026900, + 0x000000c6, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000a8, + 0x80000000, + 0xc0016900, + 0x000000a9, + 0x20002000, + 0xc0026900, + 0x000000c8, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000aa, + 0x80000000, + 0xc0016900, + 0x000000ab, + 0x20002000, + 0xc0026900, + 0x000000ca, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000ac, + 0x80000000, + 0xc0016900, + 0x000000ad, + 0x20002000, + 0xc0026900, + 0x000000cc, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000ae, + 0x80000000, + 0xc0016900, + 0x000000af, + 0x20002000, + 0xc0026900, + 0x000000ce, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000b0, + 0x80000000, + 0xc0016900, + 0x000000b1, + 0x20002000, + 0xc0026900, + 0x000000d0, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x000000b2, + 0x80000000, + 0xc0016900, + 0x000000b3, + 0x20002000, + 0xc0026900, + 0x000000d2, + 0x00000000, + 0x3f800000, + 0xc0016900, + 0x00000293, + 0x00514000, + 0xc0016900, + 0x00000300, + 0x00000000, + 0xc0016900, + 0x00000301, + 0x00000000, + 0xc0016900, + 0x00000312, + 0xffffffff, + 0xc0016900, + 0x00000307, + 0x00000000, + 0xc0016900, + 0x00000308, + 0x00000000, + 0xc0016900, + 0x00000283, + 0x00000000, + 0xc0016900, + 0x00000292, + 0x00000000, + 0xc0066900, + 0x0000010f, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0xc0016900, + 0x00000206, + 0x00000000, + 0xc0016900, + 0x00000207, + 0x00000000, + 0xc0016900, + 0x00000208, + 0x00000000, + 0xc0046900, + 0x00000303, + 0x3f800000, + 0x3f800000, + 0x3f800000, + 0x3f800000, + 0xc0016900, + 0x00000205, + 0x00000004, + 0xc0016900, + 0x00000280, + 0x00000000, + 0xc0016900, + 0x00000281, + 0x00000000, + 0xc0016900, + 0x0000037e, + 0x00000000, + 0xc0016900, + 0x00000382, + 0x00000000, + 0xc0016900, + 0x00000380, + 0x00000000, + 0xc0016900, + 0x00000383, + 0x00000000, + 0xc0016900, + 0x00000381, + 0x00000000, + 0xc0016900, + 0x00000282, + 0x00000008, + 0xc0016900, + 0x00000302, + 0x0000002d, + 0xc0016900, + 0x0000037f, + 0x00000000, + 0xc0016900, + 0x000001b2, + 0x00000001, + 0xc0016900, + 0x000001b6, + 0x00000000, + 0xc0016900, + 0x000001b7, + 0x00000000, + 0xc0016900, + 0x000001b8, + 0x00000000, + 0xc0016900, + 0x000001b9, + 0x00000000, + 0xc0016900, + 0x00000225, + 0x00000000, + 0xc0016900, + 0x00000229, + 0x00000000, + 0xc0016900, + 0x00000237, + 0x00000000, + 0xc0016900, + 0x00000100, + 0x00000800, + 0xc0016900, + 0x00000101, + 0x00000000, + 0xc0016900, + 0x00000102, + 0x00000000, + 0xc0016900, + 0x000002a8, + 0x00000000, + 0xc0016900, + 0x000002a9, + 0x00000000, + 0xc0016900, + 0x00000103, + 0x00000000, + 0xc0016900, + 0x00000284, + 0x00000000, + 0xc0016900, + 0x00000290, + 0x00000000, + 0xc0016900, + 0x00000285, + 0x00000000, + 0xc0016900, + 0x00000286, + 0x00000000, + 0xc0016900, + 0x00000287, + 0x00000000, + 0xc0016900, + 0x00000288, + 0x00000000, + 0xc0016900, + 0x00000289, + 0x00000000, + 0xc0016900, + 0x0000028a, + 0x00000000, + 0xc0016900, + 0x0000028b, + 0x00000000, + 0xc0016900, + 0x0000028c, + 0x00000000, + 0xc0016900, + 0x0000028d, + 0x00000000, + 0xc0016900, + 0x0000028e, + 0x00000000, + 0xc0016900, + 0x0000028f, + 0x00000000, + 0xc0016900, + 0x000002a1, + 0x00000000, + 0xc0016900, + 0x000002a5, + 0x00000000, + 0xc0016900, + 0x000002ac, + 0x00000000, + 0xc0016900, + 0x000002ad, + 0x00000000, + 0xc0016900, + 0x000002ae, + 0x00000000, + 0xc0016900, + 0x000002c8, + 0x00000000, + 0xc0016900, + 0x00000206, + 0x00000100, + 0xc0016900, + 0x00000204, + 0x00010000, + 0xc0036e00, + 0x00000000, + 0x00000012, + 0x00000000, + 0x00000000, + 0xc0016900, + 0x0000008f, + 0x0000000f, + 0xc0016900, + 0x000001e8, + 0x00000001, + 0xc0016900, + 0x00000202, + 0x00cc0000, + 0xc0016900, + 0x00000205, + 0x00000244, + 0xc0016900, + 0x00000203, + 0x00000210, + 0xc0016900, + 0x000001b1, + 0x00000000, + 0xc0016900, + 0x00000185, + 0x00000000, + 0xc0016900, + 0x000001b3, + 0x00000001, + 0xc0016900, + 0x000001b4, + 0x00000000, + 0xc0016900, + 0x00000191, + 0x00000b00, + 0xc0016900, + 0x000001b5, + 0x00000000, +}; + +/* same for r6xx/r7xx */ +const u_int32_t r6xx_vs[] = +{ + 0x00000004, + 0x81000000, + 0x0000203c, + 0x94000b08, + 0x00004000, + 0x14200b1a, + 0x00000000, + 0x00000000, + 0x3c000000, + 0x68cd1000, + 0x00080000, + 0x00000000, +}; + +const u_int32_t r6xx_ps[] = +{ + 0x00000002, + 0x80800000, + 0x00000000, + 0x94200688, + 0x00000010, + 0x000d1000, + 0xb0800000, + 0x00000000, +}; + +const u_int32_t r6xx_ps_size = nitems(r6xx_ps); +const u_int32_t r6xx_vs_size = nitems(r6xx_vs); +const u_int32_t r6xx_default_size = nitems(r6xx_default_state); +const u_int32_t r7xx_default_size = nitems(r7xx_default_state); diff --git a/sys/dev/pci/drm/r600_blit_shaders.h b/sys/dev/pci/drm/r600_blit_shaders.h new file mode 100644 index 00000000000..fdc3b378cbb --- /dev/null +++ b/sys/dev/pci/drm/r600_blit_shaders.h @@ -0,0 +1,14 @@ + +#ifndef R600_BLIT_SHADERS_H +#define R600_BLIT_SHADERS_H + +extern const u32 r6xx_ps[]; +extern const u32 r6xx_vs[]; +extern const u32 r7xx_default_state[]; +extern const u32 r6xx_default_state[]; + + +extern const u32 r6xx_ps_size, r6xx_vs_size; +extern const u32 r6xx_default_size, r7xx_default_size; + +#endif diff --git a/sys/dev/pci/drm/r600_microcode.h b/sys/dev/pci/drm/r600_microcode.h new file mode 100644 index 00000000000..5f223e5c0c0 --- /dev/null +++ b/sys/dev/pci/drm/r600_microcode.h @@ -0,0 +1,23292 @@ +/*- + * Copyright 2007 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +static const int ME_JUMP_TABLE_START = 1764; +static const int ME_JUMP_TABLE_END = 1792; + +#define PFP_UCODE_SIZE 576 +#define PM4_UCODE_SIZE 1792 +#define R700_PFP_UCODE_SIZE 848 +#define R700_PM4_UCODE_SIZE 1360 + +static const u32 R600_cp_microcode[][3]={ + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x0000ffff, 0x00284621, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x00000000, 0x00e00000, 0x000 }, + { 0x00010000, 0xc0294620, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x614 }, + { 0x00000000, 0x00600000, 0x5b2 }, + { 0x00000000, 0x00600000, 0x5c5 }, + { 0x00000000, 0xc0200800, 0x000 }, + { 0x00000f00, 0x00281622, 0x000 }, + { 0x00000008, 0x00211625, 0x000 }, + { 0x00000020, 0x00203625, 0x000 }, + { 0x8d000000, 0x00204411, 0x000 }, + { 0x00000004, 0x002f0225, 0x000 }, + { 0x00000000, 0x0ce00000, 0x018 }, + { 0x00412000, 0x00404811, 0x019 }, + { 0x00422000, 0x00204811, 0x000 }, + { 0x8e000000, 0x00204411, 0x000 }, + { 0x00000031, 0x00204a2d, 0x000 }, + { 0x90000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x0000000c, 0x00211622, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000019, 0x00211a22, 0x000 }, + { 0x00000004, 0x00281a26, 0x000 }, + { 0x00000000, 0x002914c5, 0x000 }, + { 0x00000021, 0x00203625, 0x000 }, + { 0x00000000, 0x003a1402, 0x000 }, + { 0x00000016, 0x00211625, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x0000001d, 0x00200e2d, 0x000 }, + { 0xfffffffc, 0x00280e23, 0x000 }, + { 0x00000000, 0x002914a3, 0x000 }, + { 0x0000001d, 0x00203625, 0x000 }, + { 0x00008000, 0x00280e22, 0x000 }, + { 0x00000007, 0x00220e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x20000000, 0x00280e22, 0x000 }, + { 0x00000006, 0x00210e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x00000000, 0x00220222, 0x000 }, + { 0x00000000, 0x14e00000, 0x038 }, + { 0x00000000, 0x2ee00000, 0x035 }, + { 0x00000000, 0x2ce00000, 0x037 }, + { 0x00000000, 0x00400e2d, 0x039 }, + { 0x00000008, 0x00200e2d, 0x000 }, + { 0x00000009, 0x0040122d, 0x046 }, + { 0x00000001, 0x00400e2d, 0x039 }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x03e }, + { 0x00000008, 0x00401c11, 0x041 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x0000000f, 0x00281e27, 0x000 }, + { 0x00000003, 0x00221e27, 0x000 }, + { 0x7fc00000, 0x00281a23, 0x000 }, + { 0x00000014, 0x00211a26, 0x000 }, + { 0x00000001, 0x00331a26, 0x000 }, + { 0x00000008, 0x00221a26, 0x000 }, + { 0x00000000, 0x00290cc7, 0x000 }, + { 0x00000030, 0x00203624, 0x000 }, + { 0x00007f00, 0x00281221, 0x000 }, + { 0x00001400, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x04b }, + { 0x00000001, 0x00290e23, 0x000 }, + { 0x00000010, 0x00203623, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfff80000, 0x00294a23, 0x000 }, + { 0x00000000, 0x003a2c02, 0x000 }, + { 0x00000002, 0x00220e2b, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x00000011, 0x00203623, 0x000 }, + { 0x00001fff, 0x00294a23, 0x000 }, + { 0x00000030, 0x00204a2d, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000032, 0x00200e2d, 0x000 }, + { 0x060a0200, 0x00294a23, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00210222, 0x000 }, + { 0x00000000, 0x14e00000, 0x061 }, + { 0x00000000, 0x2ee00000, 0x05f }, + { 0x00000000, 0x2ce00000, 0x05e }, + { 0x00000000, 0x00400e2d, 0x062 }, + { 0x00000001, 0x00400e2d, 0x062 }, + { 0x0000000a, 0x00200e2d, 0x000 }, + { 0x0000000b, 0x0040122d, 0x06a }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x7fc00000, 0x00281623, 0x000 }, + { 0x00000014, 0x00211625, 0x000 }, + { 0x00000001, 0x00331625, 0x000 }, + { 0x80000000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00290ca3, 0x000 }, + { 0x3ffffc00, 0x00290e23, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x06d }, + { 0x00000100, 0x00401c11, 0x070 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x000000f0, 0x00281e27, 0x000 }, + { 0x00000004, 0x00221e27, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0xfffff0ff, 0x00281a30, 0x000 }, + { 0x0000a028, 0x00204411, 0x000 }, + { 0x00000000, 0x002948e6, 0x000 }, + { 0x0000a018, 0x00204411, 0x000 }, + { 0x3fffffff, 0x00284a23, 0x000 }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x0000002d, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a3, 0x000 }, + { 0x00000000, 0x0cc00000, 0x080 }, + { 0x0000002e, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a4, 0x000 }, + { 0x00000000, 0x0cc00000, 0x081 }, + { 0x00000000, 0x00400000, 0x087 }, + { 0x0000002d, 0x00203623, 0x000 }, + { 0x0000002e, 0x00203624, 0x000 }, + { 0x0000001d, 0x00201e2d, 0x000 }, + { 0x00000002, 0x00210227, 0x000 }, + { 0x00000000, 0x14e00000, 0x087 }, + { 0x00000000, 0x00600000, 0x5ed }, + { 0x00000000, 0x00600000, 0x5e1 }, + { 0x00000002, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x08a }, + { 0x00000018, 0xc0403620, 0x090 }, + { 0x00000000, 0x2ee00000, 0x08e }, + { 0x00000000, 0x2ce00000, 0x08d }, + { 0x00000002, 0x00400e2d, 0x08f }, + { 0x00000003, 0x00400e2d, 0x08f }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000018, 0x00203623, 0x000 }, + { 0x00000003, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x095 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x09d }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x2ee00000, 0x09b }, + { 0x00000000, 0x2ce00000, 0x09a }, + { 0x00000002, 0x00400e2d, 0x09c }, + { 0x00000003, 0x00400e2d, 0x09c }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000000, 0x00204803, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x003f0000, 0x00280e23, 0x000 }, + { 0x00000010, 0x00210e23, 0x000 }, + { 0x00000013, 0x00203623, 0x000 }, + { 0x0000001e, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a4 }, + { 0x0000001c, 0xc0203620, 0x000 }, + { 0x0000001f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a7 }, + { 0x0000001b, 0xc0203620, 0x000 }, + { 0x00000008, 0x00210e2b, 0x000 }, + { 0x0000007f, 0x00280e23, 0x000 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0db }, + { 0x00000000, 0x27000000, 0x000 }, + { 0x00000000, 0x00600000, 0x28c }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x0000000c, 0x00221e30, 0x000 }, + { 0x99800000, 0x00204411, 0x000 }, + { 0x00000004, 0x0020122d, 0x000 }, + { 0x00000008, 0x00221224, 0x000 }, + { 0x00000010, 0x00201811, 0x000 }, + { 0x00000000, 0x00291ce4, 0x000 }, + { 0x00000000, 0x00604807, 0x128 }, + { 0x9b000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x9c000000, 0x00204411, 0x000 }, + { 0x00000000, 0x0033146f, 0x000 }, + { 0x00000001, 0x00333e23, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0x00203c05, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000e, 0x00204811, 0x000 }, + { 0x00000000, 0x00201010, 0x000 }, + { 0x0000e007, 0x00204411, 0x000 }, + { 0x0000000f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0c5 }, + { 0x00f8ff08, 0x00204811, 0x000 }, + { 0x98000000, 0x00404811, 0x0d6 }, + { 0x000000f0, 0x00280e22, 0x000 }, + { 0x000000a0, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x0d4 }, + { 0x00000013, 0x00200e2d, 0x000 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0cf }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0ce }, + { 0x00003f00, 0x00400c11, 0x0d0 }, + { 0x00001f00, 0x00400c11, 0x0d0 }, + { 0x00000f00, 0x00200c11, 0x000 }, + { 0x00380009, 0x00294a23, 0x000 }, + { 0x3f000000, 0x00280e2b, 0x000 }, + { 0x00000002, 0x00220e23, 0x000 }, + { 0x00000007, 0x00494a23, 0x0d6 }, + { 0x00380f09, 0x00204811, 0x000 }, + { 0x68000007, 0x00204811, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a24, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000a202, 0x00204411, 0x000 }, + { 0x00ff0000, 0x00284a22, 0x000 }, + { 0x00000030, 0x00200e2d, 0x000 }, + { 0x0000002e, 0x0020122d, 0x000 }, + { 0x00000000, 0x002f0083, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0e3 }, + { 0x00000000, 0x00600000, 0x5e7 }, + { 0x00000000, 0x00400000, 0x0e4 }, + { 0x00000000, 0x00600000, 0x5ea }, + { 0x00000007, 0x0020222d, 0x000 }, + { 0x00000005, 0x00220e22, 0x000 }, + { 0x00100000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00292068, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x000000ef, 0x00280e23, 0x000 }, + { 0x00000000, 0x00292068, 0x000 }, + { 0x0000001d, 0x00200e2d, 0x000 }, + { 0x00000003, 0x00210223, 0x000 }, + { 0x00000000, 0x14e00000, 0x0f1 }, + { 0x0000000b, 0x00210228, 0x000 }, + { 0x00000000, 0x14c00000, 0x0f1 }, + { 0x00000400, 0x00292228, 0x000 }, + { 0x0000001a, 0x00203628, 0x000 }, + { 0x0000001c, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x0f6 }, + { 0x0000a30c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000001e, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x104 }, + { 0x0000a30f, 0x00204411, 0x000 }, + { 0x00000013, 0x00200e2d, 0x000 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x0fd }, + { 0xffffffff, 0x00404811, 0x104 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x100 }, + { 0x0000ffff, 0x00404811, 0x104 }, + { 0x00000004, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x103 }, + { 0x000000ff, 0x00404811, 0x104 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0002c400, 0x00204411, 0x000 }, + { 0x0000001f, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x10b }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x00000019, 0x00203623, 0x000 }, + { 0x00000018, 0x40224a20, 0x000 }, + { 0x00000010, 0xc0424a20, 0x10d }, + { 0x00000000, 0x00200c11, 0x000 }, + { 0x00000019, 0x00203623, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000000a, 0x00201011, 0x000 }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x114 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00531224, 0x110 }, + { 0xffbfffff, 0x00283a2e, 0x000 }, + { 0x0000001b, 0x00210222, 0x000 }, + { 0x00000000, 0x14c00000, 0x127 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0x00000018, 0x00220e30, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000e, 0x00204811, 0x000 }, + { 0x00000000, 0x00201010, 0x000 }, + { 0x0000e00e, 0x00204411, 0x000 }, + { 0x07f8ff08, 0x00204811, 0x000 }, + { 0x00000000, 0x00294a23, 0x000 }, + { 0x00000024, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a24, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x00800000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204806, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x614 }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x613 }, + { 0x00000004, 0x00404c11, 0x12e }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x2fe }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x19f }, + { 0x00000000, 0x00600000, 0x151 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40280620, 0x000 }, + { 0x00000010, 0xc0210a20, 0x000 }, + { 0x00000000, 0x00341461, 0x000 }, + { 0x00000000, 0x00741882, 0x2a4 }, + { 0x0001a1fd, 0x00604411, 0x2c9 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x138 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x2fe }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x19f }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x151 }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x0000ffff, 0xc0281220, 0x000 }, + { 0x00000010, 0x40211620, 0x000 }, + { 0x0000ffff, 0xc0681a20, 0x2a4 }, + { 0x0001a1fd, 0x00604411, 0x2c9 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x149 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000001, 0x00300a2f, 0x000 }, + { 0x00000001, 0x00210a22, 0x000 }, + { 0x00000003, 0x00384a22, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600000, 0x17c }, + { 0x00000000, 0x00600000, 0x18d }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00202c08, 0x000 }, + { 0x00000000, 0x00202411, 0x000 }, + { 0x00000000, 0x00202811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x93800000, 0x00204411, 0x000 }, + { 0x00000002, 0x00221e29, 0x000 }, + { 0x00000000, 0x007048eb, 0x189 }, + { 0x00000000, 0x00600000, 0x2a4 }, + { 0x00000001, 0x40330620, 0x000 }, + { 0x00000000, 0xc0302409, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x28c }, + { 0x95000000, 0x00204411, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x173 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000001, 0x00530621, 0x16f }, + { 0x92000000, 0x00204411, 0x000 }, + { 0x00000000, 0xc0604800, 0x184 }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000013, 0x0020062d, 0x000 }, + { 0x00000000, 0x0078042a, 0x2e4 }, + { 0x00000000, 0x00202809, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x165 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000210, 0x00600411, 0x2fe }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x181 }, + { 0x0000001b, 0xc0203620, 0x000 }, + { 0x0000001c, 0xc0203620, 0x000 }, + { 0x3f800000, 0x00200411, 0x000 }, + { 0x46000000, 0x00600811, 0x19f }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x188 }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000021, 0x00804811, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40281620, 0x000 }, + { 0x00000010, 0xc0811a20, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000008, 0x00221e30, 0x000 }, + { 0x00000032, 0x00201a2d, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfffbff09, 0x00204811, 0x000 }, + { 0x00000011, 0x0020222d, 0x000 }, + { 0x00001fff, 0x00294a28, 0x000 }, + { 0x00000006, 0x0020222d, 0x000 }, + { 0x00000000, 0x002920e8, 0x000 }, + { 0x00000000, 0x00204808, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000100, 0x00201811, 0x000 }, + { 0x00000008, 0x00621e28, 0x128 }, + { 0x00000008, 0x00822228, 0x000 }, + { 0x0002c000, 0x00204411, 0x000 }, + { 0x0000001b, 0x00600e2d, 0x1aa }, + { 0x0000001c, 0x00600e2d, 0x1aa }, + { 0x0000c008, 0x00204411, 0x000 }, + { 0x0000001d, 0x00200e2d, 0x000 }, + { 0x00000000, 0x14c00000, 0x1a6 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x39000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00804802, 0x000 }, + { 0x00000020, 0x00202e2d, 0x000 }, + { 0x00000000, 0x003b0d63, 0x000 }, + { 0x00000008, 0x00224a23, 0x000 }, + { 0x00000010, 0x00224a23, 0x000 }, + { 0x00000018, 0x00224a23, 0x000 }, + { 0x00000000, 0x00804803, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x2fe }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x19f }, + { 0x00000007, 0x0021062f, 0x000 }, + { 0x00000019, 0x00200a2d, 0x000 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000ffff, 0x40282220, 0x000 }, + { 0x0000000f, 0x00262228, 0x000 }, + { 0x00000010, 0x40212620, 0x000 }, + { 0x0000000f, 0x00262629, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1cd }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000081, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000080, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1c9 }, + { 0x00000000, 0x00600000, 0x1d6 }, + { 0x00000001, 0x00531e27, 0x1c5 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000001f, 0x00280a22, 0x000 }, + { 0x0000001f, 0x00282a2a, 0x000 }, + { 0x00000001, 0x00530621, 0x1be }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000002, 0x00304a2f, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000001, 0x00301e2f, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x1d6 }, + { 0x00000001, 0x00531e27, 0x1d2 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x0000000f, 0x00260e23, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000000f, 0x00261224, 0x000 }, + { 0x00000000, 0x00201411, 0x000 }, + { 0x00000000, 0x00601811, 0x2a4 }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000000, 0x002f022b, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1e5 }, + { 0x00000010, 0x00221628, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a29, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x0020480a, 0x000 }, + { 0x00000000, 0x00202c11, 0x000 }, + { 0x00000010, 0x00221623, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a24, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x00731503, 0x1f2 }, + { 0x00000000, 0x00201805, 0x000 }, + { 0x00000000, 0x00731524, 0x1f2 }, + { 0x00000000, 0x002d14c5, 0x000 }, + { 0x00000000, 0x003008a2, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00000000, 0x00202003, 0x000 }, + { 0x00000000, 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0x00211624, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x00000025, 0x00203623, 0x000 }, + { 0x00000003, 0x00281e23, 0x000 }, + { 0x00000008, 0x00222223, 0x000 }, + { 0xfffff000, 0x00282228, 0x000 }, + { 0x00000000, 0x002920e8, 0x000 }, + { 0x00000027, 0x00203628, 0x000 }, + { 0x00000018, 0x00211e23, 0x000 }, + { 0x00000028, 0x00203627, 0x000 }, + { 0x00000002, 0x00221624, 0x000 }, + { 0x00000000, 0x003014a8, 0x000 }, + { 0x00000026, 0x00203625, 0x000 }, + { 0x00000003, 0x00211a24, 0x000 }, + { 0x10000000, 0x00281a26, 0x000 }, + { 0xefffffff, 0x00283a2e, 0x000 }, + { 0x00000000, 0x004938ce, 0x602 }, + { 0x00000001, 0x40280a20, 0x000 }, + { 0x00000006, 0x40280e20, 0x000 }, + { 0x00000300, 0xc0281220, 0x000 }, + { 0x00000008, 0x00211224, 0x000 }, + { 0x00000000, 0xc0201620, 0x000 }, + { 0x00000000, 0xc0201a20, 0x000 }, + { 0x00000000, 0x00210222, 0x000 }, + { 0x00000000, 0x14c00000, 0x541 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00002258, 0x00300a24, 0x000 }, + { 0x00040000, 0x00694622, 0x614 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00020000, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x549 }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x55b }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x549 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00002258, 0x00300a24, 0x000 }, + { 0x00040000, 0x00694622, 0x614 }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x55b }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x54d }, + { 0x00000000, 0xc0201c00, 0x000 }, + { 0x00000000, 0xc0400000, 0x55b }, + { 0x00000004, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x559 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000216d, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0x1ac00000, 0x554 }, + { 0x9e000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x557 }, + { 0x00000000, 0x00401c10, 0x55b }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00000000, 0xc0400000, 0x000 }, + { 0x00000000, 0x0ee00000, 0x55d }, + { 0x00000000, 0x00600000, 0x5a4 }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x56d }, + { 0x0000a2b7, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x614 }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x0000a2c4, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x56b }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000001, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x57d }, + { 0x0000a2bb, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x614 }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x0000a2c5, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x57b }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000002, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x58d }, + { 0x0000a2bf, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2be, 0x00604411, 0x614 }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x0000a2c6, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x58b }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x0000a2c3, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x614 }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x0000a2c7, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x599 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x85000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x0000304a, 0x00204411, 0x000 }, + { 0x01000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00400000, 0x59f }, + { 0xa4000000, 0xc0204411, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0xc0600000, 0x5a4 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000005, 0x00204811, 0x000 }, + { 0x0000a1f4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x88000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x00000000, 0x0ee00000, 0x5b7 }, + { 0x00001000, 0x00200811, 0x000 }, + { 0x00000034, 0x00203622, 0x000 }, + { 0x00000000, 0x00600000, 0x5bb }, + { 0x00000000, 0x00600000, 0x5a4 }, + { 0x98000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00804811, 0x000 }, + { 0x00000000, 0xc0600000, 0x5bb }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000a2a4, 0x00204411, 0x000 }, + { 0x00000022, 0x00204811, 0x000 }, + { 0x89000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x0000217a, 0xc0204411, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x97000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x8a000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x00000000, 0x00600000, 0x5e1 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0xc0204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000016, 0x00604811, 0x35e }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x09800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x614 }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x00000004, 0x00404c11, 0x5dc }, + { 0x0000001d, 0x00201e2d, 0x000 }, + { 0x00000004, 0x00291e27, 0x000 }, + { 0x0000001d, 0x00803627, 0x000 }, + { 0x0000001d, 0x00201e2d, 0x000 }, + { 0xfffffffb, 0x00281e27, 0x000 }, + { 0x0000001d, 0x00803627, 0x000 }, + { 0x0000001d, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00291e27, 0x000 }, + { 0x0000001d, 0x00803627, 0x000 }, + { 0x0000001d, 0x00201e2d, 0x000 }, + { 0xfffffff7, 0x00281e27, 0x000 }, + { 0x0000001d, 0x00803627, 0x000 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000016, 0x00604811, 0x35e }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x01800000, 0x00204811, 0x000 }, + { 0x00ffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004217f, 0x00604411, 0x614 }, + { 0x00000000, 0x00200010, 0x000 }, + { 0x00000000, 0x14c00000, 0x613 }, + { 0x00000010, 0x00404c11, 0x5f9 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x38c00000, 0x000 }, + { 0x00000025, 0x00200a2d, 0x000 }, + { 0x00000026, 0x00200e2d, 0x000 }, + { 0x00000027, 0x0020122d, 0x000 }, + { 0x00000028, 0x0020162d, 0x000 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000004, 0x00301224, 0x000 }, + { 0x00000000, 0x002f0064, 0x000 }, + { 0x00000000, 0x0cc00000, 0x612 }, + { 0x00000003, 0x00281a22, 0x000 }, + { 0x00000008, 0x00221222, 0x000 }, + { 0xfffff000, 0x00281224, 0x000 }, + { 0x00000000, 0x002910c4, 0x000 }, + { 0x00000027, 0x00403624, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x614 }, + { 0x9f000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x617 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x2fe }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x19f }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0xc0204411, 0x000 }, + { 0x00000029, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x0000002c, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000002a, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000002b, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x013304ef, 0x059b0239, 0x000 }, + { 0x01b00159, 0x0425059b, 0x000 }, + { 0x021201f6, 0x02390142, 0x000 }, + { 0x0210022e, 0x0289022a, 0x000 }, + { 0x03c2059b, 0x059b059b, 0x000 }, + { 0x05cd05ce, 0x0308059b, 0x000 }, + { 0x059b05a0, 0x03090329, 0x000 }, + { 0x0313026b, 0x032b031d, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x059b052c, 0x059b059b, 0x000 }, + { 0x03a5059b, 0x04a2032d, 0x000 }, + { 0x04810433, 0x0423059b, 0x000 }, + { 0x04bb04ed, 0x042704c8, 0x000 }, + { 0x043304f4, 0x033a0365, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x059b059b, 0x05b905a2, 0x000 }, + { 0x059b059b, 0x0007059b, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x03e303d8, 0x03f303f1, 0x000 }, + { 0x03f903f5, 0x03f703fb, 0x000 }, + { 0x04070403, 0x040f040b, 0x000 }, + { 0x04170413, 0x041f041b, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x00020600, 0x06190006, 0x000 }, +}; + +static const u32 R600_pfp_microcode[]={ +0xd40071, +0xd40072, +0xca0400, +0xa00000, +0x7e828b, +0x800003, +0xca0400, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xc41838, +0xca2400, +0xca2800, +0x9581a8, +0xc41c3a, +0xc3c000, +0xca0800, +0xca0c00, +0x7c744b, +0xc20005, +0x99c000, +0xc41c3a, +0x7c744c, +0xc0fff0, +0x042c04, +0x309002, +0x7d2500, +0x351402, +0x7d350b, +0x255403, +0x7cd580, +0x259c03, +0x95c004, +0xd5001b, +0x7eddc1, +0x7d9d80, +0xd6801b, +0xd5801b, +0xd4401e, +0xd5401e, +0xd6401e, +0xd6801e, +0xd4801e, +0xd4c01e, +0x9783d4, +0xd5c01e, +0xca0800, +0x80001b, +0xca0c00, +0xe4011e, +0xd4001e, +0x80000d, +0xc41838, +0xe4013e, +0xd4001e, +0x80000d, +0xc41838, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca1800, +0xd4401e, +0xd5801e, +0x800054, +0xd40073, +0xd4401e, +0xca0800, +0xca0c00, +0xca1000, +0xd48019, +0xd4c018, +0xd50017, +0xd4801e, +0xd4c01e, +0xd5001e, +0xe2001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0xd48060, +0xd4401e, +0x800002, +0xd4801e, +0xca0800, +0xd48061, +0xd4401e, +0x800002, +0xd4801e, +0xca0800, +0xca0c00, +0xd4401e, +0xd48016, +0xd4c016, +0xd4801e, +0x8001b9, +0xd4c01e, +0xc6083e, +0xca0c00, +0xca1000, +0x948004, +0xca1400, +0xe420f3, +0xd42013, +0xd56065, +0xd4e01c, +0xd5201c, +0xd5601c, +0x800002, +0x062001, +0xc6083e, +0xca0c00, +0xca1000, +0x9483f7, +0xca1400, +0xe420f3, +0x80007a, +0xd42013, +0xc6083e, +0xca0c00, +0xca1000, +0x9883ef, +0xca1400, +0xd40064, +0x80008e, +0x000000, +0xc41432, +0xc6183e, +0xc4082f, +0x954005, +0xc40c30, +0xd4401e, +0x800002, +0xee001e, +0x9583f5, +0xc41031, +0xd44033, +0xd52065, +0xd4a01c, +0xd4e01c, +0xd5201c, +0xd40073, +0xe4015e, +0xd4001e, +0x8001b9, +0x062001, +0x0a2001, +0xd60074, +0xc40836, +0xc61040, +0x988007, +0xcc3835, +0x95010f, +0xd4001f, +0xd46062, +0x800002, +0xd42062, +0xcc1433, +0x8401bc, +0xd40070, +0xd5401e, +0x800002, +0xee001e, +0xca0c00, +0xca1000, +0xd4c01a, +0x8401bc, +0xd5001a, +0xcc0443, +0x35101f, +0x2c9401, +0x7d098b, +0x984005, +0x7d15cb, +0xd4001a, +0x8001b9, +0xd4006d, +0x344401, +0xcc0c44, +0x98403a, +0xcc2c46, +0x958004, +0xcc0445, +0x8001b9, +0xd4001a, +0xd4c01a, +0x282801, +0x8400f3, +0xcc1003, +0x98801b, +0x04380c, +0x8400f3, +0xcc1003, +0x988017, +0x043808, +0x8400f3, +0xcc1003, +0x988013, +0x043804, +0x8400f3, +0xcc1003, +0x988014, +0xcc1047, +0x9a8009, +0xcc1448, +0x9840da, +0xd4006d, +0xcc1844, +0xd5001a, +0xd5401a, +0x8000cc, +0xd5801a, +0x96c0d3, +0xd4006d, +0x8001b9, +0xd4006e, +0x9ac003, +0xd4006d, +0xd4006e, +0x800002, +0xec007f, +0x9ac0ca, +0xd4006d, +0x8001b9, +0xd4006e, +0xcc1403, +0xcc1803, +0xcc1c03, +0x7d9103, +0x7dd583, +0x7d190c, +0x35cc1f, +0x35701f, +0x7cf0cb, +0x7cd08b, +0x880000, +0x7e8e8b, +0x95c004, +0xd4006e, +0x8001b9, +0xd4001a, +0xd4c01a, +0xcc0803, +0xcc0c03, +0xcc1003, +0xcc1403, +0xcc1803, +0xcc1c03, +0xcc2403, +0xcc2803, +0x35c41f, +0x36b01f, +0x7c704b, +0x34f01f, +0x7c704b, +0x35701f, +0x7c704b, +0x7d8881, +0x7dccc1, +0x7e5101, +0x7e9541, +0x7c9082, +0x7cd4c2, +0x7c848b, +0x9ac003, +0x7c8c8b, +0x2c8801, +0x98809c, +0xd4006d, +0x98409a, +0xd4006e, +0xcc0847, +0xcc0c48, +0xcc1044, +0xd4801a, +0xd4c01a, +0x800104, +0xd5001a, +0xcc0832, +0xd40032, +0x9482d8, +0xca0c00, +0xd4401e, +0x800002, +0xd4001e, +0xe4011e, +0xd4001e, +0xca0800, +0xca0c00, +0xca1000, +0xd4401e, +0xca1400, +0xd4801e, +0xd4c01e, +0xd5001e, +0xd5401e, +0xd54034, +0x800002, +0xee001e, +0x280404, +0xe2001a, +0xe2001a, +0xd4401a, +0xca3800, +0xcc0803, +0xcc0c03, +0xcc0c03, +0xcc0c03, +0x9882bc, +0x000000, +0x8401bc, +0xd7806f, +0x800002, +0xee001f, +0xca0400, +0xc2ff00, +0xcc0834, +0xc13fff, +0x7c74cb, +0x7cc90b, +0x7d010f, +0x9902af, +0x7c738b, +0x8401bc, +0xd7806f, +0x800002, +0xee001f, +0xca0800, +0x281900, +0x7d898b, +0x958014, +0x281404, +0xca0c00, +0xca1000, +0xca1c00, +0xca2400, +0xe2001f, +0xd4c01a, +0xd5001a, +0xd5401a, +0xcc1803, +0xcc2c03, +0xcc2c03, +0xcc2c03, +0x7da58b, +0x7d9c47, +0x984296, +0x000000, +0x800164, +0xd4c01a, +0xd4401e, +0xd4801e, +0x800002, +0xee001e, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0x248c06, +0x0ccc06, +0x98c006, +0xcc1049, +0x990004, +0xd40071, +0xe4011e, +0xd4001e, +0xd4401e, +0xd4801e, +0x800002, +0xee001e, +0xca0800, +0xca0c00, +0x34d018, +0x251001, +0x95001f, +0xc17fff, +0xca1000, +0xca1400, +0xca1800, +0xd4801d, +0xd4c01d, +0x7db18b, +0xc14202, +0xc2c001, +0xd5801d, +0x34dc0e, +0x7d5d4c, +0x7f734c, +0xd7401e, +0xd5001e, +0xd5401e, +0xc14200, +0xc2c000, +0x099c01, +0x31dc10, +0x7f5f4c, +0x7f734c, +0x7d8380, +0xd5806f, +0xd58066, +0xd7401e, +0xec005e, +0xc82402, +0x8001b9, +0xd60074, +0xd4401e, +0xd4801e, +0xd4c01e, +0x800002, +0xee001e, +0x800002, +0xee001f, +0xd4001f, +0x800002, +0xd4001f, +0xd4001f, +0x880000, +0xd4001f, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x010174, +0x02017b, +0x030090, +0x040080, +0x050005, +0x060040, +0x070033, +0x08012f, +0x090047, +0x0a0037, +0x1001b7, +0x1700a4, +0x22013d, +0x23014c, +0x2000b5, +0x240128, +0x27004e, +0x28006b, +0x2a0061, +0x2b0053, +0x2f0066, +0x320088, +0x340182, +0x3c0159, +0x3f0073, +0x41018f, +0x440131, +0x550176, +0x56017d, +0x60000c, +0x610035, +0x620039, +0x630039, +0x640039, +0x650039, +0x660039, +0x670039, +0x68003b, +0x690042, +0x6a0049, +0x6b0049, +0x6c0049, +0x6d0049, +0x6e0049, +0x6f0049, +0x7301b7, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +}; + +static const u32 RV610_cp_microcode[][3]={ + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x0000ffff, 0x00284621, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x00000000, 0x00e00000, 0x000 }, + { 0x00010000, 0xc0294620, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x00000000, 0x00600000, 0x631 }, + { 0x00000000, 0x00600000, 0x645 }, + { 0x00000000, 0xc0200800, 0x000 }, + { 0x00000f00, 0x00281622, 0x000 }, + { 0x00000008, 0x00211625, 0x000 }, + { 0x00000018, 0x00203625, 0x000 }, + { 0x8d000000, 0x00204411, 0x000 }, + { 0x00000004, 0x002f0225, 0x000 }, + { 0x00000000, 0x0ce00000, 0x018 }, + { 0x00412000, 0x00404811, 0x019 }, + { 0x00422000, 0x00204811, 0x000 }, + { 0x8e000000, 0x00204411, 0x000 }, + { 0x00000028, 0x00204a2d, 0x000 }, + { 0x90000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x0000000c, 0x00211622, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000019, 0x00211a22, 0x000 }, + { 0x00000004, 0x00281a26, 0x000 }, + { 0x00000000, 0x002914c5, 0x000 }, + { 0x00000019, 0x00203625, 0x000 }, + { 0x00000000, 0x003a1402, 0x000 }, + { 0x00000016, 0x00211625, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0xfffffffc, 0x00280e23, 0x000 }, + { 0x00000000, 0x002914a3, 0x000 }, + { 0x00000017, 0x00203625, 0x000 }, + { 0x00008000, 0x00280e22, 0x000 }, + { 0x00000007, 0x00220e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x20000000, 0x00280e22, 0x000 }, + { 0x00000006, 0x00210e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x00000000, 0x00220222, 0x000 }, + { 0x00000000, 0x14e00000, 0x038 }, + { 0x00000000, 0x2ee00000, 0x035 }, + { 0x00000000, 0x2ce00000, 0x037 }, + { 0x00000000, 0x00400e2d, 0x039 }, + { 0x00000008, 0x00200e2d, 0x000 }, + { 0x00000009, 0x0040122d, 0x046 }, + { 0x00000001, 0x00400e2d, 0x039 }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x03e }, + { 0x00000008, 0x00401c11, 0x041 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x0000000f, 0x00281e27, 0x000 }, + { 0x00000003, 0x00221e27, 0x000 }, + { 0x7fc00000, 0x00281a23, 0x000 }, + { 0x00000014, 0x00211a26, 0x000 }, + { 0x00000001, 0x00331a26, 0x000 }, + { 0x00000008, 0x00221a26, 0x000 }, + { 0x00000000, 0x00290cc7, 0x000 }, + { 0x00000027, 0x00203624, 0x000 }, + { 0x00007f00, 0x00281221, 0x000 }, + { 0x00001400, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x04b }, + { 0x00000001, 0x00290e23, 0x000 }, + { 0x0000000e, 0x00203623, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfff80000, 0x00294a23, 0x000 }, + { 0x00000000, 0x003a2c02, 0x000 }, + { 0x00000002, 0x00220e2b, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x0000000f, 0x00203623, 0x000 }, + { 0x00001fff, 0x00294a23, 0x000 }, + { 0x00000027, 0x00204a2d, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000029, 0x00200e2d, 0x000 }, + { 0x060a0200, 0x00294a23, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00210222, 0x000 }, + { 0x00000000, 0x14e00000, 0x061 }, + { 0x00000000, 0x2ee00000, 0x05f }, + { 0x00000000, 0x2ce00000, 0x05e }, + { 0x00000000, 0x00400e2d, 0x062 }, + { 0x00000001, 0x00400e2d, 0x062 }, + { 0x0000000a, 0x00200e2d, 0x000 }, + { 0x0000000b, 0x0040122d, 0x06a }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x7fc00000, 0x00281623, 0x000 }, + { 0x00000014, 0x00211625, 0x000 }, + { 0x00000001, 0x00331625, 0x000 }, + { 0x80000000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00290ca3, 0x000 }, + { 0x3ffffc00, 0x00290e23, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x06d }, + { 0x00000100, 0x00401c11, 0x070 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x000000f0, 0x00281e27, 0x000 }, + { 0x00000004, 0x00221e27, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0xfffff0ff, 0x00281a30, 0x000 }, + { 0x0000a028, 0x00204411, 0x000 }, + { 0x00000000, 0x002948e6, 0x000 }, + { 0x0000a018, 0x00204411, 0x000 }, + { 0x3fffffff, 0x00284a23, 0x000 }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000030, 0x0020162d, 0x000 }, + { 0x00000002, 0x00291625, 0x000 }, + { 0x00000030, 0x00203625, 0x000 }, + { 0x00000025, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a3, 0x000 }, + { 0x00000000, 0x0cc00000, 0x083 }, + { 0x00000026, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a4, 0x000 }, + { 0x00000000, 0x0cc00000, 0x084 }, + { 0x00000000, 0x00400000, 0x08a }, + { 0x00000025, 0x00203623, 0x000 }, + { 0x00000026, 0x00203624, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000002, 0x00210227, 0x000 }, + { 0x00000000, 0x14e00000, 0x08a }, + { 0x00000000, 0x00600000, 0x668 }, + { 0x00000000, 0x00600000, 0x65c }, + { 0x00000002, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x08d }, + { 0x00000012, 0xc0403620, 0x093 }, + { 0x00000000, 0x2ee00000, 0x091 }, + { 0x00000000, 0x2ce00000, 0x090 }, + { 0x00000002, 0x00400e2d, 0x092 }, + { 0x00000003, 0x00400e2d, 0x092 }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000012, 0x00203623, 0x000 }, + { 0x00000003, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x098 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x0a0 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x2ee00000, 0x09e }, + { 0x00000000, 0x2ce00000, 0x09d }, + { 0x00000002, 0x00400e2d, 0x09f }, + { 0x00000003, 0x00400e2d, 0x09f }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000000, 0x00204803, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x003f0000, 0x00280e23, 0x000 }, + { 0x00000010, 0x00210e23, 0x000 }, + { 0x00000011, 0x00203623, 0x000 }, + { 0x0000001e, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a7 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x0000001f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0aa }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000008, 0x00210e2b, 0x000 }, + { 0x0000007f, 0x00280e23, 0x000 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0e1 }, + { 0x00000000, 0x27000000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ae00000, 0x0b3 }, + { 0x00000000, 0x00600000, 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0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x93800000, 0x00204411, 0x000 }, + { 0x00000002, 0x00221e29, 0x000 }, + { 0x00000000, 0x007048eb, 0x19c }, + { 0x00000000, 0x00600000, 0x2bb }, + { 0x00000001, 0x40330620, 0x000 }, + { 0x00000000, 0xc0302409, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ae00000, 0x181 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x00000000, 0x00400000, 0x186 }, + { 0x95000000, 0x00204411, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x186 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000001, 0x00530621, 0x182 }, + { 0x92000000, 0x00204411, 0x000 }, + { 0x00000000, 0xc0604800, 0x197 }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000011, 0x0020062d, 0x000 }, + { 0x00000000, 0x0078042a, 0x2fb }, + { 0x00000000, 0x00202809, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x174 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000210, 0x00600411, 0x315 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x194 }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x3f800000, 0x00200411, 0x000 }, + { 0x46000000, 0x00600811, 0x1b2 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x19b }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000021, 0x00804811, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40281620, 0x000 }, + { 0x00000010, 0xc0811a20, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000008, 0x00221e30, 0x000 }, + { 0x00000029, 0x00201a2d, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfffbff09, 0x00204811, 0x000 }, + { 0x0000000f, 0x0020222d, 0x000 }, + { 0x00001fff, 0x00294a28, 0x000 }, + { 0x00000006, 0x0020222d, 0x000 }, + { 0x00000000, 0x002920e8, 0x000 }, + { 0x00000000, 0x00204808, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000100, 0x00201811, 0x000 }, + { 0x00000008, 0x00621e28, 0x12f }, + { 0x00000008, 0x00822228, 0x000 }, + { 0x0002c000, 0x00204411, 0x000 }, + { 0x00000015, 0x00600e2d, 0x1bd }, + { 0x00000016, 0x00600e2d, 0x1bd }, + { 0x0000c008, 0x00204411, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0x00000000, 0x14c00000, 0x1b9 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x39000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00804802, 0x000 }, + { 0x00000018, 0x00202e2d, 0x000 }, + { 0x00000000, 0x003b0d63, 0x000 }, + { 0x00000008, 0x00224a23, 0x000 }, + { 0x00000010, 0x00224a23, 0x000 }, + { 0x00000018, 0x00224a23, 0x000 }, + { 0x00000000, 0x00804803, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00000007, 0x0021062f, 0x000 }, + { 0x00000013, 0x00200a2d, 0x000 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000ffff, 0x40282220, 0x000 }, + { 0x0000000f, 0x00262228, 0x000 }, + { 0x00000010, 0x40212620, 0x000 }, + { 0x0000000f, 0x00262629, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1e0 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000081, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000080, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1dc }, + { 0x00000000, 0x00600000, 0x1e9 }, + { 0x00000001, 0x00531e27, 0x1d8 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000001f, 0x00280a22, 0x000 }, + { 0x0000001f, 0x00282a2a, 0x000 }, + { 0x00000001, 0x00530621, 0x1d1 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000002, 0x00304a2f, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000001, 0x00301e2f, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x1e9 }, + { 0x00000001, 0x00531e27, 0x1e5 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x0000000f, 0x00260e23, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000000f, 0x00261224, 0x000 }, + { 0x00000000, 0x00201411, 0x000 }, + { 0x00000000, 0x00601811, 0x2bb }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000000, 0x002f022b, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1f8 }, + { 0x00000010, 0x00221628, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a29, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x0020480a, 0x000 }, + { 0x00000000, 0x00202c11, 0x000 }, + { 0x00000010, 0x00221623, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a24, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x00731503, 0x205 }, + { 0x00000000, 0x00201805, 0x000 }, + { 0x00000000, 0x00731524, 0x205 }, + { 0x00000000, 0x002d14c5, 0x000 }, + { 0x00000000, 0x003008a2, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00000000, 0x00202003, 0x000 }, + { 0x00000000, 0x00802404, 0x000 }, + { 0x0000000f, 0x00210225, 0x000 }, + { 0x00000000, 0x14c00000, 0x68c }, + { 0x00000000, 0x002b1405, 0x000 }, + { 0x00000001, 0x00901625, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00294a22, 0x000 }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 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0x000 }, + { 0x96000000, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x00000000, 0xc0201000, 0x000 }, + { 0x0000001f, 0x00211624, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x0000001d, 0x00203623, 0x000 }, + { 0x00000003, 0x00281e23, 0x000 }, + { 0x00000008, 0x00222223, 0x000 }, + { 0xfffff000, 0x00282228, 0x000 }, + { 0x00000000, 0x002920e8, 0x000 }, + { 0x0000001f, 0x00203628, 0x000 }, + { 0x00000018, 0x00211e23, 0x000 }, + { 0x00000020, 0x00203627, 0x000 }, + { 0x00000002, 0x00221624, 0x000 }, + { 0x00000000, 0x003014a8, 0x000 }, + { 0x0000001e, 0x00203625, 0x000 }, + { 0x00000003, 0x00211a24, 0x000 }, + { 0x10000000, 0x00281a26, 0x000 }, + { 0xefffffff, 0x00283a2e, 0x000 }, + { 0x00000000, 0x004938ce, 0x67b }, + { 0x00000001, 0x40280a20, 0x000 }, + { 0x00000006, 0x40280e20, 0x000 }, + { 0x00000300, 0xc0281220, 0x000 }, + { 0x00000008, 0x00211224, 0x000 }, + { 0x00000000, 0xc0201620, 0x000 }, + { 0x00000000, 0xc0201a20, 0x000 }, + { 0x00000000, 0x00210222, 0x000 }, + { 0x00000000, 0x14c00000, 0x566 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00002258, 0x00300a24, 0x000 }, + { 0x00040000, 0x00694622, 0x68d }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00020000, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x56e }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x57c }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x56e }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00002258, 0x00300a24, 0x000 }, + { 0x00040000, 0x00694622, 0x68d }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x57c }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x572 }, + { 0x00000000, 0xc0201c00, 0x000 }, + { 0x00000000, 0xc0400000, 0x57c }, + { 0x00000004, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x57a }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000216d, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0604800, 0x692 }, + { 0x00000000, 0x00401c10, 0x57c }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00000000, 0xc0400000, 0x000 }, + { 0x00000000, 0x0ee00000, 0x57e }, + { 0x00000000, 0x00600000, 0x5c9 }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x58f }, + { 0x0000a2b7, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x68d }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000a2c4, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x58d }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000001, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5a0 }, + { 0x0000a2bb, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68d }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000a2c5, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x59e }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000002, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5b1 }, + { 0x0000a2bf, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68d }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000a2c6, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5af }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x0000a2c3, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68d }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000a2c7, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5be }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x85000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x0000304a, 0x00204411, 0x000 }, + { 0x01000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00400000, 0x5c4 }, + { 0xa4000000, 0xc0204411, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0xc0600000, 0x5c9 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000002c, 0x00203621, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0230, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5d0 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000030, 0x00403621, 0x5e3 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x5e3 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a092, 0x00604411, 0x68d }, + { 0x00000031, 0x00203630, 0x000 }, + { 0x0004a093, 0x00604411, 0x68d }, + { 0x00000032, 0x00203630, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x68d }, + { 0x00000033, 0x00203630, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68d }, + { 0x00000034, 0x00203630, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68d }, + { 0x00000035, 0x00203630, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68d }, + { 0x00000036, 0x00203630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x00000005, 0x00204811, 0x000 }, + { 0x0000a1f4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x88000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000001, 0x002f0230, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62c }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62c }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x605 }, + { 0x0000a092, 0x00204411, 0x000 }, + { 0x00000031, 0x00204a2d, 0x000 }, + { 0x0000a093, 0x00204411, 0x000 }, + { 0x00000032, 0x00204a2d, 0x000 }, + { 0x0000a2b6, 0x00204411, 0x000 }, + { 0x00000033, 0x00204a2d, 0x000 }, + { 0x0000a2ba, 0x00204411, 0x000 }, + { 0x00000034, 0x00204a2d, 0x000 }, + { 0x0000a2be, 0x00204411, 0x000 }, + { 0x00000035, 0x00204a2d, 0x000 }, + { 0x0000a2c2, 0x00204411, 0x000 }, + { 0x00000036, 0x00204a2d, 0x000 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x000001ff, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62b }, + { 0x00000000, 0x00210221, 0x000 }, + { 0x00000000, 0x14c00000, 0x60e }, + { 0x0004a003, 0x00604411, 0x68d }, + { 0x0000a003, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x14c00000, 0x613 }, + { 0x0004a010, 0x00604411, 0x68d }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62b }, + { 0x0004a011, 0x00604411, 0x68d }, + { 0x0000a011, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a012, 0x00604411, 0x68d }, + { 0x0000a012, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a013, 0x00604411, 0x68d }, + { 0x0000a013, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a014, 0x00604411, 0x68d }, + { 0x0000a014, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a015, 0x00604411, 0x68d }, + { 0x0000a015, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a016, 0x00604411, 0x68d }, + { 0x0000a016, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a017, 0x00604411, 0x68d }, + { 0x0000a017, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000002c, 0x0080062d, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x00000000, 0x0ee00000, 0x63d }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000002, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x63b }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x00001000, 0x00200811, 0x000 }, + { 0x0000002b, 0x00203622, 0x000 }, + { 0x00000000, 0x00600000, 0x641 }, + { 0x00000000, 0x00600000, 0x5c9 }, + { 0x98000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00804811, 0x000 }, + { 0x00000000, 0xc0600000, 0x641 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000a2a4, 0x00204411, 0x000 }, + { 0x00000022, 0x00204811, 0x000 }, + { 0x89000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00404811, 0x62d }, + { 0x97000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x8a000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00404811, 0x62d }, + { 0x00000000, 0x00600000, 0x65c }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0xc0204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x09800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x68d }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x00000004, 0x00404c11, 0x656 }, + { 0x00000000, 0x00400000, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000004, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffffb, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffff7, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x01800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004217f, 0x00604411, 0x68d }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x68c }, + { 0x00000010, 0x00404c11, 0x672 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x38c00000, 0x000 }, + { 0x0000001d, 0x00200a2d, 0x000 }, + { 0x0000001e, 0x00200e2d, 0x000 }, + { 0x0000001f, 0x0020122d, 0x000 }, + { 0x00000020, 0x0020162d, 0x000 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000004, 0x00301224, 0x000 }, + { 0x00000000, 0x002f0064, 0x000 }, + { 0x00000000, 0x0cc00000, 0x68b }, + { 0x00000003, 0x00281a22, 0x000 }, + { 0x00000008, 0x00221222, 0x000 }, + { 0xfffff000, 0x00281224, 0x000 }, + { 0x00000000, 0x002910c4, 0x000 }, + { 0x0000001f, 0x00403624, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x68d }, + { 0x9f000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x690 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x692 }, + { 0x9e000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x695 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0xc0204411, 0x000 }, + { 0x00000021, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000024, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000022, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000023, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x01420502, 0x05c00250, 0x000 }, + { 0x01c30168, 0x043f05c0, 0x000 }, + { 0x02250209, 0x02500151, 0x000 }, + { 0x02230245, 0x02a00241, 0x000 }, + { 0x03d705c0, 0x05c005c0, 0x000 }, + { 0x0649064a, 0x031f05c0, 0x000 }, + { 0x05c005c5, 0x03200340, 0x000 }, + { 0x032a0282, 0x03420334, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c00551, 0x05c005c0, 0x000 }, + { 0x03ba05c0, 0x04bb0344, 0x000 }, + { 0x049a0450, 0x043d05c0, 0x000 }, + { 0x04d005c0, 0x044104dd, 0x000 }, + { 0x04500507, 0x03510375, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x063f05c7, 0x000 }, + { 0x05c005c0, 0x000705c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x03f803ed, 0x04080406, 0x000 }, + { 0x040e040a, 0x040c0410, 0x000 }, + { 0x041c0418, 0x04240420, 0x000 }, + { 0x042c0428, 0x04340430, 0x000 }, + { 0x05c005c0, 0x043805c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x00020679, 0x06970006, 0x000 }, +}; + +static const u32 RV610_pfp_microcode[]={ +0xca0400, +0xa00000, +0x7e828b, +0x7c038b, +0x8001b8, +0x7c038b, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xc41838, +0xca2400, +0xca2800, +0x9581a8, +0xc41c3a, +0xc3c000, +0xca0800, +0xca0c00, +0x7c744b, +0xc20005, +0x99c000, +0xc41c3a, +0x7c744c, +0xc0fff0, +0x042c04, +0x309002, +0x7d2500, +0x351402, +0x7d350b, +0x255403, +0x7cd580, +0x259c03, +0x95c004, +0xd5001b, +0x7eddc1, +0x7d9d80, +0xd6801b, +0xd5801b, +0xd4401e, +0xd5401e, +0xd6401e, +0xd6801e, +0xd4801e, +0xd4c01e, +0x9783d3, +0xd5c01e, +0xca0800, +0x80001a, +0xca0c00, +0xe4011e, +0xd4001e, +0x80000c, +0xc41838, +0xe4013e, +0xd4001e, +0x80000c, +0xc41838, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca1800, +0xd4401e, +0xd5801e, +0x800053, +0xd40075, +0xd4401e, +0xca0800, +0xca0c00, +0xca1000, +0xd48019, +0xd4c018, +0xd50017, +0xd4801e, +0xd4c01e, +0xd5001e, +0xe2001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0xd48060, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xd48061, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xca0c00, +0xd4401e, +0xd48016, +0xd4c016, +0xd4801e, +0x8001b8, +0xd4c01e, +0xc60843, +0xca0c00, +0xca1000, +0x948004, +0xca1400, +0xe420f3, +0xd42013, +0xd56065, +0xd4e01c, +0xd5201c, +0xd5601c, +0x800000, +0x062001, +0xc60843, +0xca0c00, +0xca1000, +0x9483f7, +0xca1400, +0xe420f3, +0x800079, +0xd42013, +0xc60843, +0xca0c00, +0xca1000, +0x9883ef, +0xca1400, +0xd40064, +0x80008d, +0x000000, +0xc41432, +0xc61843, +0xc4082f, +0x954005, +0xc40c30, +0xd4401e, +0x800000, +0xee001e, +0x9583f5, +0xc41031, +0xd44033, +0xd52065, +0xd4a01c, +0xd4e01c, +0xd5201c, +0xe4015e, +0xd4001e, +0x800000, +0x062001, +0xca1800, +0x0a2001, +0xd60076, +0xc40836, +0x988007, +0xc61045, +0x950110, +0xd4001f, +0xd46062, +0x800000, +0xd42062, +0xcc3835, +0xcc1433, +0x8401bb, +0xd40072, +0xd5401e, +0x800000, +0xee001e, +0xe2001a, +0x8401bb, +0xe2001a, +0xcc104b, +0xcc0447, +0x2c9401, +0x7d098b, +0x984005, +0x7d15cb, +0xd4001a, +0x8001b8, +0xd4006d, +0x344401, +0xcc0c48, +0x98403a, +0xcc2c4a, +0x958004, +0xcc0449, +0x8001b8, +0xd4001a, +0xd4c01a, +0x282801, +0x8400f0, +0xcc1003, +0x98801b, +0x04380c, +0x8400f0, +0xcc1003, +0x988017, +0x043808, +0x8400f0, +0xcc1003, +0x988013, +0x043804, +0x8400f0, +0xcc1003, +0x988014, +0xcc104c, +0x9a8009, +0xcc144d, +0x9840dc, +0xd4006d, +0xcc1848, +0xd5001a, +0xd5401a, +0x8000c9, +0xd5801a, +0x96c0d5, +0xd4006d, +0x8001b8, +0xd4006e, +0x9ac003, +0xd4006d, +0xd4006e, +0x800000, +0xec007f, +0x9ac0cc, +0xd4006d, +0x8001b8, +0xd4006e, +0xcc1403, +0xcc1803, +0xcc1c03, +0x7d9103, +0x7dd583, +0x7d190c, +0x35cc1f, +0x35701f, +0x7cf0cb, +0x7cd08b, +0x880000, +0x7e8e8b, +0x95c004, +0xd4006e, +0x8001b8, +0xd4001a, +0xd4c01a, +0xcc0803, +0xcc0c03, +0xcc1003, +0xcc1403, +0xcc1803, +0xcc1c03, +0xcc2403, +0xcc2803, +0x35c41f, +0x36b01f, +0x7c704b, +0x34f01f, +0x7c704b, +0x35701f, +0x7c704b, +0x7d8881, +0x7dccc1, +0x7e5101, +0x7e9541, +0x7c9082, +0x7cd4c2, +0x7c848b, +0x9ac003, +0x7c8c8b, +0x2c8801, +0x98809e, +0xd4006d, +0x98409c, +0xd4006e, +0xcc084c, +0xcc0c4d, +0xcc1048, +0xd4801a, +0xd4c01a, +0x800101, +0xd5001a, +0xcc0832, +0xd40032, +0x9482d9, +0xca0c00, +0xd4401e, +0x800000, +0xd4001e, +0xe4011e, +0xd4001e, +0xca0800, +0xca0c00, +0xca1000, +0xd4401e, +0xca1400, +0xd4801e, +0xd4c01e, +0xd5001e, +0xd5401e, +0xd54034, +0x800000, +0xee001e, +0x280404, +0xe2001a, +0xe2001a, +0xd4401a, +0xca3800, +0xcc0803, +0xcc0c03, +0xcc0c03, +0xcc0c03, +0x9882bd, +0x000000, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0400, +0xc2ff00, +0xcc0834, +0xc13fff, +0x7c74cb, +0x7cc90b, +0x7d010f, +0x9902b0, +0x7c738b, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0800, +0x281900, +0x7d898b, +0x958014, +0x281404, +0xca0c00, +0xca1000, +0xca1c00, +0xca2400, +0xe2001f, +0xd4c01a, +0xd5001a, +0xd5401a, +0xcc1803, +0xcc2c03, +0xcc2c03, +0xcc2c03, +0x7da58b, +0x7d9c47, +0x984297, +0x000000, +0x800161, +0xd4c01a, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0x248c06, +0x0ccc06, +0x98c006, +0xcc104e, +0x990004, +0xd40073, +0xe4011e, +0xd4001e, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xca0800, +0xca0c00, +0x34d018, +0x251001, +0x950021, +0xc17fff, +0xca1000, +0xca1400, +0xca1800, +0xd4801d, +0xd4c01d, +0x7db18b, +0xc14202, +0xc2c001, +0xd5801d, +0x34dc0e, +0x7d5d4c, +0x7f734c, +0xd7401e, +0xd5001e, +0xd5401e, +0xc14200, +0xc2c000, +0x099c01, +0x31dc10, +0x7f5f4c, +0x7f734c, +0x042802, +0x7d8380, +0xd5a86f, +0xd58066, +0xd7401e, +0xec005e, +0xc82402, +0xc82402, +0x8001b8, +0xd60076, +0xd4401e, +0xd4801e, +0xd4c01e, +0x800000, +0xee001e, +0x800000, +0xee001f, +0xd4001f, +0x800000, +0xd4001f, +0xd4001f, +0x880000, +0xd4001f, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x010171, +0x020178, +0x03008f, +0x04007f, +0x050003, +0x06003f, +0x070032, +0x08012c, +0x090046, +0x0a0036, +0x1001b6, +0x1700a2, +0x22013a, +0x230149, +0x2000b4, +0x240125, +0x27004d, +0x28006a, +0x2a0060, +0x2b0052, +0x2f0065, +0x320087, +0x34017f, +0x3c0156, +0x3f0072, +0x41018c, +0x44012e, +0x550173, +0x56017a, +0x60000b, +0x610034, +0x620038, +0x630038, +0x640038, +0x650038, +0x660038, +0x670038, +0x68003a, +0x690041, +0x6a0048, +0x6b0048, +0x6c0048, +0x6d0048, +0x6e0048, +0x6f0048, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +}; + +static const u32 RV620_cp_microcode[][3]={ + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x0000ffff, 0x00284621, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x00000000, 0x00e00000, 0x000 }, + { 0x00010000, 0xc0294620, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x00000000, 0x00600000, 0x631 }, + { 0x00000000, 0x00600000, 0x645 }, + { 0x00000000, 0xc0200800, 0x000 }, + { 0x00000f00, 0x00281622, 0x000 }, + { 0x00000008, 0x00211625, 0x000 }, + { 0x00000018, 0x00203625, 0x000 }, + { 0x8d000000, 0x00204411, 0x000 }, + { 0x00000004, 0x002f0225, 0x000 }, + { 0x00000000, 0x0ce00000, 0x018 }, + { 0x00412000, 0x00404811, 0x019 }, + { 0x00422000, 0x00204811, 0x000 }, + { 0x8e000000, 0x00204411, 0x000 }, + { 0x00000028, 0x00204a2d, 0x000 }, + { 0x90000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x0000000c, 0x00211622, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000019, 0x00211a22, 0x000 }, + { 0x00000004, 0x00281a26, 0x000 }, + { 0x00000000, 0x002914c5, 0x000 }, + { 0x00000019, 0x00203625, 0x000 }, + { 0x00000000, 0x003a1402, 0x000 }, + { 0x00000016, 0x00211625, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0xfffffffc, 0x00280e23, 0x000 }, + { 0x00000000, 0x002914a3, 0x000 }, + { 0x00000017, 0x00203625, 0x000 }, + { 0x00008000, 0x00280e22, 0x000 }, + { 0x00000007, 0x00220e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x20000000, 0x00280e22, 0x000 }, + { 0x00000006, 0x00210e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x00000000, 0x00220222, 0x000 }, + { 0x00000000, 0x14e00000, 0x038 }, + { 0x00000000, 0x2ee00000, 0x035 }, + { 0x00000000, 0x2ce00000, 0x037 }, + { 0x00000000, 0x00400e2d, 0x039 }, + { 0x00000008, 0x00200e2d, 0x000 }, + { 0x00000009, 0x0040122d, 0x046 }, + { 0x00000001, 0x00400e2d, 0x039 }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x03e }, + { 0x00000008, 0x00401c11, 0x041 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x0000000f, 0x00281e27, 0x000 }, + { 0x00000003, 0x00221e27, 0x000 }, + { 0x7fc00000, 0x00281a23, 0x000 }, + { 0x00000014, 0x00211a26, 0x000 }, + { 0x00000001, 0x00331a26, 0x000 }, + { 0x00000008, 0x00221a26, 0x000 }, + { 0x00000000, 0x00290cc7, 0x000 }, + { 0x00000027, 0x00203624, 0x000 }, + { 0x00007f00, 0x00281221, 0x000 }, + { 0x00001400, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x04b }, + { 0x00000001, 0x00290e23, 0x000 }, + { 0x0000000e, 0x00203623, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfff80000, 0x00294a23, 0x000 }, + { 0x00000000, 0x003a2c02, 0x000 }, + { 0x00000002, 0x00220e2b, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x0000000f, 0x00203623, 0x000 }, + { 0x00001fff, 0x00294a23, 0x000 }, + { 0x00000027, 0x00204a2d, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000029, 0x00200e2d, 0x000 }, + { 0x060a0200, 0x00294a23, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00210222, 0x000 }, + { 0x00000000, 0x14e00000, 0x061 }, + { 0x00000000, 0x2ee00000, 0x05f }, + { 0x00000000, 0x2ce00000, 0x05e }, + { 0x00000000, 0x00400e2d, 0x062 }, + { 0x00000001, 0x00400e2d, 0x062 }, + { 0x0000000a, 0x00200e2d, 0x000 }, + { 0x0000000b, 0x0040122d, 0x06a }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x7fc00000, 0x00281623, 0x000 }, + { 0x00000014, 0x00211625, 0x000 }, + { 0x00000001, 0x00331625, 0x000 }, + { 0x80000000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00290ca3, 0x000 }, + { 0x3ffffc00, 0x00290e23, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x06d }, + { 0x00000100, 0x00401c11, 0x070 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x000000f0, 0x00281e27, 0x000 }, + { 0x00000004, 0x00221e27, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0xfffff0ff, 0x00281a30, 0x000 }, + { 0x0000a028, 0x00204411, 0x000 }, + { 0x00000000, 0x002948e6, 0x000 }, + { 0x0000a018, 0x00204411, 0x000 }, + { 0x3fffffff, 0x00284a23, 0x000 }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000030, 0x0020162d, 0x000 }, + { 0x00000002, 0x00291625, 0x000 }, + { 0x00000030, 0x00203625, 0x000 }, + { 0x00000025, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a3, 0x000 }, + { 0x00000000, 0x0cc00000, 0x083 }, + { 0x00000026, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a4, 0x000 }, + { 0x00000000, 0x0cc00000, 0x084 }, + { 0x00000000, 0x00400000, 0x08a }, + { 0x00000025, 0x00203623, 0x000 }, + { 0x00000026, 0x00203624, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000002, 0x00210227, 0x000 }, + { 0x00000000, 0x14e00000, 0x08a }, + { 0x00000000, 0x00600000, 0x668 }, + { 0x00000000, 0x00600000, 0x65c }, + { 0x00000002, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x08d }, + { 0x00000012, 0xc0403620, 0x093 }, + { 0x00000000, 0x2ee00000, 0x091 }, + { 0x00000000, 0x2ce00000, 0x090 }, + { 0x00000002, 0x00400e2d, 0x092 }, + { 0x00000003, 0x00400e2d, 0x092 }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000012, 0x00203623, 0x000 }, + { 0x00000003, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x098 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x0a0 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x2ee00000, 0x09e }, + { 0x00000000, 0x2ce00000, 0x09d }, + { 0x00000002, 0x00400e2d, 0x09f }, + { 0x00000003, 0x00400e2d, 0x09f }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000000, 0x00204803, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x003f0000, 0x00280e23, 0x000 }, + { 0x00000010, 0x00210e23, 0x000 }, + { 0x00000011, 0x00203623, 0x000 }, + { 0x0000001e, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a7 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x0000001f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0aa }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000008, 0x00210e2b, 0x000 }, + { 0x0000007f, 0x00280e23, 0x000 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0e1 }, + { 0x00000000, 0x27000000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ae00000, 0x0b3 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x0000000c, 0x00221e30, 0x000 }, + { 0x99800000, 0x00204411, 0x000 }, + { 0x00000004, 0x0020122d, 0x000 }, + { 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0x00000000, 0x14c00000, 0x000 }, + { 0x0000001d, 0x00203623, 0x000 }, + { 0x00000003, 0x00281e23, 0x000 }, + { 0x00000008, 0x00222223, 0x000 }, + { 0xfffff000, 0x00282228, 0x000 }, + { 0x00000000, 0x002920e8, 0x000 }, + { 0x0000001f, 0x00203628, 0x000 }, + { 0x00000018, 0x00211e23, 0x000 }, + { 0x00000020, 0x00203627, 0x000 }, + { 0x00000002, 0x00221624, 0x000 }, + { 0x00000000, 0x003014a8, 0x000 }, + { 0x0000001e, 0x00203625, 0x000 }, + { 0x00000003, 0x00211a24, 0x000 }, + { 0x10000000, 0x00281a26, 0x000 }, + { 0xefffffff, 0x00283a2e, 0x000 }, + { 0x00000000, 0x004938ce, 0x67b }, + { 0x00000001, 0x40280a20, 0x000 }, + { 0x00000006, 0x40280e20, 0x000 }, + { 0x00000300, 0xc0281220, 0x000 }, + { 0x00000008, 0x00211224, 0x000 }, + { 0x00000000, 0xc0201620, 0x000 }, + { 0x00000000, 0xc0201a20, 0x000 }, + { 0x00000000, 0x00210222, 0x000 }, + { 0x00000000, 0x14c00000, 0x566 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00002258, 0x00300a24, 0x000 }, + { 0x00040000, 0x00694622, 0x68d }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00020000, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x56e }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x57c }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x56e }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00002258, 0x00300a24, 0x000 }, + { 0x00040000, 0x00694622, 0x68d }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x57c }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x572 }, + { 0x00000000, 0xc0201c00, 0x000 }, + { 0x00000000, 0xc0400000, 0x57c }, + { 0x00000004, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x57a }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000216d, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0604800, 0x692 }, + { 0x00000000, 0x00401c10, 0x57c }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00000000, 0xc0400000, 0x000 }, + { 0x00000000, 0x0ee00000, 0x57e }, + { 0x00000000, 0x00600000, 0x5c9 }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x58f }, + { 0x0000a2b7, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x68d }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000a2c4, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x58d }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000001, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5a0 }, + { 0x0000a2bb, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68d }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000a2c5, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x59e }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000002, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5b1 }, + { 0x0000a2bf, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68d }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000a2c6, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5af }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x0000a2c3, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68d }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000a2c7, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5be }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x85000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x0000304a, 0x00204411, 0x000 }, + { 0x01000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00400000, 0x5c4 }, + { 0xa4000000, 0xc0204411, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0xc0600000, 0x5c9 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000002c, 0x00203621, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0230, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5d0 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000030, 0x00403621, 0x5e3 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x5e3 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a092, 0x00604411, 0x68d }, + { 0x00000031, 0x00203630, 0x000 }, + { 0x0004a093, 0x00604411, 0x68d }, + { 0x00000032, 0x00203630, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x68d }, + { 0x00000033, 0x00203630, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68d }, + { 0x00000034, 0x00203630, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68d }, + { 0x00000035, 0x00203630, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68d }, + { 0x00000036, 0x00203630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x00000005, 0x00204811, 0x000 }, + { 0x0000a1f4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x88000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000001, 0x002f0230, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62c }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62c }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x605 }, + { 0x0000a092, 0x00204411, 0x000 }, + { 0x00000031, 0x00204a2d, 0x000 }, + { 0x0000a093, 0x00204411, 0x000 }, + { 0x00000032, 0x00204a2d, 0x000 }, + { 0x0000a2b6, 0x00204411, 0x000 }, + { 0x00000033, 0x00204a2d, 0x000 }, + { 0x0000a2ba, 0x00204411, 0x000 }, + { 0x00000034, 0x00204a2d, 0x000 }, + { 0x0000a2be, 0x00204411, 0x000 }, + { 0x00000035, 0x00204a2d, 0x000 }, + { 0x0000a2c2, 0x00204411, 0x000 }, + { 0x00000036, 0x00204a2d, 0x000 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x000001ff, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62b }, + { 0x00000000, 0x00210221, 0x000 }, + { 0x00000000, 0x14c00000, 0x60e }, + { 0x0004a003, 0x00604411, 0x68d }, + { 0x0000a003, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x14c00000, 0x613 }, + { 0x0004a010, 0x00604411, 0x68d }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62b }, + { 0x0004a011, 0x00604411, 0x68d }, + { 0x0000a011, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a012, 0x00604411, 0x68d }, + { 0x0000a012, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a013, 0x00604411, 0x68d }, + { 0x0000a013, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a014, 0x00604411, 0x68d }, + { 0x0000a014, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a015, 0x00604411, 0x68d }, + { 0x0000a015, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a016, 0x00604411, 0x68d }, + { 0x0000a016, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a017, 0x00604411, 0x68d }, + { 0x0000a017, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000002c, 0x0080062d, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x00000000, 0x0ee00000, 0x63d }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000002, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x63b }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x00001000, 0x00200811, 0x000 }, + { 0x0000002b, 0x00203622, 0x000 }, + { 0x00000000, 0x00600000, 0x641 }, + { 0x00000000, 0x00600000, 0x5c9 }, + { 0x98000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00804811, 0x000 }, + { 0x00000000, 0xc0600000, 0x641 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000a2a4, 0x00204411, 0x000 }, + { 0x00000022, 0x00204811, 0x000 }, + { 0x89000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00404811, 0x62d }, + { 0x97000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x8a000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00404811, 0x62d }, + { 0x00000000, 0x00600000, 0x65c }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0xc0204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x09800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x68d }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x00000004, 0x00404c11, 0x656 }, + { 0x00000000, 0x00400000, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000004, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffffb, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffff7, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x01800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004217f, 0x00604411, 0x68d }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x68c }, + { 0x00000010, 0x00404c11, 0x672 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x38c00000, 0x000 }, + { 0x0000001d, 0x00200a2d, 0x000 }, + { 0x0000001e, 0x00200e2d, 0x000 }, + { 0x0000001f, 0x0020122d, 0x000 }, + { 0x00000020, 0x0020162d, 0x000 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000004, 0x00301224, 0x000 }, + { 0x00000000, 0x002f0064, 0x000 }, + { 0x00000000, 0x0cc00000, 0x68b }, + { 0x00000003, 0x00281a22, 0x000 }, + { 0x00000008, 0x00221222, 0x000 }, + { 0xfffff000, 0x00281224, 0x000 }, + { 0x00000000, 0x002910c4, 0x000 }, + { 0x0000001f, 0x00403624, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x68d }, + { 0x9f000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x690 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x692 }, + { 0x9e000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x695 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0xc0204411, 0x000 }, + { 0x00000021, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000024, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000022, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000023, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x01420502, 0x05c00250, 0x000 }, + { 0x01c30168, 0x043f05c0, 0x000 }, + { 0x02250209, 0x02500151, 0x000 }, + { 0x02230245, 0x02a00241, 0x000 }, + { 0x03d705c0, 0x05c005c0, 0x000 }, + { 0x0649064a, 0x031f05c0, 0x000 }, + { 0x05c005c5, 0x03200340, 0x000 }, + { 0x032a0282, 0x03420334, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c00551, 0x05c005c0, 0x000 }, + { 0x03ba05c0, 0x04bb0344, 0x000 }, + { 0x049a0450, 0x043d05c0, 0x000 }, + { 0x04d005c0, 0x044104dd, 0x000 }, + { 0x04500507, 0x03510375, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x063f05c7, 0x000 }, + { 0x05c005c0, 0x000705c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x03f803ed, 0x04080406, 0x000 }, + { 0x040e040a, 0x040c0410, 0x000 }, + { 0x041c0418, 0x04240420, 0x000 }, + { 0x042c0428, 0x04340430, 0x000 }, + { 0x05c005c0, 0x043805c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x00020679, 0x06970006, 0x000 }, +}; + +static const u32 RV620_pfp_microcode[]={ +0xca0400, +0xa00000, +0x7e828b, +0x7c038b, +0x8001b8, +0x7c038b, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xc41838, +0xca2400, +0xca2800, +0x9581a8, +0xc41c3a, +0xc3c000, +0xca0800, +0xca0c00, +0x7c744b, +0xc20005, +0x99c000, +0xc41c3a, +0x7c744c, +0xc0fff0, +0x042c04, +0x309002, +0x7d2500, +0x351402, +0x7d350b, +0x255403, +0x7cd580, +0x259c03, +0x95c004, +0xd5001b, +0x7eddc1, +0x7d9d80, +0xd6801b, +0xd5801b, +0xd4401e, +0xd5401e, +0xd6401e, +0xd6801e, +0xd4801e, +0xd4c01e, +0x9783d3, +0xd5c01e, +0xca0800, +0x80001a, +0xca0c00, +0xe4011e, +0xd4001e, +0x80000c, +0xc41838, +0xe4013e, +0xd4001e, +0x80000c, +0xc41838, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca1800, +0xd4401e, +0xd5801e, +0x800053, +0xd40075, +0xd4401e, +0xca0800, +0xca0c00, +0xca1000, +0xd48019, +0xd4c018, +0xd50017, +0xd4801e, +0xd4c01e, +0xd5001e, +0xe2001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0xd48060, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xd48061, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xca0c00, +0xd4401e, +0xd48016, +0xd4c016, +0xd4801e, +0x8001b8, +0xd4c01e, +0xc60843, +0xca0c00, +0xca1000, +0x948004, +0xca1400, +0xe420f3, +0xd42013, +0xd56065, +0xd4e01c, +0xd5201c, +0xd5601c, +0x800000, +0x062001, +0xc60843, +0xca0c00, +0xca1000, +0x9483f7, +0xca1400, +0xe420f3, +0x800079, +0xd42013, +0xc60843, +0xca0c00, +0xca1000, +0x9883ef, +0xca1400, +0xd40064, +0x80008d, +0x000000, +0xc41432, +0xc61843, +0xc4082f, +0x954005, +0xc40c30, +0xd4401e, +0x800000, +0xee001e, +0x9583f5, +0xc41031, +0xd44033, +0xd52065, +0xd4a01c, +0xd4e01c, +0xd5201c, +0xe4015e, +0xd4001e, +0x800000, +0x062001, +0xca1800, +0x0a2001, +0xd60076, +0xc40836, +0x988007, +0xc61045, +0x950110, +0xd4001f, +0xd46062, +0x800000, +0xd42062, +0xcc3835, +0xcc1433, +0x8401bb, +0xd40072, +0xd5401e, +0x800000, +0xee001e, +0xe2001a, +0x8401bb, +0xe2001a, +0xcc104b, +0xcc0447, +0x2c9401, +0x7d098b, +0x984005, +0x7d15cb, +0xd4001a, +0x8001b8, +0xd4006d, +0x344401, +0xcc0c48, +0x98403a, +0xcc2c4a, +0x958004, +0xcc0449, +0x8001b8, +0xd4001a, +0xd4c01a, +0x282801, +0x8400f0, +0xcc1003, +0x98801b, +0x04380c, +0x8400f0, +0xcc1003, +0x988017, +0x043808, +0x8400f0, +0xcc1003, +0x988013, +0x043804, +0x8400f0, +0xcc1003, +0x988014, +0xcc104c, +0x9a8009, +0xcc144d, +0x9840dc, +0xd4006d, +0xcc1848, +0xd5001a, +0xd5401a, +0x8000c9, +0xd5801a, +0x96c0d5, +0xd4006d, +0x8001b8, +0xd4006e, +0x9ac003, +0xd4006d, +0xd4006e, +0x800000, +0xec007f, +0x9ac0cc, +0xd4006d, +0x8001b8, +0xd4006e, +0xcc1403, +0xcc1803, +0xcc1c03, +0x7d9103, +0x7dd583, +0x7d190c, +0x35cc1f, +0x35701f, +0x7cf0cb, +0x7cd08b, +0x880000, +0x7e8e8b, +0x95c004, +0xd4006e, +0x8001b8, +0xd4001a, +0xd4c01a, +0xcc0803, +0xcc0c03, +0xcc1003, +0xcc1403, +0xcc1803, +0xcc1c03, +0xcc2403, +0xcc2803, +0x35c41f, +0x36b01f, +0x7c704b, +0x34f01f, +0x7c704b, +0x35701f, +0x7c704b, +0x7d8881, +0x7dccc1, +0x7e5101, +0x7e9541, +0x7c9082, +0x7cd4c2, +0x7c848b, +0x9ac003, +0x7c8c8b, +0x2c8801, +0x98809e, +0xd4006d, +0x98409c, +0xd4006e, +0xcc084c, +0xcc0c4d, +0xcc1048, +0xd4801a, +0xd4c01a, +0x800101, +0xd5001a, +0xcc0832, +0xd40032, +0x9482d9, +0xca0c00, +0xd4401e, +0x800000, +0xd4001e, +0xe4011e, +0xd4001e, +0xca0800, +0xca0c00, +0xca1000, +0xd4401e, +0xca1400, +0xd4801e, +0xd4c01e, +0xd5001e, +0xd5401e, +0xd54034, +0x800000, +0xee001e, +0x280404, +0xe2001a, +0xe2001a, +0xd4401a, +0xca3800, +0xcc0803, +0xcc0c03, +0xcc0c03, +0xcc0c03, +0x9882bd, +0x000000, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0400, +0xc2ff00, +0xcc0834, +0xc13fff, +0x7c74cb, +0x7cc90b, +0x7d010f, +0x9902b0, +0x7c738b, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0800, +0x281900, +0x7d898b, +0x958014, +0x281404, +0xca0c00, +0xca1000, +0xca1c00, +0xca2400, +0xe2001f, +0xd4c01a, +0xd5001a, +0xd5401a, +0xcc1803, +0xcc2c03, +0xcc2c03, +0xcc2c03, +0x7da58b, +0x7d9c47, +0x984297, +0x000000, +0x800161, +0xd4c01a, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0x248c06, +0x0ccc06, +0x98c006, +0xcc104e, +0x990004, +0xd40073, +0xe4011e, +0xd4001e, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xca0800, +0xca0c00, +0x34d018, +0x251001, +0x950021, +0xc17fff, +0xca1000, +0xca1400, +0xca1800, +0xd4801d, +0xd4c01d, +0x7db18b, +0xc14202, +0xc2c001, +0xd5801d, +0x34dc0e, +0x7d5d4c, +0x7f734c, +0xd7401e, +0xd5001e, +0xd5401e, +0xc14200, +0xc2c000, +0x099c01, +0x31dc10, +0x7f5f4c, +0x7f734c, +0x042802, +0x7d8380, +0xd5a86f, +0xd58066, +0xd7401e, +0xec005e, +0xc82402, +0xc82402, +0x8001b8, +0xd60076, +0xd4401e, +0xd4801e, +0xd4c01e, +0x800000, +0xee001e, +0x800000, +0xee001f, +0xd4001f, +0x800000, +0xd4001f, +0xd4001f, +0x880000, +0xd4001f, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x010171, +0x020178, +0x03008f, +0x04007f, +0x050003, +0x06003f, +0x070032, +0x08012c, +0x090046, +0x0a0036, +0x1001b6, +0x1700a2, +0x22013a, +0x230149, +0x2000b4, +0x240125, +0x27004d, +0x28006a, +0x2a0060, +0x2b0052, +0x2f0065, +0x320087, +0x34017f, +0x3c0156, +0x3f0072, +0x41018c, +0x44012e, +0x550173, +0x56017a, +0x60000b, +0x610034, +0x620038, +0x630038, +0x640038, +0x650038, +0x660038, +0x670038, +0x68003a, +0x690041, +0x6a0048, +0x6b0048, +0x6c0048, +0x6d0048, +0x6e0048, +0x6f0048, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +}; + +static const u32 RV630_cp_microcode[][3]={ + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x0000ffff, 0x00284621, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x00000000, 0x00e00000, 0x000 }, + { 0x00010000, 0xc0294620, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x00000000, 0x00600000, 0x62e }, + { 0x00000000, 0x00600000, 0x642 }, + { 0x00000000, 0xc0200800, 0x000 }, + { 0x00000f00, 0x00281622, 0x000 }, + { 0x00000008, 0x00211625, 0x000 }, + { 0x00000018, 0x00203625, 0x000 }, + { 0x8d000000, 0x00204411, 0x000 }, + { 0x00000004, 0x002f0225, 0x000 }, + { 0x00000000, 0x0ce00000, 0x018 }, + { 0x00412000, 0x00404811, 0x019 }, + { 0x00422000, 0x00204811, 0x000 }, + { 0x8e000000, 0x00204411, 0x000 }, + { 0x00000028, 0x00204a2d, 0x000 }, + { 0x90000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x0000000c, 0x00211622, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000019, 0x00211a22, 0x000 }, + { 0x00000004, 0x00281a26, 0x000 }, + { 0x00000000, 0x002914c5, 0x000 }, + { 0x00000019, 0x00203625, 0x000 }, + { 0x00000000, 0x003a1402, 0x000 }, + { 0x00000016, 0x00211625, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0xfffffffc, 0x00280e23, 0x000 }, + { 0x00000000, 0x002914a3, 0x000 }, + { 0x00000017, 0x00203625, 0x000 }, + { 0x00008000, 0x00280e22, 0x000 }, + { 0x00000007, 0x00220e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x20000000, 0x00280e22, 0x000 }, + { 0x00000006, 0x00210e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x00000000, 0x00220222, 0x000 }, + { 0x00000000, 0x14e00000, 0x038 }, + { 0x00000000, 0x2ee00000, 0x035 }, + { 0x00000000, 0x2ce00000, 0x037 }, + { 0x00000000, 0x00400e2d, 0x039 }, + { 0x00000008, 0x00200e2d, 0x000 }, + { 0x00000009, 0x0040122d, 0x046 }, + { 0x00000001, 0x00400e2d, 0x039 }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x03e }, + { 0x00000008, 0x00401c11, 0x041 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x0000000f, 0x00281e27, 0x000 }, + { 0x00000003, 0x00221e27, 0x000 }, + { 0x7fc00000, 0x00281a23, 0x000 }, + { 0x00000014, 0x00211a26, 0x000 }, + { 0x00000001, 0x00331a26, 0x000 }, + { 0x00000008, 0x00221a26, 0x000 }, + { 0x00000000, 0x00290cc7, 0x000 }, + { 0x00000027, 0x00203624, 0x000 }, + { 0x00007f00, 0x00281221, 0x000 }, + { 0x00001400, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x04b }, + { 0x00000001, 0x00290e23, 0x000 }, + { 0x0000000e, 0x00203623, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfff80000, 0x00294a23, 0x000 }, + { 0x00000000, 0x003a2c02, 0x000 }, + { 0x00000002, 0x00220e2b, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x0000000f, 0x00203623, 0x000 }, + { 0x00001fff, 0x00294a23, 0x000 }, + { 0x00000027, 0x00204a2d, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000029, 0x00200e2d, 0x000 }, + { 0x060a0200, 0x00294a23, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00210222, 0x000 }, + { 0x00000000, 0x14e00000, 0x061 }, + { 0x00000000, 0x2ee00000, 0x05f }, + { 0x00000000, 0x2ce00000, 0x05e }, + { 0x00000000, 0x00400e2d, 0x062 }, + { 0x00000001, 0x00400e2d, 0x062 }, + { 0x0000000a, 0x00200e2d, 0x000 }, + { 0x0000000b, 0x0040122d, 0x06a }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x7fc00000, 0x00281623, 0x000 }, + { 0x00000014, 0x00211625, 0x000 }, + { 0x00000001, 0x00331625, 0x000 }, + { 0x80000000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00290ca3, 0x000 }, + { 0x3ffffc00, 0x00290e23, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x06d }, + { 0x00000100, 0x00401c11, 0x070 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x000000f0, 0x00281e27, 0x000 }, + { 0x00000004, 0x00221e27, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0xfffff0ff, 0x00281a30, 0x000 }, + { 0x0000a028, 0x00204411, 0x000 }, + { 0x00000000, 0x002948e6, 0x000 }, + { 0x0000a018, 0x00204411, 0x000 }, + { 0x3fffffff, 0x00284a23, 0x000 }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000030, 0x0020162d, 0x000 }, + { 0x00000002, 0x00291625, 0x000 }, + { 0x00000030, 0x00203625, 0x000 }, + { 0x00000025, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a3, 0x000 }, + { 0x00000000, 0x0cc00000, 0x083 }, + { 0x00000026, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a4, 0x000 }, + { 0x00000000, 0x0cc00000, 0x084 }, + { 0x00000000, 0x00400000, 0x08a }, + { 0x00000025, 0x00203623, 0x000 }, + { 0x00000026, 0x00203624, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000002, 0x00210227, 0x000 }, + { 0x00000000, 0x14e00000, 0x08a }, + { 0x00000000, 0x00600000, 0x665 }, + { 0x00000000, 0x00600000, 0x659 }, + { 0x00000002, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x08d }, + { 0x00000012, 0xc0403620, 0x093 }, + { 0x00000000, 0x2ee00000, 0x091 }, + { 0x00000000, 0x2ce00000, 0x090 }, + { 0x00000002, 0x00400e2d, 0x092 }, + { 0x00000003, 0x00400e2d, 0x092 }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000012, 0x00203623, 0x000 }, + { 0x00000003, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x098 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x0a0 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x2ee00000, 0x09e }, + { 0x00000000, 0x2ce00000, 0x09d }, + { 0x00000002, 0x00400e2d, 0x09f }, + { 0x00000003, 0x00400e2d, 0x09f }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000000, 0x00204803, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x003f0000, 0x00280e23, 0x000 }, + { 0x00000010, 0x00210e23, 0x000 }, + { 0x00000011, 0x00203623, 0x000 }, + { 0x0000001e, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a7 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x0000001f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0aa }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000008, 0x00210e2b, 0x000 }, + { 0x0000007f, 0x00280e23, 0x000 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0e1 }, + { 0x00000000, 0x27000000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ae00000, 0x0b3 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x0000000c, 0x00221e30, 0x000 }, + { 0x99800000, 0x00204411, 0x000 }, + { 0x00000004, 0x0020122d, 0x000 }, + { 0x00000008, 0x00221224, 0x000 }, + { 0x00000010, 0x00201811, 0x000 }, + { 0x00000000, 0x00291ce4, 0x000 }, + { 0x00000000, 0x00604807, 0x12f }, + { 0x9b000000, 0x00204411, 0x000 }, + { 0x00000000, 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0x00262228, 0x000 }, + { 0x00000010, 0x40212620, 0x000 }, + { 0x0000000f, 0x00262629, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1e0 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000081, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000080, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1dc }, + { 0x00000000, 0x00600000, 0x1e9 }, + { 0x00000001, 0x00531e27, 0x1d8 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000001f, 0x00280a22, 0x000 }, + { 0x0000001f, 0x00282a2a, 0x000 }, + { 0x00000001, 0x00530621, 0x1d1 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000002, 0x00304a2f, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000001, 0x00301e2f, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x1e9 }, + { 0x00000001, 0x00531e27, 0x1e5 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x0000000f, 0x00260e23, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000000f, 0x00261224, 0x000 }, + { 0x00000000, 0x00201411, 0x000 }, + { 0x00000000, 0x00601811, 0x2bb }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000000, 0x002f022b, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1f8 }, + { 0x00000010, 0x00221628, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a29, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x0020480a, 0x000 }, + { 0x00000000, 0x00202c11, 0x000 }, + { 0x00000010, 0x00221623, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a24, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x00731503, 0x205 }, + { 0x00000000, 0x00201805, 0x000 }, + { 0x00000000, 0x00731524, 0x205 }, + { 0x00000000, 0x002d14c5, 0x000 }, + { 0x00000000, 0x003008a2, 0x000 }, + { 0x00000000, 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0x00203627, 0x000 }, + { 0x00000002, 0x00221624, 0x000 }, + { 0x00000000, 0x003014a8, 0x000 }, + { 0x0000001e, 0x00203625, 0x000 }, + { 0x00000003, 0x00211a24, 0x000 }, + { 0x10000000, 0x00281a26, 0x000 }, + { 0xefffffff, 0x00283a2e, 0x000 }, + { 0x00000000, 0x004938ce, 0x678 }, + { 0x00000001, 0x40280a20, 0x000 }, + { 0x00000006, 0x40280e20, 0x000 }, + { 0x00000300, 0xc0281220, 0x000 }, + { 0x00000008, 0x00211224, 0x000 }, + { 0x00000000, 0xc0201620, 0x000 }, + { 0x00000000, 0xc0201a20, 0x000 }, + { 0x00000000, 0x00210222, 0x000 }, + { 0x00000000, 0x14c00000, 0x563 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00002258, 0x00300a24, 0x000 }, + { 0x00040000, 0x00694622, 0x68a }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00020000, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x56b }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x579 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x56b }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00002258, 0x00300a24, 0x000 }, + { 0x00040000, 0x00694622, 0x68a }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x579 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x56f }, + { 0x00000000, 0xc0201c00, 0x000 }, + { 0x00000000, 0xc0400000, 0x579 }, + { 0x00000004, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x577 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000216d, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0604800, 0x68f }, + { 0x00000000, 0x00401c10, 0x579 }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00000000, 0xc0400000, 0x000 }, + { 0x00000000, 0x0ee00000, 0x57b }, + { 0x00000000, 0x00600000, 0x5c6 }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x58c }, + { 0x0000a2b7, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c4, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x58a }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000001, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x59d }, + { 0x0000a2bb, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c5, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x59b }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000002, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5ae }, + { 0x0000a2bf, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c6, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5ac }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x0000a2c3, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c7, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5bb }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x85000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x0000304a, 0x00204411, 0x000 }, + { 0x01000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00400000, 0x5c1 }, + { 0xa4000000, 0xc0204411, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0xc0600000, 0x5c6 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000002c, 0x00203621, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0230, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5cd }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000030, 0x00403621, 0x5e0 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x5e0 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a092, 0x00604411, 0x68a }, + { 0x00000031, 0x00203630, 0x000 }, + { 0x0004a093, 0x00604411, 0x68a }, + { 0x00000032, 0x00203630, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x68a }, + { 0x00000033, 0x00203630, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68a }, + { 0x00000034, 0x00203630, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68a }, + { 0x00000035, 0x00203630, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68a }, + { 0x00000036, 0x00203630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x00000005, 0x00204811, 0x000 }, + { 0x0000a1f4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x88000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000001, 0x002f0230, 0x000 }, + { 0x00000000, 0x0ce00000, 0x629 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x629 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x602 }, + { 0x0000a092, 0x00204411, 0x000 }, + { 0x00000031, 0x00204a2d, 0x000 }, + { 0x0000a093, 0x00204411, 0x000 }, + { 0x00000032, 0x00204a2d, 0x000 }, + { 0x0000a2b6, 0x00204411, 0x000 }, + { 0x00000033, 0x00204a2d, 0x000 }, + { 0x0000a2ba, 0x00204411, 0x000 }, + { 0x00000034, 0x00204a2d, 0x000 }, + { 0x0000a2be, 0x00204411, 0x000 }, + { 0x00000035, 0x00204a2d, 0x000 }, + { 0x0000a2c2, 0x00204411, 0x000 }, + { 0x00000036, 0x00204a2d, 0x000 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x000001ff, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x628 }, + { 0x00000000, 0x00210221, 0x000 }, + { 0x00000000, 0x14c00000, 0x60b }, + { 0x0004a003, 0x00604411, 0x68a }, + { 0x0000a003, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x14c00000, 0x610 }, + { 0x0004a010, 0x00604411, 0x68a }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x628 }, + { 0x0004a011, 0x00604411, 0x68a }, + { 0x0000a011, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a012, 0x00604411, 0x68a }, + { 0x0000a012, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a013, 0x00604411, 0x68a }, + { 0x0000a013, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a014, 0x00604411, 0x68a }, + { 0x0000a014, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a015, 0x00604411, 0x68a }, + { 0x0000a015, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a016, 0x00604411, 0x68a }, + { 0x0000a016, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a017, 0x00604411, 0x68a }, + { 0x0000a017, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000002c, 0x0080062d, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x00000000, 0x0ee00000, 0x63a }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000002, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x638 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x00001000, 0x00200811, 0x000 }, + { 0x0000002b, 0x00203622, 0x000 }, + { 0x00000000, 0x00600000, 0x63e }, + { 0x00000000, 0x00600000, 0x5c6 }, + { 0x98000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00804811, 0x000 }, + { 0x00000000, 0xc0600000, 0x63e }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000a2a4, 0x00204411, 0x000 }, + { 0x00000022, 0x00204811, 0x000 }, + { 0x89000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00404811, 0x62a }, + { 0x97000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x8a000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00404811, 0x62a }, + { 0x00000000, 0x00600000, 0x659 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0xc0204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x09800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x68a }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x00000004, 0x00404c11, 0x653 }, + { 0x00000000, 0x00400000, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000004, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffffb, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffff7, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x01800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004217f, 0x00604411, 0x68a }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x689 }, + { 0x00000010, 0x00404c11, 0x66f }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x38c00000, 0x000 }, + { 0x0000001d, 0x00200a2d, 0x000 }, + { 0x0000001e, 0x00200e2d, 0x000 }, + { 0x0000001f, 0x0020122d, 0x000 }, + { 0x00000020, 0x0020162d, 0x000 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000004, 0x00301224, 0x000 }, + { 0x00000000, 0x002f0064, 0x000 }, + { 0x00000000, 0x0cc00000, 0x688 }, + { 0x00000003, 0x00281a22, 0x000 }, + { 0x00000008, 0x00221222, 0x000 }, + { 0xfffff000, 0x00281224, 0x000 }, + { 0x00000000, 0x002910c4, 0x000 }, + { 0x0000001f, 0x00403624, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x68a }, + { 0x9f000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x68d }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x68f }, + { 0x9e000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x692 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0xc0204411, 0x000 }, + { 0x00000021, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000024, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000022, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000023, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x014204ff, 0x05bd0250, 0x000 }, + { 0x01c30168, 0x043f05bd, 0x000 }, + { 0x02250209, 0x02500151, 0x000 }, + { 0x02230245, 0x02a00241, 0x000 }, + { 0x03d705bd, 0x05bd05bd, 0x000 }, + { 0x06460647, 0x031f05bd, 0x000 }, + { 0x05bd05c2, 0x03200340, 0x000 }, + { 0x032a0282, 0x03420334, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd054e, 0x05bd05bd, 0x000 }, + { 0x03ba05bd, 0x04b80344, 0x000 }, + { 0x0497044d, 0x043d05bd, 0x000 }, + { 0x04cd05bd, 0x044104da, 0x000 }, + { 0x044d0504, 0x03510375, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x063c05c4, 0x000 }, + { 0x05bd05bd, 0x000705bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x03f803ed, 0x04080406, 0x000 }, + { 0x040e040a, 0x040c0410, 0x000 }, + { 0x041c0418, 0x04240420, 0x000 }, + { 0x042c0428, 0x04340430, 0x000 }, + { 0x05bd05bd, 0x043805bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x00020676, 0x06940006, 0x000 }, +}; + +static const u32 RV630_pfp_microcode[]={ +0xca0400, +0xa00000, +0x7e828b, +0x7c038b, +0x8001b8, +0x7c038b, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xc41838, +0xca2400, +0xca2800, +0x9581a8, +0xc41c3a, +0xc3c000, +0xca0800, +0xca0c00, +0x7c744b, +0xc20005, +0x99c000, +0xc41c3a, +0x7c744c, +0xc0fff0, +0x042c04, +0x309002, +0x7d2500, +0x351402, +0x7d350b, +0x255403, +0x7cd580, +0x259c03, +0x95c004, +0xd5001b, +0x7eddc1, +0x7d9d80, +0xd6801b, +0xd5801b, +0xd4401e, +0xd5401e, +0xd6401e, +0xd6801e, +0xd4801e, +0xd4c01e, +0x9783d3, +0xd5c01e, +0xca0800, +0x80001a, +0xca0c00, +0xe4011e, +0xd4001e, +0x80000c, +0xc41838, +0xe4013e, +0xd4001e, +0x80000c, +0xc41838, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca1800, +0xd4401e, +0xd5801e, +0x800053, +0xd40075, +0xd4401e, +0xca0800, +0xca0c00, +0xca1000, +0xd48019, +0xd4c018, +0xd50017, +0xd4801e, +0xd4c01e, +0xd5001e, +0xe2001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0xd48060, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xd48061, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xca0c00, +0xd4401e, +0xd48016, +0xd4c016, +0xd4801e, +0x8001b8, +0xd4c01e, +0xc60843, +0xca0c00, +0xca1000, +0x948004, +0xca1400, +0xe420f3, +0xd42013, +0xd56065, +0xd4e01c, +0xd5201c, +0xd5601c, +0x800000, +0x062001, +0xc60843, +0xca0c00, +0xca1000, +0x9483f7, +0xca1400, +0xe420f3, +0x800079, +0xd42013, +0xc60843, +0xca0c00, +0xca1000, +0x9883ef, +0xca1400, +0xd40064, +0x80008d, +0x000000, +0xc41432, +0xc61843, +0xc4082f, +0x954005, +0xc40c30, +0xd4401e, +0x800000, +0xee001e, +0x9583f5, +0xc41031, +0xd44033, +0xd52065, +0xd4a01c, +0xd4e01c, +0xd5201c, +0xe4015e, +0xd4001e, +0x800000, +0x062001, +0xca1800, +0x0a2001, +0xd60076, +0xc40836, +0x988007, +0xc61045, +0x950110, +0xd4001f, +0xd46062, +0x800000, +0xd42062, +0xcc3835, +0xcc1433, +0x8401bb, +0xd40072, +0xd5401e, +0x800000, +0xee001e, +0xe2001a, +0x8401bb, +0xe2001a, +0xcc104b, +0xcc0447, +0x2c9401, +0x7d098b, +0x984005, +0x7d15cb, +0xd4001a, +0x8001b8, +0xd4006d, +0x344401, +0xcc0c48, +0x98403a, +0xcc2c4a, +0x958004, +0xcc0449, +0x8001b8, +0xd4001a, +0xd4c01a, +0x282801, +0x8400f0, +0xcc1003, +0x98801b, +0x04380c, +0x8400f0, +0xcc1003, +0x988017, +0x043808, +0x8400f0, +0xcc1003, +0x988013, +0x043804, +0x8400f0, +0xcc1003, +0x988014, +0xcc104c, +0x9a8009, +0xcc144d, +0x9840dc, +0xd4006d, +0xcc1848, +0xd5001a, +0xd5401a, +0x8000c9, +0xd5801a, +0x96c0d5, +0xd4006d, +0x8001b8, +0xd4006e, +0x9ac003, +0xd4006d, +0xd4006e, +0x800000, +0xec007f, +0x9ac0cc, +0xd4006d, +0x8001b8, +0xd4006e, +0xcc1403, +0xcc1803, +0xcc1c03, +0x7d9103, +0x7dd583, +0x7d190c, +0x35cc1f, +0x35701f, +0x7cf0cb, +0x7cd08b, +0x880000, +0x7e8e8b, +0x95c004, +0xd4006e, +0x8001b8, +0xd4001a, +0xd4c01a, +0xcc0803, +0xcc0c03, +0xcc1003, +0xcc1403, +0xcc1803, +0xcc1c03, +0xcc2403, +0xcc2803, +0x35c41f, +0x36b01f, +0x7c704b, +0x34f01f, +0x7c704b, +0x35701f, +0x7c704b, +0x7d8881, +0x7dccc1, +0x7e5101, +0x7e9541, +0x7c9082, +0x7cd4c2, +0x7c848b, +0x9ac003, +0x7c8c8b, +0x2c8801, +0x98809e, +0xd4006d, +0x98409c, +0xd4006e, +0xcc084c, +0xcc0c4d, +0xcc1048, +0xd4801a, +0xd4c01a, +0x800101, +0xd5001a, +0xcc0832, +0xd40032, +0x9482d9, +0xca0c00, +0xd4401e, +0x800000, +0xd4001e, +0xe4011e, +0xd4001e, +0xca0800, +0xca0c00, +0xca1000, +0xd4401e, +0xca1400, +0xd4801e, +0xd4c01e, +0xd5001e, +0xd5401e, +0xd54034, +0x800000, +0xee001e, +0x280404, +0xe2001a, +0xe2001a, +0xd4401a, +0xca3800, +0xcc0803, +0xcc0c03, +0xcc0c03, +0xcc0c03, +0x9882bd, +0x000000, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0400, +0xc2ff00, +0xcc0834, +0xc13fff, +0x7c74cb, +0x7cc90b, +0x7d010f, +0x9902b0, +0x7c738b, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0800, +0x281900, +0x7d898b, +0x958014, +0x281404, +0xca0c00, +0xca1000, +0xca1c00, +0xca2400, +0xe2001f, +0xd4c01a, +0xd5001a, +0xd5401a, +0xcc1803, +0xcc2c03, +0xcc2c03, +0xcc2c03, +0x7da58b, +0x7d9c47, +0x984297, +0x000000, +0x800161, +0xd4c01a, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0x248c06, +0x0ccc06, +0x98c006, +0xcc104e, +0x990004, +0xd40073, +0xe4011e, +0xd4001e, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xca0800, +0xca0c00, +0x34d018, +0x251001, +0x950021, +0xc17fff, +0xca1000, +0xca1400, +0xca1800, +0xd4801d, +0xd4c01d, +0x7db18b, +0xc14202, +0xc2c001, +0xd5801d, +0x34dc0e, +0x7d5d4c, +0x7f734c, +0xd7401e, +0xd5001e, +0xd5401e, +0xc14200, +0xc2c000, +0x099c01, +0x31dc10, +0x7f5f4c, +0x7f734c, +0x042802, +0x7d8380, +0xd5a86f, +0xd58066, +0xd7401e, +0xec005e, +0xc82402, +0xc82402, +0x8001b8, +0xd60076, +0xd4401e, +0xd4801e, +0xd4c01e, +0x800000, +0xee001e, +0x800000, +0xee001f, +0xd4001f, +0x800000, +0xd4001f, +0xd4001f, +0x880000, +0xd4001f, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x010171, +0x020178, +0x03008f, +0x04007f, +0x050003, +0x06003f, +0x070032, +0x08012c, +0x090046, +0x0a0036, +0x1001b6, +0x1700a2, +0x22013a, +0x230149, +0x2000b4, +0x240125, +0x27004d, +0x28006a, +0x2a0060, +0x2b0052, +0x2f0065, +0x320087, +0x34017f, +0x3c0156, +0x3f0072, +0x41018c, +0x44012e, +0x550173, +0x56017a, +0x60000b, +0x610034, +0x620038, +0x630038, +0x640038, +0x650038, +0x660038, +0x670038, +0x68003a, +0x690041, +0x6a0048, +0x6b0048, +0x6c0048, +0x6d0048, +0x6e0048, +0x6f0048, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +}; + +static const u32 RV635_cp_microcode[][3]={ + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x0000ffff, 0x00284621, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x00000000, 0x00e00000, 0x000 }, + { 0x00010000, 0xc0294620, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x00000000, 0x00600000, 0x62e }, + { 0x00000000, 0x00600000, 0x642 }, + { 0x00000000, 0xc0200800, 0x000 }, + { 0x00000f00, 0x00281622, 0x000 }, + { 0x00000008, 0x00211625, 0x000 }, + { 0x00000018, 0x00203625, 0x000 }, + { 0x8d000000, 0x00204411, 0x000 }, + { 0x00000004, 0x002f0225, 0x000 }, + { 0x00000000, 0x0ce00000, 0x018 }, + { 0x00412000, 0x00404811, 0x019 }, + { 0x00422000, 0x00204811, 0x000 }, + { 0x8e000000, 0x00204411, 0x000 }, + { 0x00000028, 0x00204a2d, 0x000 }, + { 0x90000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x0000000c, 0x00211622, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000019, 0x00211a22, 0x000 }, + { 0x00000004, 0x00281a26, 0x000 }, + { 0x00000000, 0x002914c5, 0x000 }, + { 0x00000019, 0x00203625, 0x000 }, + { 0x00000000, 0x003a1402, 0x000 }, + { 0x00000016, 0x00211625, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0xfffffffc, 0x00280e23, 0x000 }, + { 0x00000000, 0x002914a3, 0x000 }, + { 0x00000017, 0x00203625, 0x000 }, + { 0x00008000, 0x00280e22, 0x000 }, + { 0x00000007, 0x00220e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x20000000, 0x00280e22, 0x000 }, + { 0x00000006, 0x00210e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x00000000, 0x00220222, 0x000 }, + { 0x00000000, 0x14e00000, 0x038 }, + { 0x00000000, 0x2ee00000, 0x035 }, + { 0x00000000, 0x2ce00000, 0x037 }, + { 0x00000000, 0x00400e2d, 0x039 }, + { 0x00000008, 0x00200e2d, 0x000 }, + { 0x00000009, 0x0040122d, 0x046 }, + { 0x00000001, 0x00400e2d, 0x039 }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x03e }, + { 0x00000008, 0x00401c11, 0x041 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x0000000f, 0x00281e27, 0x000 }, + { 0x00000003, 0x00221e27, 0x000 }, + { 0x7fc00000, 0x00281a23, 0x000 }, + { 0x00000014, 0x00211a26, 0x000 }, + { 0x00000001, 0x00331a26, 0x000 }, + { 0x00000008, 0x00221a26, 0x000 }, + { 0x00000000, 0x00290cc7, 0x000 }, + { 0x00000027, 0x00203624, 0x000 }, + { 0x00007f00, 0x00281221, 0x000 }, + { 0x00001400, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x04b }, + { 0x00000001, 0x00290e23, 0x000 }, + { 0x0000000e, 0x00203623, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfff80000, 0x00294a23, 0x000 }, + { 0x00000000, 0x003a2c02, 0x000 }, + { 0x00000002, 0x00220e2b, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x0000000f, 0x00203623, 0x000 }, + { 0x00001fff, 0x00294a23, 0x000 }, + { 0x00000027, 0x00204a2d, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000029, 0x00200e2d, 0x000 }, + { 0x060a0200, 0x00294a23, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00210222, 0x000 }, + { 0x00000000, 0x14e00000, 0x061 }, + { 0x00000000, 0x2ee00000, 0x05f }, + { 0x00000000, 0x2ce00000, 0x05e }, + { 0x00000000, 0x00400e2d, 0x062 }, + { 0x00000001, 0x00400e2d, 0x062 }, + { 0x0000000a, 0x00200e2d, 0x000 }, + { 0x0000000b, 0x0040122d, 0x06a }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x7fc00000, 0x00281623, 0x000 }, + { 0x00000014, 0x00211625, 0x000 }, + { 0x00000001, 0x00331625, 0x000 }, + { 0x80000000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00290ca3, 0x000 }, + { 0x3ffffc00, 0x00290e23, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x06d }, + { 0x00000100, 0x00401c11, 0x070 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x000000f0, 0x00281e27, 0x000 }, + { 0x00000004, 0x00221e27, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0xfffff0ff, 0x00281a30, 0x000 }, + { 0x0000a028, 0x00204411, 0x000 }, + { 0x00000000, 0x002948e6, 0x000 }, + { 0x0000a018, 0x00204411, 0x000 }, + { 0x3fffffff, 0x00284a23, 0x000 }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000030, 0x0020162d, 0x000 }, + { 0x00000002, 0x00291625, 0x000 }, + { 0x00000030, 0x00203625, 0x000 }, + { 0x00000025, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a3, 0x000 }, + { 0x00000000, 0x0cc00000, 0x083 }, + { 0x00000026, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a4, 0x000 }, + { 0x00000000, 0x0cc00000, 0x084 }, + { 0x00000000, 0x00400000, 0x08a }, + { 0x00000025, 0x00203623, 0x000 }, + { 0x00000026, 0x00203624, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000002, 0x00210227, 0x000 }, + { 0x00000000, 0x14e00000, 0x08a }, + { 0x00000000, 0x00600000, 0x665 }, + { 0x00000000, 0x00600000, 0x659 }, + { 0x00000002, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x08d }, + { 0x00000012, 0xc0403620, 0x093 }, + { 0x00000000, 0x2ee00000, 0x091 }, + { 0x00000000, 0x2ce00000, 0x090 }, + { 0x00000002, 0x00400e2d, 0x092 }, + { 0x00000003, 0x00400e2d, 0x092 }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000012, 0x00203623, 0x000 }, + { 0x00000003, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x098 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x0a0 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x2ee00000, 0x09e }, + { 0x00000000, 0x2ce00000, 0x09d }, + { 0x00000002, 0x00400e2d, 0x09f }, + { 0x00000003, 0x00400e2d, 0x09f }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000000, 0x00204803, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x003f0000, 0x00280e23, 0x000 }, + { 0x00000010, 0x00210e23, 0x000 }, + { 0x00000011, 0x00203623, 0x000 }, + { 0x0000001e, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a7 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x0000001f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0aa }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000008, 0x00210e2b, 0x000 }, + { 0x0000007f, 0x00280e23, 0x000 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0e1 }, + { 0x00000000, 0x27000000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ae00000, 0x0b3 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x0000000c, 0x00221e30, 0x000 }, + { 0x99800000, 0x00204411, 0x000 }, + { 0x00000004, 0x0020122d, 0x000 }, + { 0x00000008, 0x00221224, 0x000 }, + { 0x00000010, 0x00201811, 0x000 }, + { 0x00000000, 0x00291ce4, 0x000 }, + { 0x00000000, 0x00604807, 0x12f }, + { 0x9b000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x9c000000, 0x00204411, 0x000 }, + { 0x00000000, 0x0033146f, 0x000 }, + { 0x00000001, 0x00333e23, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0x00203c05, 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0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0x00000000, 0x14c00000, 0x1b9 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x39000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00804802, 0x000 }, + { 0x00000018, 0x00202e2d, 0x000 }, + { 0x00000000, 0x003b0d63, 0x000 }, + { 0x00000008, 0x00224a23, 0x000 }, + { 0x00000010, 0x00224a23, 0x000 }, + { 0x00000018, 0x00224a23, 0x000 }, + { 0x00000000, 0x00804803, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00000007, 0x0021062f, 0x000 }, + { 0x00000013, 0x00200a2d, 0x000 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000ffff, 0x40282220, 0x000 }, + { 0x0000000f, 0x00262228, 0x000 }, + { 0x00000010, 0x40212620, 0x000 }, + { 0x0000000f, 0x00262629, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 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0x000 }, + { 0xefffffff, 0x00283a2e, 0x000 }, + { 0x00000000, 0x004938ce, 0x678 }, + { 0x00000001, 0x40280a20, 0x000 }, + { 0x00000006, 0x40280e20, 0x000 }, + { 0x00000300, 0xc0281220, 0x000 }, + { 0x00000008, 0x00211224, 0x000 }, + { 0x00000000, 0xc0201620, 0x000 }, + { 0x00000000, 0xc0201a20, 0x000 }, + { 0x00000000, 0x00210222, 0x000 }, + { 0x00000000, 0x14c00000, 0x563 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00002258, 0x00300a24, 0x000 }, + { 0x00040000, 0x00694622, 0x68a }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00020000, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x56b }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x579 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x56b }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00002258, 0x00300a24, 0x000 }, + { 0x00040000, 0x00694622, 0x68a }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x579 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x56f }, + { 0x00000000, 0xc0201c00, 0x000 }, + { 0x00000000, 0xc0400000, 0x579 }, + { 0x00000004, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x577 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000216d, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0604800, 0x68f }, + { 0x00000000, 0x00401c10, 0x579 }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00000000, 0xc0400000, 0x000 }, + { 0x00000000, 0x0ee00000, 0x57b }, + { 0x00000000, 0x00600000, 0x5c6 }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x58c }, + { 0x0000a2b7, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c4, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x58a }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000001, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x59d }, + { 0x0000a2bb, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c5, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x59b }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000002, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5ae }, + { 0x0000a2bf, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c6, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5ac }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x0000a2c3, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c7, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5bb }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x85000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x0000304a, 0x00204411, 0x000 }, + { 0x01000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00400000, 0x5c1 }, + { 0xa4000000, 0xc0204411, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0xc0600000, 0x5c6 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000002c, 0x00203621, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0230, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5cd }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000030, 0x00403621, 0x5e0 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x5e0 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a092, 0x00604411, 0x68a }, + { 0x00000031, 0x00203630, 0x000 }, + { 0x0004a093, 0x00604411, 0x68a }, + { 0x00000032, 0x00203630, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x68a }, + { 0x00000033, 0x00203630, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68a }, + { 0x00000034, 0x00203630, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68a }, + { 0x00000035, 0x00203630, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68a }, + { 0x00000036, 0x00203630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x00000005, 0x00204811, 0x000 }, + { 0x0000a1f4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x88000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000001, 0x002f0230, 0x000 }, + { 0x00000000, 0x0ce00000, 0x629 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x629 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x602 }, + { 0x0000a092, 0x00204411, 0x000 }, + { 0x00000031, 0x00204a2d, 0x000 }, + { 0x0000a093, 0x00204411, 0x000 }, + { 0x00000032, 0x00204a2d, 0x000 }, + { 0x0000a2b6, 0x00204411, 0x000 }, + { 0x00000033, 0x00204a2d, 0x000 }, + { 0x0000a2ba, 0x00204411, 0x000 }, + { 0x00000034, 0x00204a2d, 0x000 }, + { 0x0000a2be, 0x00204411, 0x000 }, + { 0x00000035, 0x00204a2d, 0x000 }, + { 0x0000a2c2, 0x00204411, 0x000 }, + { 0x00000036, 0x00204a2d, 0x000 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x000001ff, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x628 }, + { 0x00000000, 0x00210221, 0x000 }, + { 0x00000000, 0x14c00000, 0x60b }, + { 0x0004a003, 0x00604411, 0x68a }, + { 0x0000a003, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x14c00000, 0x610 }, + { 0x0004a010, 0x00604411, 0x68a }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x628 }, + { 0x0004a011, 0x00604411, 0x68a }, + { 0x0000a011, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a012, 0x00604411, 0x68a }, + { 0x0000a012, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a013, 0x00604411, 0x68a }, + { 0x0000a013, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a014, 0x00604411, 0x68a }, + { 0x0000a014, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a015, 0x00604411, 0x68a }, + { 0x0000a015, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a016, 0x00604411, 0x68a }, + { 0x0000a016, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a017, 0x00604411, 0x68a }, + { 0x0000a017, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000002c, 0x0080062d, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x00000000, 0x0ee00000, 0x63a }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000002, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x638 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x00001000, 0x00200811, 0x000 }, + { 0x0000002b, 0x00203622, 0x000 }, + { 0x00000000, 0x00600000, 0x63e }, + { 0x00000000, 0x00600000, 0x5c6 }, + { 0x98000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00804811, 0x000 }, + { 0x00000000, 0xc0600000, 0x63e }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000a2a4, 0x00204411, 0x000 }, + { 0x00000022, 0x00204811, 0x000 }, + { 0x89000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00404811, 0x62a }, + { 0x97000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x8a000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00404811, 0x62a }, + { 0x00000000, 0x00600000, 0x659 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0xc0204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x09800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x68a }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x00000004, 0x00404c11, 0x653 }, + { 0x00000000, 0x00400000, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000004, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffffb, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffff7, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x01800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004217f, 0x00604411, 0x68a }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x689 }, + { 0x00000010, 0x00404c11, 0x66f }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x38c00000, 0x000 }, + { 0x0000001d, 0x00200a2d, 0x000 }, + { 0x0000001e, 0x00200e2d, 0x000 }, + { 0x0000001f, 0x0020122d, 0x000 }, + { 0x00000020, 0x0020162d, 0x000 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000004, 0x00301224, 0x000 }, + { 0x00000000, 0x002f0064, 0x000 }, + { 0x00000000, 0x0cc00000, 0x688 }, + { 0x00000003, 0x00281a22, 0x000 }, + { 0x00000008, 0x00221222, 0x000 }, + { 0xfffff000, 0x00281224, 0x000 }, + { 0x00000000, 0x002910c4, 0x000 }, + { 0x0000001f, 0x00403624, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x68a }, + { 0x9f000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x68d }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x68f }, + { 0x9e000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x692 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0xc0204411, 0x000 }, + { 0x00000021, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000024, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000022, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000023, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x014204ff, 0x05bd0250, 0x000 }, + { 0x01c30168, 0x043f05bd, 0x000 }, + { 0x02250209, 0x02500151, 0x000 }, + { 0x02230245, 0x02a00241, 0x000 }, + { 0x03d705bd, 0x05bd05bd, 0x000 }, + { 0x06460647, 0x031f05bd, 0x000 }, + { 0x05bd05c2, 0x03200340, 0x000 }, + { 0x032a0282, 0x03420334, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd054e, 0x05bd05bd, 0x000 }, + { 0x03ba05bd, 0x04b80344, 0x000 }, + { 0x0497044d, 0x043d05bd, 0x000 }, + { 0x04cd05bd, 0x044104da, 0x000 }, + { 0x044d0504, 0x03510375, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x063c05c4, 0x000 }, + { 0x05bd05bd, 0x000705bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x03f803ed, 0x04080406, 0x000 }, + { 0x040e040a, 0x040c0410, 0x000 }, + { 0x041c0418, 0x04240420, 0x000 }, + { 0x042c0428, 0x04340430, 0x000 }, + { 0x05bd05bd, 0x043805bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x00020676, 0x06940006, 0x000 }, +}; + +static const u32 RV635_pfp_microcode[]={ +0xca0400, +0xa00000, +0x7e828b, +0x7c038b, +0x8001b8, +0x7c038b, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xc41838, +0xca2400, +0xca2800, +0x9581a8, +0xc41c3a, +0xc3c000, +0xca0800, +0xca0c00, +0x7c744b, +0xc20005, +0x99c000, +0xc41c3a, +0x7c744c, +0xc0fff0, +0x042c04, +0x309002, +0x7d2500, +0x351402, +0x7d350b, +0x255403, +0x7cd580, +0x259c03, +0x95c004, +0xd5001b, +0x7eddc1, +0x7d9d80, +0xd6801b, +0xd5801b, +0xd4401e, +0xd5401e, +0xd6401e, +0xd6801e, +0xd4801e, +0xd4c01e, +0x9783d3, +0xd5c01e, +0xca0800, +0x80001a, +0xca0c00, +0xe4011e, +0xd4001e, +0x80000c, +0xc41838, +0xe4013e, +0xd4001e, +0x80000c, +0xc41838, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca1800, +0xd4401e, +0xd5801e, +0x800053, +0xd40075, +0xd4401e, +0xca0800, +0xca0c00, +0xca1000, +0xd48019, +0xd4c018, +0xd50017, +0xd4801e, +0xd4c01e, +0xd5001e, +0xe2001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0xd48060, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xd48061, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xca0c00, +0xd4401e, +0xd48016, +0xd4c016, +0xd4801e, +0x8001b8, +0xd4c01e, +0xc60843, +0xca0c00, +0xca1000, +0x948004, +0xca1400, +0xe420f3, +0xd42013, +0xd56065, +0xd4e01c, +0xd5201c, +0xd5601c, +0x800000, +0x062001, +0xc60843, +0xca0c00, +0xca1000, +0x9483f7, +0xca1400, +0xe420f3, +0x800079, +0xd42013, +0xc60843, +0xca0c00, +0xca1000, +0x9883ef, +0xca1400, +0xd40064, +0x80008d, +0x000000, +0xc41432, +0xc61843, +0xc4082f, +0x954005, +0xc40c30, +0xd4401e, +0x800000, +0xee001e, +0x9583f5, +0xc41031, +0xd44033, +0xd52065, +0xd4a01c, +0xd4e01c, +0xd5201c, +0xe4015e, +0xd4001e, +0x800000, +0x062001, +0xca1800, +0x0a2001, +0xd60076, +0xc40836, +0x988007, +0xc61045, +0x950110, +0xd4001f, +0xd46062, +0x800000, +0xd42062, +0xcc3835, +0xcc1433, +0x8401bb, +0xd40072, +0xd5401e, +0x800000, +0xee001e, +0xe2001a, +0x8401bb, +0xe2001a, +0xcc104b, +0xcc0447, +0x2c9401, +0x7d098b, +0x984005, +0x7d15cb, +0xd4001a, +0x8001b8, +0xd4006d, +0x344401, +0xcc0c48, +0x98403a, +0xcc2c4a, +0x958004, +0xcc0449, +0x8001b8, +0xd4001a, +0xd4c01a, +0x282801, +0x8400f0, +0xcc1003, +0x98801b, +0x04380c, +0x8400f0, +0xcc1003, +0x988017, +0x043808, +0x8400f0, +0xcc1003, +0x988013, +0x043804, +0x8400f0, +0xcc1003, +0x988014, +0xcc104c, +0x9a8009, +0xcc144d, +0x9840dc, +0xd4006d, +0xcc1848, +0xd5001a, +0xd5401a, +0x8000c9, +0xd5801a, +0x96c0d5, +0xd4006d, +0x8001b8, +0xd4006e, +0x9ac003, +0xd4006d, +0xd4006e, +0x800000, +0xec007f, +0x9ac0cc, +0xd4006d, +0x8001b8, +0xd4006e, +0xcc1403, +0xcc1803, +0xcc1c03, +0x7d9103, +0x7dd583, +0x7d190c, +0x35cc1f, +0x35701f, +0x7cf0cb, +0x7cd08b, +0x880000, +0x7e8e8b, +0x95c004, +0xd4006e, +0x8001b8, +0xd4001a, +0xd4c01a, +0xcc0803, +0xcc0c03, +0xcc1003, +0xcc1403, +0xcc1803, +0xcc1c03, +0xcc2403, +0xcc2803, +0x35c41f, +0x36b01f, +0x7c704b, +0x34f01f, +0x7c704b, +0x35701f, +0x7c704b, +0x7d8881, +0x7dccc1, +0x7e5101, +0x7e9541, +0x7c9082, +0x7cd4c2, +0x7c848b, +0x9ac003, +0x7c8c8b, +0x2c8801, +0x98809e, +0xd4006d, +0x98409c, +0xd4006e, +0xcc084c, +0xcc0c4d, +0xcc1048, +0xd4801a, +0xd4c01a, +0x800101, +0xd5001a, +0xcc0832, +0xd40032, +0x9482d9, +0xca0c00, +0xd4401e, +0x800000, +0xd4001e, +0xe4011e, +0xd4001e, +0xca0800, +0xca0c00, +0xca1000, +0xd4401e, +0xca1400, +0xd4801e, +0xd4c01e, +0xd5001e, +0xd5401e, +0xd54034, +0x800000, +0xee001e, +0x280404, +0xe2001a, +0xe2001a, +0xd4401a, +0xca3800, +0xcc0803, +0xcc0c03, +0xcc0c03, +0xcc0c03, +0x9882bd, +0x000000, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0400, +0xc2ff00, +0xcc0834, +0xc13fff, +0x7c74cb, +0x7cc90b, +0x7d010f, +0x9902b0, +0x7c738b, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0800, +0x281900, +0x7d898b, +0x958014, +0x281404, +0xca0c00, +0xca1000, +0xca1c00, +0xca2400, +0xe2001f, +0xd4c01a, +0xd5001a, +0xd5401a, +0xcc1803, +0xcc2c03, +0xcc2c03, +0xcc2c03, +0x7da58b, +0x7d9c47, +0x984297, +0x000000, +0x800161, +0xd4c01a, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0x248c06, +0x0ccc06, +0x98c006, +0xcc104e, +0x990004, +0xd40073, +0xe4011e, +0xd4001e, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xca0800, +0xca0c00, +0x34d018, +0x251001, +0x950021, +0xc17fff, +0xca1000, +0xca1400, +0xca1800, +0xd4801d, +0xd4c01d, +0x7db18b, +0xc14202, +0xc2c001, +0xd5801d, +0x34dc0e, +0x7d5d4c, +0x7f734c, +0xd7401e, +0xd5001e, +0xd5401e, +0xc14200, +0xc2c000, +0x099c01, +0x31dc10, +0x7f5f4c, +0x7f734c, +0x042802, +0x7d8380, +0xd5a86f, +0xd58066, +0xd7401e, +0xec005e, +0xc82402, +0xc82402, +0x8001b8, +0xd60076, +0xd4401e, +0xd4801e, +0xd4c01e, +0x800000, +0xee001e, +0x800000, +0xee001f, +0xd4001f, +0x800000, +0xd4001f, +0xd4001f, +0x880000, +0xd4001f, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x010171, +0x020178, +0x03008f, +0x04007f, +0x050003, +0x06003f, +0x070032, +0x08012c, +0x090046, +0x0a0036, +0x1001b6, +0x1700a2, +0x22013a, +0x230149, +0x2000b4, +0x240125, +0x27004d, +0x28006a, +0x2a0060, +0x2b0052, +0x2f0065, +0x320087, +0x34017f, +0x3c0156, +0x3f0072, +0x41018c, +0x44012e, +0x550173, +0x56017a, +0x60000b, +0x610034, +0x620038, +0x630038, +0x640038, +0x650038, +0x660038, +0x670038, +0x68003a, +0x690041, +0x6a0048, +0x6b0048, +0x6c0048, +0x6d0048, +0x6e0048, +0x6f0048, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +}; + +static const u32 RV670_cp_microcode[][3]={ + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x0000ffff, 0x00284621, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x00000000, 0x00e00000, 0x000 }, + { 0x00010000, 0xc0294620, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x00000000, 0x00600000, 0x624 }, + { 0x00000000, 0x00600000, 0x638 }, + { 0x00000000, 0xc0200800, 0x000 }, + { 0x00000f00, 0x00281622, 0x000 }, + { 0x00000008, 0x00211625, 0x000 }, + { 0x00000018, 0x00203625, 0x000 }, + { 0x8d000000, 0x00204411, 0x000 }, + { 0x00000004, 0x002f0225, 0x000 }, + { 0x00000000, 0x0ce00000, 0x018 }, + { 0x00412000, 0x00404811, 0x019 }, + { 0x00422000, 0x00204811, 0x000 }, + { 0x8e000000, 0x00204411, 0x000 }, + { 0x00000028, 0x00204a2d, 0x000 }, + { 0x90000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x0000000c, 0x00211622, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000019, 0x00211a22, 0x000 }, + { 0x00000004, 0x00281a26, 0x000 }, + { 0x00000000, 0x002914c5, 0x000 }, + { 0x00000019, 0x00203625, 0x000 }, + { 0x00000000, 0x003a1402, 0x000 }, + { 0x00000016, 0x00211625, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0xfffffffc, 0x00280e23, 0x000 }, + { 0x00000000, 0x002914a3, 0x000 }, + { 0x00000017, 0x00203625, 0x000 }, + { 0x00008000, 0x00280e22, 0x000 }, + { 0x00000007, 0x00220e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x20000000, 0x00280e22, 0x000 }, + { 0x00000006, 0x00210e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x00000000, 0x00220222, 0x000 }, + { 0x00000000, 0x14e00000, 0x038 }, + { 0x00000000, 0x2ee00000, 0x035 }, + { 0x00000000, 0x2ce00000, 0x037 }, + { 0x00000000, 0x00400e2d, 0x039 }, + { 0x00000008, 0x00200e2d, 0x000 }, + { 0x00000009, 0x0040122d, 0x046 }, + { 0x00000001, 0x00400e2d, 0x039 }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x03e }, + { 0x00000008, 0x00401c11, 0x041 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x0000000f, 0x00281e27, 0x000 }, + { 0x00000003, 0x00221e27, 0x000 }, + { 0x7fc00000, 0x00281a23, 0x000 }, + { 0x00000014, 0x00211a26, 0x000 }, + { 0x00000001, 0x00331a26, 0x000 }, + { 0x00000008, 0x00221a26, 0x000 }, + { 0x00000000, 0x00290cc7, 0x000 }, + { 0x00000027, 0x00203624, 0x000 }, + { 0x00007f00, 0x00281221, 0x000 }, + { 0x00001400, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x04b }, + { 0x00000001, 0x00290e23, 0x000 }, + { 0x0000000e, 0x00203623, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfff80000, 0x00294a23, 0x000 }, + { 0x00000000, 0x003a2c02, 0x000 }, + { 0x00000002, 0x00220e2b, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x0000000f, 0x00203623, 0x000 }, + { 0x00001fff, 0x00294a23, 0x000 }, + { 0x00000027, 0x00204a2d, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000029, 0x00200e2d, 0x000 }, + { 0x060a0200, 0x00294a23, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00210222, 0x000 }, + { 0x00000000, 0x14e00000, 0x061 }, + { 0x00000000, 0x2ee00000, 0x05f }, + { 0x00000000, 0x2ce00000, 0x05e }, + { 0x00000000, 0x00400e2d, 0x062 }, + { 0x00000001, 0x00400e2d, 0x062 }, + { 0x0000000a, 0x00200e2d, 0x000 }, + { 0x0000000b, 0x0040122d, 0x06a }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x7fc00000, 0x00281623, 0x000 }, + { 0x00000014, 0x00211625, 0x000 }, + { 0x00000001, 0x00331625, 0x000 }, + { 0x80000000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00290ca3, 0x000 }, + { 0x3ffffc00, 0x00290e23, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x06d }, + { 0x00000100, 0x00401c11, 0x070 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x000000f0, 0x00281e27, 0x000 }, + { 0x00000004, 0x00221e27, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0xfffff0ff, 0x00281a30, 0x000 }, + { 0x0000a028, 0x00204411, 0x000 }, + { 0x00000000, 0x002948e6, 0x000 }, + { 0x0000a018, 0x00204411, 0x000 }, + { 0x3fffffff, 0x00284a23, 0x000 }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000030, 0x0020162d, 0x000 }, + { 0x00000002, 0x00291625, 0x000 }, + { 0x00000030, 0x00203625, 0x000 }, + { 0x00000025, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a3, 0x000 }, + { 0x00000000, 0x0cc00000, 0x083 }, + { 0x00000026, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a4, 0x000 }, + { 0x00000000, 0x0cc00000, 0x084 }, + { 0x00000000, 0x00400000, 0x08a }, + { 0x00000025, 0x00203623, 0x000 }, + { 0x00000026, 0x00203624, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000002, 0x00210227, 0x000 }, + { 0x00000000, 0x14e00000, 0x08a }, + { 0x00000000, 0x00600000, 0x659 }, + { 0x00000000, 0x00600000, 0x64d }, + { 0x00000002, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x08d }, + { 0x00000012, 0xc0403620, 0x093 }, + { 0x00000000, 0x2ee00000, 0x091 }, + { 0x00000000, 0x2ce00000, 0x090 }, + { 0x00000002, 0x00400e2d, 0x092 }, + { 0x00000003, 0x00400e2d, 0x092 }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000012, 0x00203623, 0x000 }, + { 0x00000003, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x098 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x0a0 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x2ee00000, 0x09e }, + { 0x00000000, 0x2ce00000, 0x09d }, + { 0x00000002, 0x00400e2d, 0x09f }, + { 0x00000003, 0x00400e2d, 0x09f }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000000, 0x00204803, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x003f0000, 0x00280e23, 0x000 }, + { 0x00000010, 0x00210e23, 0x000 }, + { 0x00000011, 0x00203623, 0x000 }, + { 0x0000001e, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a7 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x0000001f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0aa }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000008, 0x00210e2b, 0x000 }, + { 0x0000007f, 0x00280e23, 0x000 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0e1 }, + { 0x00000000, 0x27000000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ae00000, 0x0b3 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x0000000c, 0x00221e30, 0x000 }, + { 0x99800000, 0x00204411, 0x000 }, + { 0x00000004, 0x0020122d, 0x000 }, + { 0x00000008, 0x00221224, 0x000 }, + { 0x00000010, 0x00201811, 0x000 }, + { 0x00000000, 0x00291ce4, 0x000 }, + { 0x00000000, 0x00604807, 0x12f }, + { 0x9b000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x9c000000, 0x00204411, 0x000 }, + { 0x00000000, 0x0033146f, 0x000 }, + { 0x00000001, 0x00333e23, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0x00203c05, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000e, 0x00204811, 0x000 }, + { 0x00000000, 0x00201010, 0x000 }, + { 0x0000e007, 0x00204411, 0x000 }, + { 0x0000000f, 0x0021022b, 0x000 }, + { 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0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x67c }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x67b }, + { 0x00000004, 0x00404c11, 0x135 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x000021f8, 0x00204411, 0x000 }, + { 0x0000001c, 0x00204811, 0x000 }, + { 0x000421f9, 0x00604411, 0x67c }, + { 0x00000011, 0x00210230, 0x000 }, + { 0x00000000, 0x14e00000, 0x13c }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00000000, 0x00600000, 0x160 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40280620, 0x000 }, + { 0x00000010, 0xc0210a20, 0x000 }, + { 0x00000000, 0x00341461, 0x000 }, + { 0x00000000, 0x00741882, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x147 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x160 }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x0000ffff, 0xc0281220, 0x000 }, + { 0x00000010, 0x40211620, 0x000 }, + { 0x0000ffff, 0xc0681a20, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x158 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000001, 0x00300a2f, 0x000 }, + { 0x00000001, 0x00210a22, 0x000 }, + { 0x00000003, 0x00384a22, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600000, 0x18f }, + { 0x00000000, 0x00600000, 0x1a0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00202c08, 0x000 }, + { 0x00000000, 0x00202411, 0x000 }, + { 0x00000000, 0x00202811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x93800000, 0x00204411, 0x000 }, + { 0x00000002, 0x00221e29, 0x000 }, + { 0x00000000, 0x007048eb, 0x19c }, + { 0x00000000, 0x00600000, 0x2bb }, + { 0x00000001, 0x40330620, 0x000 }, + { 0x00000000, 0xc0302409, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ae00000, 0x181 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x00000000, 0x00400000, 0x186 }, + { 0x95000000, 0x00204411, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x186 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000001, 0x00530621, 0x182 }, + { 0x92000000, 0x00204411, 0x000 }, + { 0x00000000, 0xc0604800, 0x197 }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000011, 0x0020062d, 0x000 }, + { 0x00000000, 0x0078042a, 0x2fb }, + { 0x00000000, 0x00202809, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x174 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000210, 0x00600411, 0x315 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x194 }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x3f800000, 0x00200411, 0x000 }, + { 0x46000000, 0x00600811, 0x1b2 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x19b }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000021, 0x00804811, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40281620, 0x000 }, + { 0x00000010, 0xc0811a20, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000008, 0x00221e30, 0x000 }, + { 0x00000029, 0x00201a2d, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfffbff09, 0x00204811, 0x000 }, + { 0x0000000f, 0x0020222d, 0x000 }, + { 0x00001fff, 0x00294a28, 0x000 }, + { 0x00000006, 0x0020222d, 0x000 }, + { 0x00000000, 0x002920e8, 0x000 }, + { 0x00000000, 0x00204808, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000100, 0x00201811, 0x000 }, + { 0x00000008, 0x00621e28, 0x12f }, + { 0x00000008, 0x00822228, 0x000 }, + { 0x0002c000, 0x00204411, 0x000 }, + { 0x00000015, 0x00600e2d, 0x1bd }, + { 0x00000016, 0x00600e2d, 0x1bd }, + { 0x0000c008, 0x00204411, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0x00000000, 0x14c00000, 0x1b9 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x39000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00804802, 0x000 }, + { 0x00000018, 0x00202e2d, 0x000 }, + { 0x00000000, 0x003b0d63, 0x000 }, + { 0x00000008, 0x00224a23, 0x000 }, + { 0x00000010, 0x00224a23, 0x000 }, + { 0x00000018, 0x00224a23, 0x000 }, + { 0x00000000, 0x00804803, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00000007, 0x0021062f, 0x000 }, + { 0x00000013, 0x00200a2d, 0x000 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000ffff, 0x40282220, 0x000 }, + { 0x0000000f, 0x00262228, 0x000 }, + { 0x00000010, 0x40212620, 0x000 }, + { 0x0000000f, 0x00262629, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1e0 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000081, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000080, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1dc }, + { 0x00000000, 0x00600000, 0x1e9 }, + { 0x00000001, 0x00531e27, 0x1d8 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000001f, 0x00280a22, 0x000 }, + { 0x0000001f, 0x00282a2a, 0x000 }, + { 0x00000001, 0x00530621, 0x1d1 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000002, 0x00304a2f, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000001, 0x00301e2f, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x1e9 }, + { 0x00000001, 0x00531e27, 0x1e5 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x0000000f, 0x00260e23, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000000f, 0x00261224, 0x000 }, + { 0x00000000, 0x00201411, 0x000 }, + { 0x00000000, 0x00601811, 0x2bb }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000000, 0x002f022b, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1f8 }, + { 0x00000010, 0x00221628, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a29, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x0020480a, 0x000 }, + { 0x00000000, 0x00202c11, 0x000 }, + { 0x00000010, 0x00221623, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a24, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x00731503, 0x205 }, + { 0x00000000, 0x00201805, 0x000 }, + { 0x00000000, 0x00731524, 0x205 }, + { 0x00000000, 0x002d14c5, 0x000 }, + { 0x00000000, 0x003008a2, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00000000, 0x00202003, 0x000 }, + { 0x00000000, 0x00802404, 0x000 }, + { 0x0000000f, 0x00210225, 0x000 }, + { 0x00000000, 0x14c00000, 0x67b }, + { 0x00000000, 0x002b1405, 0x000 }, + { 0x00000001, 0x00901625, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00294a22, 0x000 }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00384a21, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000ffff, 0x40281220, 0x000 }, + { 0x00000010, 0xc0211a20, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211620, 0x000 }, + { 0x00000000, 0x00741465, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00000001, 0x00330621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0cc00000, 0x219 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x212 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x638 }, + { 0x00000000, 0x0040040f, 0x213 }, + { 0x00000000, 0x00600000, 0x624 }, + { 0x00000000, 0x00600000, 0x638 }, + { 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0x00000000, 0x00204805, 0x000 }, + { 0x00020000, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x561 }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x56f }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x561 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00002258, 0x00300a24, 0x000 }, + { 0x00040000, 0x00694622, 0x67c }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x56f }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x565 }, + { 0x00000000, 0xc0201c00, 0x000 }, + { 0x00000000, 0xc0400000, 0x56f }, + { 0x00000004, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x56d }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000216d, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0604800, 0x681 }, + { 0x00000000, 0x00401c10, 0x56f }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00000000, 0xc0400000, 0x000 }, + { 0x00000000, 0x0ee00000, 0x571 }, + { 0x00000000, 0x00600000, 0x5bc }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x582 }, + { 0x0000a2b7, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x67c }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x0000a2c4, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x580 }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000001, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x593 }, + { 0x0000a2bb, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x67c }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x0000a2c5, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x591 }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000002, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5a4 }, + { 0x0000a2bf, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2be, 0x00604411, 0x67c }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x0000a2c6, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5a2 }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x0000a2c3, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x67c }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x0000a2c7, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5b1 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x85000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x0000304a, 0x00204411, 0x000 }, + { 0x01000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00400000, 0x5b7 }, + { 0xa4000000, 0xc0204411, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0xc0600000, 0x5bc }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000002c, 0x00203621, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0230, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5c3 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000030, 0x00403621, 0x5d6 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x5d6 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a092, 0x00604411, 0x67c }, + { 0x00000031, 0x00203630, 0x000 }, + { 0x0004a093, 0x00604411, 0x67c }, + { 0x00000032, 0x00203630, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x67c }, + { 0x00000033, 0x00203630, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x67c }, + { 0x00000034, 0x00203630, 0x000 }, + { 0x0004a2be, 0x00604411, 0x67c }, + { 0x00000035, 0x00203630, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x67c }, + { 0x00000036, 0x00203630, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x00000005, 0x00204811, 0x000 }, + { 0x0000a1f4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x88000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000001, 0x002f0230, 0x000 }, + { 0x00000000, 0x0ce00000, 0x61f }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x61f }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x5f8 }, + { 0x0000a092, 0x00204411, 0x000 }, + { 0x00000031, 0x00204a2d, 0x000 }, + { 0x0000a093, 0x00204411, 0x000 }, + { 0x00000032, 0x00204a2d, 0x000 }, + { 0x0000a2b6, 0x00204411, 0x000 }, + { 0x00000033, 0x00204a2d, 0x000 }, + { 0x0000a2ba, 0x00204411, 0x000 }, + { 0x00000034, 0x00204a2d, 0x000 }, + { 0x0000a2be, 0x00204411, 0x000 }, + { 0x00000035, 0x00204a2d, 0x000 }, + { 0x0000a2c2, 0x00204411, 0x000 }, + { 0x00000036, 0x00204a2d, 0x000 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x000001ff, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x61e }, + { 0x00000000, 0x00210221, 0x000 }, + { 0x00000000, 0x14c00000, 0x601 }, + { 0x0004a003, 0x00604411, 0x67c }, + { 0x0000a003, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x14c00000, 0x606 }, + { 0x0004a010, 0x00604411, 0x67c }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x61e }, + { 0x0004a011, 0x00604411, 0x67c }, + { 0x0000a011, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a012, 0x00604411, 0x67c }, + { 0x0000a012, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a013, 0x00604411, 0x67c }, + { 0x0000a013, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a014, 0x00604411, 0x67c }, + { 0x0000a014, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a015, 0x00604411, 0x67c }, + { 0x0000a015, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a016, 0x00604411, 0x67c }, + { 0x0000a016, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a017, 0x00604411, 0x67c }, + { 0x0000a017, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x0000002c, 0x0080062d, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x00000000, 0x0ee00000, 0x630 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000002, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62e }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x00001000, 0x00200811, 0x000 }, + { 0x0000002b, 0x00203622, 0x000 }, + { 0x00000000, 0x00600000, 0x634 }, + { 0x00000000, 0x00600000, 0x5bc }, + { 0x98000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00804811, 0x000 }, + { 0x00000000, 0xc0600000, 0x634 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000a2a4, 0x00204411, 0x000 }, + { 0x00000022, 0x00204811, 0x000 }, + { 0x89000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00404811, 0x620 }, + { 0x97000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x8a000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00404811, 0x620 }, + { 0x00000000, 0x00600000, 0x64d }, + { 0x0001a2a4, 0xc0204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36a }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x09800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x67c }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x00000004, 0x00404c11, 0x647 }, + { 0x00000000, 0x00400000, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000004, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffffb, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffff7, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36a }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x01800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004217f, 0x00604411, 0x67c }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x67b }, + { 0x00000010, 0x00404c11, 0x661 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x38c00000, 0x000 }, + { 0x0000001d, 0x00200a2d, 0x000 }, + { 0x0000001e, 0x00200e2d, 0x000 }, + { 0x0000001f, 0x0020122d, 0x000 }, + { 0x00000020, 0x0020162d, 0x000 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000004, 0x00301224, 0x000 }, + { 0x00000000, 0x002f0064, 0x000 }, + { 0x00000000, 0x0cc00000, 0x67a }, + { 0x00000003, 0x00281a22, 0x000 }, + { 0x00000008, 0x00221222, 0x000 }, + { 0xfffff000, 0x00281224, 0x000 }, + { 0x00000000, 0x002910c4, 0x000 }, + { 0x0000001f, 0x00403624, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x67c }, + { 0x9f000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x67f }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x681 }, + { 0x9e000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x684 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0xc0204411, 0x000 }, + { 0x00000021, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000024, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000022, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000023, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x014204f5, 0x05b30250, 0x000 }, + { 0x01c30168, 0x043505b3, 0x000 }, + { 0x02250209, 0x02500151, 0x000 }, + { 0x02230245, 0x02a00241, 0x000 }, + { 0x03cd05b3, 0x05b305b3, 0x000 }, + { 0x063c063d, 0x031f05b3, 0x000 }, + { 0x05b305b8, 0x03200340, 0x000 }, + { 0x032a0282, 0x03420334, 0x000 }, + { 0x05b305b3, 0x05b305b3, 0x000 }, + { 0x05b30544, 0x05b305b3, 0x000 }, + { 0x03b205b3, 0x04ae0344, 0x000 }, + { 0x048d0443, 0x043305b3, 0x000 }, + { 0x04c305b3, 0x043704d0, 0x000 }, + { 0x044304fa, 0x03510371, 0x000 }, + { 0x05b305b3, 0x05b305b3, 0x000 }, + { 0x05b305b3, 0x05b305b3, 0x000 }, + { 0x05b305b3, 0x063205ba, 0x000 }, + { 0x05b305b3, 0x000705b3, 0x000 }, + { 0x05b305b3, 0x05b305b3, 0x000 }, + { 0x05b305b3, 0x05b305b3, 0x000 }, + { 0x03ee03e3, 0x03fe03fc, 0x000 }, + { 0x04040400, 0x04020406, 0x000 }, + { 0x0412040e, 0x041a0416, 0x000 }, + { 0x0422041e, 0x042a0426, 0x000 }, + { 0x05b305b3, 0x042e05b3, 0x000 }, + { 0x05b305b3, 0x05b305b3, 0x000 }, + { 0x05b305b3, 0x05b305b3, 0x000 }, + { 0x00020668, 0x06860006, 0x000 }, +}; + +static const u32 RV670_pfp_microcode[]={ +0xca0400, +0xa00000, +0x7e828b, +0x7c038b, +0x8001b8, +0x7c038b, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xc41838, +0xca2400, +0xca2800, +0x9581a8, +0xc41c3a, +0xc3c000, +0xca0800, +0xca0c00, +0x7c744b, +0xc20005, +0x99c000, +0xc41c3a, +0x7c744c, +0xc0fff0, +0x042c04, +0x309002, +0x7d2500, +0x351402, +0x7d350b, +0x255403, +0x7cd580, +0x259c03, +0x95c004, +0xd5001b, +0x7eddc1, +0x7d9d80, +0xd6801b, +0xd5801b, +0xd4401e, +0xd5401e, +0xd6401e, +0xd6801e, +0xd4801e, +0xd4c01e, +0x9783d3, +0xd5c01e, +0xca0800, +0x80001a, +0xca0c00, +0xe4011e, +0xd4001e, +0x80000c, +0xc41838, +0xe4013e, +0xd4001e, +0x80000c, +0xc41838, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca1800, +0xd4401e, +0xd5801e, +0x800053, +0xd40075, +0xd4401e, +0xca0800, +0xca0c00, +0xca1000, +0xd48019, +0xd4c018, +0xd50017, +0xd4801e, +0xd4c01e, +0xd5001e, +0xe2001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0xd48060, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xd48061, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xca0c00, +0xd4401e, +0xd48016, +0xd4c016, +0xd4801e, +0x8001b8, +0xd4c01e, +0xc60843, +0xca0c00, +0xca1000, +0x948004, +0xca1400, +0xe420f3, +0xd42013, +0xd56065, +0xd4e01c, +0xd5201c, +0xd5601c, +0x800000, +0x062001, +0xc60843, +0xca0c00, +0xca1000, +0x9483f7, +0xca1400, +0xe420f3, +0x800079, +0xd42013, +0xc60843, +0xca0c00, +0xca1000, +0x9883ef, +0xca1400, +0xd40064, +0x80008d, +0x000000, +0xc41432, +0xc61843, +0xc4082f, +0x954005, +0xc40c30, +0xd4401e, +0x800000, +0xee001e, +0x9583f5, +0xc41031, +0xd44033, +0xd52065, +0xd4a01c, +0xd4e01c, +0xd5201c, +0xe4015e, +0xd4001e, +0x800000, +0x062001, +0xca1800, +0x0a2001, +0xd60076, +0xc40836, +0x988007, +0xc61045, +0x950110, +0xd4001f, +0xd46062, +0x800000, +0xd42062, +0xcc3835, +0xcc1433, +0x8401bb, +0xd40072, +0xd5401e, +0x800000, +0xee001e, +0xe2001a, +0x8401bb, +0xe2001a, +0xcc104b, +0xcc0447, +0x2c9401, +0x7d098b, +0x984005, +0x7d15cb, +0xd4001a, +0x8001b8, +0xd4006d, +0x344401, +0xcc0c48, +0x98403a, +0xcc2c4a, +0x958004, +0xcc0449, +0x8001b8, +0xd4001a, +0xd4c01a, +0x282801, +0x8400f0, +0xcc1003, +0x98801b, +0x04380c, +0x8400f0, +0xcc1003, +0x988017, +0x043808, +0x8400f0, +0xcc1003, +0x988013, +0x043804, +0x8400f0, +0xcc1003, +0x988014, +0xcc104c, +0x9a8009, +0xcc144d, +0x9840dc, +0xd4006d, +0xcc1848, +0xd5001a, +0xd5401a, +0x8000c9, +0xd5801a, +0x96c0d5, +0xd4006d, +0x8001b8, +0xd4006e, +0x9ac003, +0xd4006d, +0xd4006e, +0x800000, +0xec007f, +0x9ac0cc, +0xd4006d, +0x8001b8, +0xd4006e, +0xcc1403, +0xcc1803, +0xcc1c03, +0x7d9103, +0x7dd583, +0x7d190c, +0x35cc1f, +0x35701f, +0x7cf0cb, +0x7cd08b, +0x880000, +0x7e8e8b, +0x95c004, +0xd4006e, +0x8001b8, +0xd4001a, +0xd4c01a, +0xcc0803, +0xcc0c03, +0xcc1003, +0xcc1403, +0xcc1803, +0xcc1c03, +0xcc2403, +0xcc2803, +0x35c41f, +0x36b01f, +0x7c704b, +0x34f01f, +0x7c704b, +0x35701f, +0x7c704b, +0x7d8881, +0x7dccc1, +0x7e5101, +0x7e9541, +0x7c9082, +0x7cd4c2, +0x7c848b, +0x9ac003, +0x7c8c8b, +0x2c8801, +0x98809e, +0xd4006d, +0x98409c, +0xd4006e, +0xcc084c, +0xcc0c4d, +0xcc1048, +0xd4801a, +0xd4c01a, +0x800101, +0xd5001a, +0xcc0832, +0xd40032, +0x9482d9, +0xca0c00, +0xd4401e, +0x800000, +0xd4001e, +0xe4011e, +0xd4001e, +0xca0800, +0xca0c00, +0xca1000, +0xd4401e, +0xca1400, +0xd4801e, +0xd4c01e, +0xd5001e, +0xd5401e, +0xd54034, +0x800000, +0xee001e, +0x280404, +0xe2001a, +0xe2001a, +0xd4401a, +0xca3800, +0xcc0803, +0xcc0c03, +0xcc0c03, +0xcc0c03, +0x9882bd, +0x000000, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0400, +0xc2ff00, +0xcc0834, +0xc13fff, +0x7c74cb, +0x7cc90b, +0x7d010f, +0x9902b0, +0x7c738b, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0800, +0x281900, +0x7d898b, +0x958014, +0x281404, +0xca0c00, +0xca1000, +0xca1c00, +0xca2400, +0xe2001f, +0xd4c01a, +0xd5001a, +0xd5401a, +0xcc1803, +0xcc2c03, +0xcc2c03, +0xcc2c03, +0x7da58b, +0x7d9c47, +0x984297, +0x000000, +0x800161, +0xd4c01a, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0x248c06, +0x0ccc06, +0x98c006, +0xcc104e, +0x990004, +0xd40073, +0xe4011e, +0xd4001e, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xca0800, +0xca0c00, +0x34d018, +0x251001, +0x950021, +0xc17fff, +0xca1000, +0xca1400, +0xca1800, +0xd4801d, +0xd4c01d, +0x7db18b, +0xc14202, +0xc2c001, +0xd5801d, +0x34dc0e, +0x7d5d4c, +0x7f734c, +0xd7401e, +0xd5001e, +0xd5401e, +0xc14200, +0xc2c000, +0x099c01, +0x31dc10, +0x7f5f4c, +0x7f734c, +0x042802, +0x7d8380, +0xd5a86f, +0xd58066, +0xd7401e, +0xec005e, +0xc82402, +0xc82402, +0x8001b8, +0xd60076, +0xd4401e, +0xd4801e, +0xd4c01e, +0x800000, +0xee001e, +0x800000, +0xee001f, +0xd4001f, +0x800000, +0xd4001f, +0xd4001f, +0x880000, +0xd4001f, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x010171, +0x020178, +0x03008f, +0x04007f, +0x050003, +0x06003f, +0x070032, +0x08012c, +0x090046, +0x0a0036, +0x1001b6, +0x1700a2, +0x22013a, +0x230149, +0x2000b4, +0x240125, +0x27004d, +0x28006a, +0x2a0060, +0x2b0052, +0x2f0065, +0x320087, +0x34017f, +0x3c0156, +0x3f0072, +0x41018c, +0x44012e, +0x550173, +0x56017a, +0x60000b, +0x610034, +0x620038, +0x630038, +0x640038, +0x650038, +0x660038, +0x670038, +0x68003a, +0x690041, +0x6a0048, +0x6b0048, +0x6c0048, +0x6d0048, +0x6e0048, +0x6f0048, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +}; + +static const u32 RS780_cp_microcode[][3]={ + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x0000ffff, 0x00284621, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x00000000, 0x00e00000, 0x000 }, + { 0x00010000, 0xc0294620, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x622 }, + { 0x00000000, 0x00600000, 0x5d1 }, + { 0x00000000, 0x00600000, 0x5de }, + { 0x00000000, 0xc0200800, 0x000 }, + { 0x00000f00, 0x00281622, 0x000 }, + { 0x00000008, 0x00211625, 0x000 }, + { 0x00000018, 0x00203625, 0x000 }, + { 0x8d000000, 0x00204411, 0x000 }, + { 0x00000004, 0x002f0225, 0x000 }, + { 0x00000000, 0x0ce00000, 0x018 }, + { 0x00412000, 0x00404811, 0x019 }, + { 0x00422000, 0x00204811, 0x000 }, + { 0x8e000000, 0x00204411, 0x000 }, + { 0x00000028, 0x00204a2d, 0x000 }, + { 0x90000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x0000000c, 0x00211622, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000019, 0x00211a22, 0x000 }, + { 0x00000004, 0x00281a26, 0x000 }, + { 0x00000000, 0x002914c5, 0x000 }, + { 0x00000019, 0x00203625, 0x000 }, + { 0x00000000, 0x003a1402, 0x000 }, + { 0x00000016, 0x00211625, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0xfffffffc, 0x00280e23, 0x000 }, + { 0x00000000, 0x002914a3, 0x000 }, + { 0x00000017, 0x00203625, 0x000 }, + { 0x00008000, 0x00280e22, 0x000 }, + { 0x00000007, 0x00220e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x20000000, 0x00280e22, 0x000 }, + { 0x00000006, 0x00210e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x00000000, 0x00220222, 0x000 }, + { 0x00000000, 0x14e00000, 0x038 }, + { 0x00000000, 0x2ee00000, 0x035 }, + { 0x00000000, 0x2ce00000, 0x037 }, + { 0x00000000, 0x00400e2d, 0x039 }, + { 0x00000008, 0x00200e2d, 0x000 }, + { 0x00000009, 0x0040122d, 0x046 }, + { 0x00000001, 0x00400e2d, 0x039 }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x03e }, + { 0x00000008, 0x00401c11, 0x041 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x0000000f, 0x00281e27, 0x000 }, + { 0x00000003, 0x00221e27, 0x000 }, + { 0x7fc00000, 0x00281a23, 0x000 }, + { 0x00000014, 0x00211a26, 0x000 }, + { 0x00000001, 0x00331a26, 0x000 }, + { 0x00000008, 0x00221a26, 0x000 }, + { 0x00000000, 0x00290cc7, 0x000 }, + { 0x00000027, 0x00203624, 0x000 }, + { 0x00007f00, 0x00281221, 0x000 }, + { 0x00001400, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x04b }, + { 0x00000001, 0x00290e23, 0x000 }, + { 0x0000000e, 0x00203623, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfff80000, 0x00294a23, 0x000 }, + { 0x00000000, 0x003a2c02, 0x000 }, + { 0x00000002, 0x00220e2b, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x0000000f, 0x00203623, 0x000 }, + { 0x00001fff, 0x00294a23, 0x000 }, + { 0x00000027, 0x00204a2d, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000029, 0x00200e2d, 0x000 }, + { 0x060a0200, 0x00294a23, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00210222, 0x000 }, + { 0x00000000, 0x14e00000, 0x061 }, + { 0x00000000, 0x2ee00000, 0x05f }, + { 0x00000000, 0x2ce00000, 0x05e }, + { 0x00000000, 0x00400e2d, 0x062 }, + { 0x00000001, 0x00400e2d, 0x062 }, + { 0x0000000a, 0x00200e2d, 0x000 }, + { 0x0000000b, 0x0040122d, 0x06a }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x7fc00000, 0x00281623, 0x000 }, + { 0x00000014, 0x00211625, 0x000 }, + { 0x00000001, 0x00331625, 0x000 }, + { 0x80000000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00290ca3, 0x000 }, + { 0x3ffffc00, 0x00290e23, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x06d }, + { 0x00000100, 0x00401c11, 0x070 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x000000f0, 0x00281e27, 0x000 }, + { 0x00000004, 0x00221e27, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0xfffff0ff, 0x00281a30, 0x000 }, + { 0x0000a028, 0x00204411, 0x000 }, + { 0x00000000, 0x002948e6, 0x000 }, + { 0x0000a018, 0x00204411, 0x000 }, + { 0x3fffffff, 0x00284a23, 0x000 }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000030, 0x0020162d, 0x000 }, + { 0x00000002, 0x00291625, 0x000 }, + { 0x00000030, 0x00203625, 0x000 }, + { 0x00000025, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a3, 0x000 }, + { 0x00000000, 0x0cc00000, 0x083 }, + { 0x00000026, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a4, 0x000 }, + { 0x00000000, 0x0cc00000, 0x084 }, + { 0x00000000, 0x00400000, 0x08a }, + { 0x00000025, 0x00203623, 0x000 }, + { 0x00000026, 0x00203624, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000002, 0x00210227, 0x000 }, + { 0x00000000, 0x14e00000, 0x08a }, + { 0x00000000, 0x00600000, 0x5ff }, + { 0x00000000, 0x00600000, 0x5f3 }, + { 0x00000002, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x08d }, + { 0x00000012, 0xc0403620, 0x093 }, + { 0x00000000, 0x2ee00000, 0x091 }, + { 0x00000000, 0x2ce00000, 0x090 }, + { 0x00000002, 0x00400e2d, 0x092 }, + { 0x00000003, 0x00400e2d, 0x092 }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000012, 0x00203623, 0x000 }, + { 0x00000003, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x098 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x0a0 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x2ee00000, 0x09e }, + { 0x00000000, 0x2ce00000, 0x09d }, + { 0x00000002, 0x00400e2d, 0x09f }, + { 0x00000003, 0x00400e2d, 0x09f }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000000, 0x00204803, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x003f0000, 0x00280e23, 0x000 }, + { 0x00000010, 0x00210e23, 0x000 }, + { 0x00000011, 0x00203623, 0x000 }, + { 0x0000001e, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a7 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x0000001f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0aa }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000008, 0x00210e2b, 0x000 }, + { 0x0000007f, 0x00280e23, 0x000 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0e1 }, + { 0x00000000, 0x27000000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ae00000, 0x0b3 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x0000000c, 0x00221e30, 0x000 }, + { 0x99800000, 0x00204411, 0x000 }, + { 0x00000004, 0x0020122d, 0x000 }, + { 0x00000008, 0x00221224, 0x000 }, + { 0x00000010, 0x00201811, 0x000 }, + { 0x00000000, 0x00291ce4, 0x000 }, + { 0x00000000, 0x00604807, 0x12f }, + { 0x9b000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x9c000000, 0x00204411, 0x000 }, + { 0x00000000, 0x0033146f, 0x000 }, + { 0x00000001, 0x00333e23, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0x00203c05, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000e, 0x00204811, 0x000 }, + { 0x00000000, 0x00201010, 0x000 }, + { 0x0000e007, 0x00204411, 0x000 }, + { 0x0000000f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0cb }, + { 0x00f8ff08, 0x00204811, 0x000 }, + { 0x98000000, 0x00404811, 0x0dc }, + { 0x000000f0, 0x00280e22, 0x000 }, + { 0x000000a0, 0x002f0223, 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0x000 }, + { 0x00000000, 0x0078042a, 0x2fb }, + { 0x00000000, 0x00202809, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x174 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000210, 0x00600411, 0x315 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x194 }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x3f800000, 0x00200411, 0x000 }, + { 0x46000000, 0x00600811, 0x1b2 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x19b }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000021, 0x00804811, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40281620, 0x000 }, + { 0x00000010, 0xc0811a20, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000008, 0x00221e30, 0x000 }, + { 0x00000029, 0x00201a2d, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfffbff09, 0x00204811, 0x000 }, + { 0x0000000f, 0x0020222d, 0x000 }, + { 0x00001fff, 0x00294a28, 0x000 }, + { 0x00000006, 0x0020222d, 0x000 }, + { 0x00000000, 0x002920e8, 0x000 }, + { 0x00000000, 0x00204808, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000100, 0x00201811, 0x000 }, + { 0x00000008, 0x00621e28, 0x12f }, + { 0x00000008, 0x00822228, 0x000 }, + { 0x0002c000, 0x00204411, 0x000 }, + { 0x00000015, 0x00600e2d, 0x1bd }, + { 0x00000016, 0x00600e2d, 0x1bd }, + { 0x0000c008, 0x00204411, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0x00000000, 0x14c00000, 0x1b9 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x39000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00804802, 0x000 }, + { 0x00000018, 0x00202e2d, 0x000 }, + { 0x00000000, 0x003b0d63, 0x000 }, + { 0x00000008, 0x00224a23, 0x000 }, + { 0x00000010, 0x00224a23, 0x000 }, + { 0x00000018, 0x00224a23, 0x000 }, + { 0x00000000, 0x00804803, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00000007, 0x0021062f, 0x000 }, + { 0x00000013, 0x00200a2d, 0x000 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000ffff, 0x40282220, 0x000 }, + { 0x0000000f, 0x00262228, 0x000 }, + { 0x00000010, 0x40212620, 0x000 }, + { 0x0000000f, 0x00262629, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1e0 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000081, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000080, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1dc }, + { 0x00000000, 0x00600000, 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0x000 }, + { 0x00000000, 0x0020480a, 0x000 }, + { 0x00000000, 0x00202c11, 0x000 }, + { 0x00000010, 0x00221623, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a24, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x00731503, 0x205 }, + { 0x00000000, 0x00201805, 0x000 }, + { 0x00000000, 0x00731524, 0x205 }, + { 0x00000000, 0x002d14c5, 0x000 }, + { 0x00000000, 0x003008a2, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00000000, 0x00202003, 0x000 }, + { 0x00000000, 0x00802404, 0x000 }, + { 0x0000000f, 0x00210225, 0x000 }, + { 0x00000000, 0x14c00000, 0x621 }, + { 0x00000000, 0x002b1405, 0x000 }, + { 0x00000001, 0x00901625, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00294a22, 0x000 }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00003fff, 0x002f022f, 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0x000 }, + { 0x00000000, 0x004938ce, 0x610 }, + { 0x00000001, 0x40280a20, 0x000 }, + { 0x00000006, 0x40280e20, 0x000 }, + { 0x00000300, 0xc0281220, 0x000 }, + { 0x00000008, 0x00211224, 0x000 }, + { 0x00000000, 0xc0201620, 0x000 }, + { 0x00000000, 0xc0201a20, 0x000 }, + { 0x00000000, 0x00210222, 0x000 }, + { 0x00000000, 0x14c00000, 0x56c }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00002258, 0x00300a24, 0x000 }, + { 0x00040000, 0x00694622, 0x622 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00020000, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x574 }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x582 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x574 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00002258, 0x00300a24, 0x000 }, + { 0x00040000, 0x00694622, 0x622 }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x582 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x578 }, + { 0x00000000, 0xc0201c00, 0x000 }, + { 0x00000000, 0xc0400000, 0x582 }, + { 0x00000004, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x580 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000216d, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0604800, 0x627 }, + { 0x00000000, 0x00401c10, 0x582 }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00000000, 0xc0400000, 0x000 }, + { 0x00000000, 0x0ee00000, 0x584 }, + { 0x00000000, 0x00600000, 0x5c3 }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x592 }, + { 0x0000a2b7, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x00000033, 0x0020262d, 0x000 }, + { 0x0000001a, 0x00212229, 0x000 }, + { 0x00000006, 0x00222629, 0x000 }, + { 0x0000a2c4, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x590 }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000001, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5a0 }, + { 0x0000a2bb, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x00000034, 0x0020262d, 0x000 }, + { 0x0000001a, 0x00212229, 0x000 }, + { 0x00000006, 0x00222629, 0x000 }, + { 0x0000a2c5, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x59e }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000002, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5ae }, + { 0x0000a2bf, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x00000035, 0x0020262d, 0x000 }, + { 0x0000001a, 0x00212229, 0x000 }, + { 0x00000006, 0x00222629, 0x000 }, + { 0x0000a2c6, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5ac }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x0000a2c3, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x00000036, 0x0020262d, 0x000 }, + { 0x0000001a, 0x00212229, 0x000 }, + { 0x00000006, 0x00222629, 0x000 }, + { 0x0000a2c7, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5b8 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x85000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x0000304a, 0x00204411, 0x000 }, + { 0x01000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00400000, 0x5be }, + { 0xa4000000, 0xc0204411, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0xc0600000, 0x5c3 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x00000005, 0x00204811, 0x000 }, + { 0x0000a1f4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x88000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x00000000, 0x0ee00000, 0x5d6 }, + { 0x00001000, 0x00200811, 0x000 }, + { 0x0000002b, 0x00203622, 0x000 }, + { 0x00000000, 0x00600000, 0x5da }, + { 0x00000000, 0x00600000, 0x5c3 }, + { 0x98000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00804811, 0x000 }, + { 0x00000000, 0xc0600000, 0x5da }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000a2a4, 0x00204411, 0x000 }, + { 0x00000022, 0x00204811, 0x000 }, + { 0x89000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00404811, 0x5cd }, + { 0x97000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x8a000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00404811, 0x5cd }, + { 0x00000000, 0x00600000, 0x5f3 }, + { 0x0001a2a4, 0xc0204411, 0x000 }, + { 0x00000016, 0x00604811, 0x374 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x09800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x622 }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x00000004, 0x00404c11, 0x5ed }, + { 0x00000000, 0x00400000, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000004, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffffb, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffff7, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x00000016, 0x00604811, 0x374 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x01800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004217f, 0x00604411, 0x622 }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x621 }, + { 0x00000010, 0x00404c11, 0x607 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x38c00000, 0x000 }, + { 0x0000001d, 0x00200a2d, 0x000 }, + { 0x0000001e, 0x00200e2d, 0x000 }, + { 0x0000001f, 0x0020122d, 0x000 }, + { 0x00000020, 0x0020162d, 0x000 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000004, 0x00301224, 0x000 }, + { 0x00000000, 0x002f0064, 0x000 }, + { 0x00000000, 0x0cc00000, 0x620 }, + { 0x00000003, 0x00281a22, 0x000 }, + { 0x00000008, 0x00221222, 0x000 }, + { 0xfffff000, 0x00281224, 0x000 }, + { 0x00000000, 0x002910c4, 0x000 }, + { 0x0000001f, 0x00403624, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x622 }, + { 0x9f000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x625 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x627 }, + { 0x9e000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x62a }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0xc0204411, 0x000 }, + { 0x00000021, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000024, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000022, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000023, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x0142050a, 0x05ba0250, 0x000 }, + { 0x01c30168, 0x044105ba, 0x000 }, + { 0x02250209, 0x02500151, 0x000 }, + { 0x02230245, 0x02a00241, 0x000 }, + { 0x03d705ba, 0x05ba05ba, 0x000 }, + { 0x05e205e3, 0x031f05ba, 0x000 }, + { 0x032005bf, 0x0320034a, 0x000 }, + { 0x03340282, 0x034c033e, 0x000 }, + { 0x05ba05ba, 0x05ba05ba, 0x000 }, + { 0x05ba0557, 0x05ba032a, 0x000 }, + { 0x03bc05ba, 0x04c3034e, 0x000 }, + { 0x04a20455, 0x043f05ba, 0x000 }, + { 0x04d805ba, 0x044304e5, 0x000 }, + { 0x0455050f, 0x035b037b, 0x000 }, + { 0x05ba05ba, 0x05ba05ba, 0x000 }, + { 0x05ba05ba, 0x05ba05ba, 0x000 }, + { 0x05ba05ba, 0x05d805c1, 0x000 }, + { 0x05ba05ba, 0x000705ba, 0x000 }, + { 0x05ba05ba, 0x05ba05ba, 0x000 }, + { 0x05ba05ba, 0x05ba05ba, 0x000 }, + { 0x03f803ed, 0x04080406, 0x000 }, + { 0x040e040a, 0x040c0410, 0x000 }, + { 0x041c0418, 0x04240420, 0x000 }, + { 0x042c0428, 0x04340430, 0x000 }, + { 0x05ba05ba, 0x043a0438, 0x000 }, + { 0x05ba05ba, 0x05ba05ba, 0x000 }, + { 0x05ba05ba, 0x05ba05ba, 0x000 }, + { 0x0002060e, 0x062c0006, 0x000 }, +}; + +static const u32 RS780_pfp_microcode[]={ +0xca0400, +0xa00000, +0x7e828b, +0x7c038b, +0x8001db, +0x7c038b, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xc41838, +0xca2400, +0xca2800, +0x9581cb, +0xc41c3a, +0xc3c000, +0xca0800, +0xca0c00, +0x7c744b, +0xc20005, +0x99c000, +0xc41c3a, +0x7c744c, +0xc0ffe0, +0x042c08, +0x309002, +0x7d2500, +0x351402, +0x7d350b, +0x255407, +0x7cd580, +0x259c07, +0x95c004, +0xd5001b, +0x7eddc1, +0x7d9d80, +0xd6801b, +0xd5801b, +0xd4401e, +0xd5401e, +0xd6401e, +0xd6801e, +0xd4801e, +0xd4c01e, +0x9783d3, +0xd5c01e, +0xca0800, +0x80001a, +0xca0c00, +0xe4011e, +0xd4001e, +0x80000c, +0xc41838, +0xe4013e, +0xd4001e, +0x80000c, +0xc41838, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0xca0c00, +0x8001db, +0xd48024, +0xca0800, +0x7c00c0, +0xc81425, +0xc81824, +0x7c9488, +0x7c9880, +0xc20003, +0xd40075, +0x7c744c, +0x800064, +0xd4401e, +0xca1800, +0xd4401e, +0xd5801e, +0x800062, +0xd40075, +0xd4401e, +0xca0800, +0xca0c00, +0xca1000, +0xd48019, +0xd4c018, +0xd50017, +0xd4801e, +0xd4c01e, +0xd5001e, +0xe2001e, +0xca0400, +0xa00000, +0x7e828b, +0xd40075, +0xd4401e, +0xca0800, +0xca0c00, +0xca1000, +0xd48019, +0xd4c018, +0xd50017, +0xd4801e, +0xd4c01e, +0xd5001e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0x248c01, +0xd48060, +0x94c003, +0x041001, +0x041002, +0xd50025, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xd48061, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xca0c00, +0xd4401e, +0xd48016, +0xd4c016, +0xd4801e, +0x8001db, +0xd4c01e, +0xc60843, +0xca0c00, +0xca1000, +0x948004, +0xca1400, +0xe420f3, +0xd42013, +0xd56065, +0xd4e01c, +0xd5201c, +0xd5601c, +0x800000, +0x062001, +0xc60843, +0xca0c00, +0xca1000, +0x9483f7, +0xca1400, +0xe420f3, +0x80009c, +0xd42013, +0xc60843, +0xca0c00, +0xca1000, +0x9883ef, +0xca1400, +0xd40064, +0x8000b0, +0x000000, +0xc41432, +0xc61843, +0xc4082f, +0x954005, +0xc40c30, +0xd4401e, +0x800000, +0xee001e, +0x9583f5, +0xc41031, +0xd44033, +0xd52065, +0xd4a01c, +0xd4e01c, +0xd5201c, +0xe4015e, +0xd4001e, +0x800000, +0x062001, +0xca1800, +0x0a2001, +0xd60076, +0xc40836, +0x988007, +0xc61045, +0x950110, +0xd4001f, +0xd46062, +0x800000, +0xd42062, +0xcc3835, +0xcc1433, +0x8401de, +0xd40072, +0xd5401e, +0x800000, +0xee001e, +0xe2001a, +0x8401de, +0xe2001a, +0xcc104b, +0xcc0447, +0x2c9401, +0x7d098b, +0x984005, +0x7d15cb, +0xd4001a, +0x8001db, +0xd4006d, +0x344401, +0xcc0c48, +0x98403a, +0xcc2c4a, +0x958004, +0xcc0449, +0x8001db, +0xd4001a, +0xd4c01a, +0x282801, +0x840113, +0xcc1003, +0x98801b, +0x04380c, +0x840113, +0xcc1003, +0x988017, +0x043808, +0x840113, +0xcc1003, +0x988013, +0x043804, +0x840113, +0xcc1003, +0x988014, +0xcc104c, +0x9a8009, +0xcc144d, +0x9840dc, +0xd4006d, +0xcc1848, +0xd5001a, +0xd5401a, +0x8000ec, +0xd5801a, +0x96c0d5, +0xd4006d, +0x8001db, +0xd4006e, +0x9ac003, +0xd4006d, +0xd4006e, +0x800000, +0xec007f, +0x9ac0cc, +0xd4006d, +0x8001db, +0xd4006e, +0xcc1403, +0xcc1803, +0xcc1c03, +0x7d9103, +0x7dd583, +0x7d190c, +0x35cc1f, +0x35701f, +0x7cf0cb, +0x7cd08b, +0x880000, +0x7e8e8b, +0x95c004, +0xd4006e, +0x8001db, +0xd4001a, +0xd4c01a, +0xcc0803, +0xcc0c03, +0xcc1003, +0xcc1403, +0xcc1803, +0xcc1c03, +0xcc2403, +0xcc2803, +0x35c41f, +0x36b01f, +0x7c704b, +0x34f01f, +0x7c704b, +0x35701f, +0x7c704b, +0x7d8881, +0x7dccc1, +0x7e5101, +0x7e9541, +0x7c9082, +0x7cd4c2, +0x7c848b, +0x9ac003, +0x7c8c8b, +0x2c8801, +0x98809e, +0xd4006d, +0x98409c, +0xd4006e, +0xcc084c, +0xcc0c4d, +0xcc1048, +0xd4801a, +0xd4c01a, +0x800124, +0xd5001a, +0xcc0832, +0xd40032, +0x9482b6, +0xca0c00, +0xd4401e, +0x800000, +0xd4001e, +0xe4011e, +0xd4001e, +0xca0800, +0xca0c00, +0xca1000, +0xd4401e, +0xca1400, +0xd4801e, +0xd4c01e, +0xd5001e, +0xd5401e, +0xd54034, +0x800000, +0xee001e, +0x280404, +0xe2001a, +0xe2001a, +0xd4401a, +0xca3800, +0xcc0803, +0xcc0c03, +0xcc0c03, +0xcc0c03, +0x98829a, +0x000000, +0x8401de, +0xd7a06f, +0x800000, +0xee001f, +0xca0400, +0xc2ff00, +0xcc0834, +0xc13fff, +0x7c74cb, +0x7cc90b, +0x7d010f, +0x99028d, +0x7c738b, +0x8401de, +0xd7a06f, +0x800000, +0xee001f, +0xca0800, +0x281900, +0x7d898b, +0x958014, +0x281404, +0xca0c00, +0xca1000, +0xca1c00, +0xca2400, +0xe2001f, +0xd4c01a, +0xd5001a, +0xd5401a, +0xcc1803, +0xcc2c03, +0xcc2c03, +0xcc2c03, +0x7da58b, +0x7d9c47, +0x984274, +0x000000, +0x800184, +0xd4c01a, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0x248c06, +0x0ccc06, +0x98c006, +0xcc104e, +0x990004, +0xd40073, +0xe4011e, +0xd4001e, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xca0800, +0xca0c00, +0x34d018, +0x251001, +0x950021, +0xc17fff, +0xca1000, +0xca1400, +0xca1800, +0xd4801d, +0xd4c01d, +0x7db18b, +0xc14202, +0xc2c001, +0xd5801d, +0x34dc0e, +0x7d5d4c, +0x7f734c, +0xd7401e, +0xd5001e, +0xd5401e, +0xc14200, +0xc2c000, +0x099c01, +0x31dc10, +0x7f5f4c, +0x7f734c, +0x042802, +0x7d8380, +0xd5a86f, +0xd58066, +0xd7401e, +0xec005e, +0xc82402, +0xc82402, +0x8001db, +0xd60076, +0xd4401e, +0xd4801e, +0xd4c01e, +0x800000, +0xee001e, +0x800000, +0xee001f, +0xd4001f, +0x800000, +0xd4001f, +0xd4001f, +0x880000, +0xd4001f, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x010194, +0x02019b, +0x0300b2, +0x0400a2, +0x050003, +0x06003f, +0x070032, +0x08014f, +0x090046, +0x0a0036, +0x1001d9, +0x1700c5, +0x22015d, +0x23016c, +0x2000d7, +0x240148, +0x26004d, +0x27005c, +0x28008d, +0x290051, +0x2a007e, +0x2b0061, +0x2f0088, +0x3200aa, +0x3401a2, +0x36006f, +0x3c0179, +0x3f0095, +0x4101af, +0x440151, +0x550196, +0x56019d, +0x60000b, +0x610034, +0x620038, +0x630038, +0x640038, +0x650038, +0x660038, +0x670038, +0x68003a, +0x690041, +0x6a0048, +0x6b0048, +0x6c0048, +0x6d0048, +0x6e0048, +0x6f0048, +0x7301d9, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +}; + +static const u32 RV770_cp_microcode[]={ +0xcc0003ea, +0x7c408000, +0xa0000000, +0xcc800062, +0x80000001, +0xd040007f, +0x80000001, +0xcc400041, +0x7c40c000, +0xc0160004, +0x30d03fff, +0x7d15000c, +0xcc110000, +0x28d8001e, +0x31980001, +0x28dc001f, +0xc8200004, +0x95c00006, +0x7c424000, +0xcc000062, +0x7e56800c, +0xcc290000, +0xc8240004, +0x7e26000b, +0x95800006, +0x7c42c000, +0xcc000062, +0x7ed7000c, +0xcc310000, +0xc82c0004, +0x7e2e000c, +0xcc000062, +0x31103fff, +0x80000001, +0xce110000, +0x7c40c000, +0x80000001, +0xcc400040, +0x80000001, +0xcc412257, +0x7c418000, +0xcc400045, +0xcc400048, +0xcc41225c, +0xcc41a1fc, +0x7c408000, +0xa0000000, +0xcc800062, +0xcc400045, +0xcc400048, +0x7c40c000, +0xcc41225c, +0xcc41a1fc, +0x7c408000, +0xa0000000, +0xcc800062, +0xcc000045, +0xcc000048, +0xcc41225c, +0xcc41a1fc, +0x7c408000, +0xa0000000, +0xcc800062, +0x040ca1fd, +0xc0120001, +0xcc000045, +0xcc000048, +0x7cd0c00c, +0xcc41225c, +0xcc41a1fc, +0xd04d0000, +0x7c408000, +0xa0000000, +0xcc800062, +0x80000001, +0xcc41225d, +0x7c408000, +0x7c40c000, +0xc02a0002, +0x7c410000, +0x7d29000c, +0x30940001, +0x30980006, +0x309c0300, +0x29dc0008, +0x7c420000, +0x7c424000, +0x9540000f, +0xc02e0004, +0x05f02258, +0x7f2f000c, +0xcc310000, +0xc8280004, +0xccc12169, +0xcd01216a, +0xce81216b, +0x0db40002, +0xcc01216c, +0x9740000e, +0x0db40000, +0x8000007b, +0xc834000a, +0x0db40002, +0x97400009, +0x0db40000, +0xc02e0004, +0x05f02258, +0x7f2f000c, +0xcc310000, +0xc8280004, +0x8000007b, +0xc834000a, +0x97400004, +0x7e028000, +0x8000007b, +0xc834000a, +0x0db40004, +0x9740ff8c, +0x00000000, +0xce01216d, +0xce41216e, +0xc8280003, +0xc834000a, +0x9b400004, +0x043c0005, +0x8400026d, +0xcc000062, +0x0df40000, +0x9740000b, +0xc82c03e6, +0xce81a2b7, +0xc0300006, +0x7ef34028, +0xc0300020, +0x7f6b8020, +0x7fb3c029, +0xcf81a2c4, +0x80000001, +0xcfc1a2d1, +0x0df40001, +0x9740000b, +0xc82c03e7, +0xce81a2bb, +0xc0300006, +0x7ef34028, +0xc0300020, +0x7f6b8020, +0x7fb3c029, +0xcf81a2c5, +0x80000001, +0xcfc1a2d2, +0x0df40002, +0x9740000b, +0xc82c03e8, +0xce81a2bf, +0xc0300006, +0x7ef34028, +0xc0300020, +0x7f6b8020, +0x7fb3c029, +0xcf81a2c6, +0x80000001, +0xcfc1a2d3, +0xc82c03e9, +0xce81a2c3, +0xc0300006, +0x7ef34028, +0xc0300020, +0x7f6b8020, +0x7fb3c029, +0xcf81a2c7, +0x80000001, +0xcfc1a2d4, +0x80000001, +0xcc400042, +0x7c40c000, +0x7c410000, +0x2914001d, +0x31540001, +0x9940000d, +0x31181000, +0xc81c0011, +0x09dc0001, +0x95c0ffff, +0xc81c0011, +0xccc12100, +0xcd012101, +0xccc12102, +0xcd012103, +0x04180004, +0x8000039f, +0xcd81a2a4, +0xc02a0004, +0x95800008, +0x36a821a3, +0xcc290000, +0xc8280004, +0xc81c0011, +0x0de40040, +0x9640ffff, +0xc81c0011, +0xccc12170, +0xcd012171, +0xc8200012, +0x96000000, +0xc8200012, +0x8000039f, +0xcc000064, +0x7c40c000, +0x7c410000, +0xcc000045, +0xcc000048, +0x40d40003, +0xcd41225c, +0xcd01a1fc, +0xc01a0001, +0x041ca1fd, +0x7dd9c00c, +0x7c420000, +0x08cc0001, +0x06240001, +0x06280002, +0xce1d0000, +0xce5d0000, +0x98c0fffa, +0xce9d0000, +0x7c408000, +0xa0000000, +0xcc800062, +0x7c40c000, +0x30d00001, +0x28cc0001, +0x7c414000, +0x95000006, +0x7c418000, +0xcd41216d, +0xcd81216e, +0x800000f3, +0xc81c0003, +0xc0220004, +0x7e16000c, +0xcc210000, +0xc81c0004, +0x7c424000, +0x98c00004, +0x7c428000, +0x80000001, +0xcde50000, +0xce412169, +0xce81216a, +0xcdc1216b, +0x80000001, +0xcc01216c, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0x7c41c000, +0x28a40008, +0x326400ff, +0x0e68003c, +0x9680000a, +0x7c020000, +0x7c420000, +0x1e300003, +0xcc00006a, +0x9b000003, +0x42200005, +0x04200040, +0x80000110, +0x7c024000, +0x7e024000, +0x9a400000, +0x0a640001, +0x30ec0010, +0x9ac0000a, +0xcc000062, +0xc02a0004, +0xc82c0021, +0x7e92800c, +0xcc000041, +0xcc290000, +0xcec00021, +0x80000120, +0xc8300004, +0xcd01216d, +0xcd41216e, +0xc8300003, +0x7f1f000b, +0x30f40007, +0x27780001, +0x9740002a, +0x07b80125, +0x9f800000, +0x00000000, +0x80000135, +0x7f1b8004, +0x80000139, +0x7f1b8005, +0x8000013d, +0x7f1b8002, +0x80000141, +0x7f1b8003, +0x80000145, +0x7f1b8007, +0x80000149, +0x7f1b8006, +0x8000014e, +0x28a40008, +0x9b800019, +0x28a40008, +0x8000015e, +0x326400ff, +0x9b800015, +0x28a40008, +0x8000015e, +0x326400ff, +0x9b800011, +0x28a40008, +0x8000015e, +0x326400ff, +0x9b80000d, +0x28a40008, +0x8000015e, +0x326400ff, +0x9b800009, +0x28a40008, +0x8000015e, +0x326400ff, +0x9b800005, +0x28a40008, +0x8000015e, +0x326400ff, +0x28a40008, +0x326400ff, +0x0e68003c, +0x9a80feb1, +0x28ec0008, +0x7c434000, +0x7c438000, +0x7c43c000, +0x96c00007, +0xcc000062, +0xcf412169, +0xcf81216a, +0xcfc1216b, +0x80000001, +0xcc01216c, +0x80000001, +0xcff50000, +0xcc00006b, +0x840003a2, +0x0e68003c, +0x9a800004, +0xc8280015, +0x80000001, +0xd040007f, +0x9680ffab, +0x7e024000, +0x8400023b, +0xc00e0002, +0xcc000041, +0x80000239, +0xccc1304a, +0x7c40c000, +0x7c410000, +0xc01e0001, +0x29240012, +0xc0220002, +0x96400005, +0xc0260004, +0xc027fffb, +0x7d25000b, +0xc0260000, +0x7dd2800b, +0x7e12c00b, +0x7d25000c, +0x7c414000, +0x7c418000, +0xccc12169, +0x9a80000a, +0xcd01216a, +0xcd41216b, +0x96c0fe82, +0xcd81216c, +0xc8300018, +0x97000000, +0xc8300018, +0x80000001, +0xcc000018, +0x840003a2, +0xcc00007f, +0xc8140013, +0xc8180014, +0xcd41216b, +0x96c0fe76, +0xcd81216c, +0x80000182, +0xc8300018, +0xc80c0008, +0x98c00000, +0xc80c0008, +0x7c410000, +0x95000002, +0x00000000, +0x7c414000, +0xc8200009, +0xcc400043, +0xce01a1f4, +0xcc400044, +0xc00e8000, +0x7c424000, +0x7c428000, +0x2aac001f, +0x96c0fe63, +0xc035f000, +0xce4003e2, +0x32780003, +0x267c0008, +0x7ff7c00b, +0x7ffbc00c, +0x2a780018, +0xcfc003e3, +0xcf8003e4, +0x26b00002, +0x7f3f0000, +0xcf0003e5, +0x8000031f, +0x7c80c000, +0x7c40c000, +0x28d00008, +0x3110000f, +0x9500000f, +0x25280001, +0x06a801b3, +0x9e800000, +0x00000000, +0x800001d4, +0xc0120800, +0x800001e2, +0xc814000f, +0x800001e9, +0xc8140010, +0x800001f0, +0xccc1a2a4, +0x800001f9, +0xc8140011, +0x30d0003f, +0x0d280015, +0x9a800012, +0x0d28001e, +0x9a80001e, +0x0d280020, +0x9a800023, +0x0d24000f, +0x0d280010, +0x7e6a800c, +0x9a800026, +0x0d200004, +0x0d240014, +0x0d280028, +0x7e62400c, +0x7ea6800c, +0x9a80002a, +0xc8140011, +0x80000001, +0xccc1a2a4, +0xc0120800, +0x7c414000, +0x7d0cc00c, +0xc0120008, +0x29580003, +0x295c000c, +0x7c420000, +0x7dd1c00b, +0x26200014, +0x7e1e400c, +0x7e4e800c, +0xce81a2a4, +0x80000001, +0xcd81a1fe, +0xc814000f, +0x0410210e, +0x95400000, +0xc814000f, +0xd0510000, +0x80000001, +0xccc1a2a4, +0xc8140010, +0x04102108, +0x95400000, +0xc8140010, +0xd0510000, +0x80000001, +0xccc1a2a4, +0xccc1a2a4, +0x04100001, +0xcd000019, +0x840003a2, +0xcc00007f, +0xc8100019, +0x99000000, +0xc8100019, +0x80000002, +0x7c408000, +0x04102100, +0x09540001, +0x9540ffff, +0xc8140011, +0xd0510000, +0x8000039f, +0xccc1a2a4, +0x7c40c000, +0xcc40000d, +0x94c0fdff, +0xcc40000e, +0x7c410000, +0x95000005, +0x08cc0001, +0xc8140005, +0x99400014, +0x00000000, +0x98c0fffb, +0x7c410000, +0x80000002, +0x7d008000, +0xc8140005, +0x7c40c000, +0x9940000c, +0xc818000c, +0x7c410000, +0x9580fdee, +0xc820000e, +0xc81c000d, +0x66200020, +0x7e1e002c, +0x25240002, +0x7e624020, +0x80000001, +0xcce60000, +0x7c410000, +0xcc00006c, +0xcc00006d, +0xc818001f, +0xc81c001e, +0x65980020, +0x7dd9c02c, +0x7cd4c00c, +0xccde0000, +0x45dc0004, +0xc8280017, +0x9680000f, +0xc00e0001, +0x28680008, +0x2aac0016, +0x32a800ff, +0x0eb00049, +0x7f2f000b, +0x97000006, +0x00000000, +0xc8140005, +0x7c40c000, +0x80000223, +0x7c410000, +0x80000226, +0xd040007f, +0x8400023b, +0xcc000041, +0xccc1304a, +0x94000000, +0xc83c001a, +0x043c0005, +0xcfc1a2a4, +0xc0361f90, +0xc0387fff, +0x7c03c010, +0x7f7b400c, +0xcf41217c, +0xcfc1217d, +0xcc01217e, +0xc03a0004, +0x0434217f, +0x7f7b400c, +0xcc350000, +0xc83c0004, +0x2bfc001f, +0x04380020, +0x97c00005, +0xcc000062, +0x9b800000, +0x0bb80001, +0x80000247, +0xcc000071, +0xcc01a1f4, +0x04380016, +0xc0360002, +0xcf81a2a4, +0x88000000, +0xcf412010, +0x7c40c000, +0x28d0001c, +0x95000005, +0x04d40001, +0xcd400065, +0x80000001, +0xcd400068, +0x09540002, +0x80000001, +0xcd400066, +0x8400026c, +0xc81803ea, +0x7c40c000, +0x9980fd9d, +0xc8140016, +0x08d00001, +0x9940002b, +0xcd000068, +0x7c408000, +0xa0000000, +0xcc800062, +0x043c0005, +0xcfc1a2a4, +0xcc01a1f4, +0x840003a2, +0xcc000046, +0x88000000, +0xcc00007f, +0x8400027e, +0xc81803ea, +0x7c40c000, +0x9980fd8b, +0xc8140016, +0x08d00001, +0x99400019, +0xcd000068, +0x7c408000, +0xa0000000, +0xcc800062, +0x043c0022, +0xcfc1a2a4, +0x840003a2, +0xcc000047, +0x88000000, +0xcc00007f, +0xc8100016, +0x9900000d, +0xcc400067, +0x80000002, +0x7c408000, +0xc81803ea, +0x9980fd77, +0x7c40c000, +0x94c00003, +0xc8100016, +0x99000004, +0xccc00068, +0x80000002, +0x7c408000, +0x8400023b, +0xc0148000, +0xcc000041, +0xcd41304a, +0xc0148000, +0x99000000, +0xc8100016, +0x80000002, +0x7c408000, +0xc0120001, +0x7c51400c, +0x80000001, +0xd0550000, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0x291c001f, +0xccc0004a, +0xcd00004b, +0x95c00003, +0xc01c8000, +0xcdc12010, +0xdd830000, +0x055c2000, +0xcc000062, +0x80000001, +0xd81f4100, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0xccc0004c, +0xcd00004d, +0xdd830000, +0x055ca000, +0x80000001, +0xd81f4100, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0xccc0004e, +0xcd00004f, +0xdd830000, +0x055cc000, +0x80000001, +0xd81f4100, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0xccc00050, +0xcd000051, +0xdd830000, +0x055cf8e0, +0x80000001, +0xd81f4100, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0xccc00052, +0xcd000053, +0xdd830000, +0x055cf880, +0x80000001, +0xd81f4100, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0xccc00054, +0xcd000055, +0xdd830000, +0x055ce000, +0x80000001, +0xd81f4100, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0xccc00056, +0xcd000057, +0xdd830000, +0x055cf000, +0x80000001, +0xd81f4100, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0xccc00058, +0xcd000059, +0xdd830000, +0x055cf3fc, +0x80000001, +0xd81f4100, +0xd0432000, +0x7c408000, +0xa0000000, +0xcc800062, +0xd043a000, +0x7c408000, +0xa0000000, +0xcc800062, +0xd043c000, +0x7c408000, +0xa0000000, +0xcc800062, +0xd043f8e0, +0x7c408000, +0xa0000000, +0xcc800062, +0xd043f880, +0x7c408000, +0xa0000000, +0xcc800062, +0xd043e000, +0x7c408000, +0xa0000000, +0xcc800062, +0xd043f000, +0x7c408000, +0xa0000000, +0xcc800062, +0xd043f3fc, +0x7c408000, +0xa0000000, +0xcc800062, +0xc81403e0, +0xcc430000, +0xcc430000, +0xcc430000, +0x7d45c000, +0xcdc30000, +0xd0430000, +0x7c408000, +0xa0000000, +0xcc800062, +0x7c40c000, +0xc81003e2, +0xc81403e5, +0xc81803e3, +0xc81c03e4, +0xcd812169, +0xcdc1216a, +0xccc1216b, +0xcc01216c, +0x04200004, +0x7da18000, +0x7d964002, +0x9640fcd7, +0xcd8003e3, +0x31280003, +0xc02df000, +0x25180008, +0x7dad800b, +0x7da9800c, +0x80000001, +0xcd8003e3, +0x308cffff, +0xd04d0000, +0x7c408000, +0xa0000000, +0xcc800062, +0x7c40c000, +0x7c410000, +0x29240018, +0x32640001, +0x9a400013, +0xc8140020, +0x15580002, +0x9580ffff, +0xc8140020, +0xcc00006e, +0xccc12180, +0xcd01218d, +0xcc412181, +0x2914001f, +0x34588000, +0xcd81218c, +0x9540fcb9, +0xcc412182, +0xc8140020, +0x9940ffff, +0xc8140020, +0x80000002, +0x7c408000, +0x7c414000, +0x7c418000, +0x7c41c000, +0x65b40020, +0x7f57402c, +0xd4378100, +0x47740004, +0xd4378100, +0x47740004, +0xd4378100, +0x47740004, +0x09dc0004, +0xd4378100, +0x99c0fff8, +0x47740004, +0x2924001f, +0xc0380019, +0x9640fca1, +0xc03e0004, +0xcf8121f8, +0x37e021f9, +0xcc210000, +0xc8200004, +0x2a200018, +0x32200001, +0x9a00fffb, +0xcf8121f8, +0x80000002, +0x7c408000, +0x7c40c000, +0x28d00018, +0x31100001, +0xc0160080, +0x95000003, +0xc02a0004, +0x7cd4c00c, +0xccc1217c, +0xcc41217d, +0xcc41217e, +0x7c418000, +0x1db00003, +0x36a0217f, +0x9b000003, +0x419c0005, +0x041c0040, +0x99c00000, +0x09dc0001, +0xcc210000, +0xc8240004, +0x2a6c001f, +0x419c0005, +0x9ac0fffa, +0xcc800062, +0x80000002, +0x7c408000, +0x7c40c000, +0x04d403e6, +0x80000001, +0xcc540000, +0x8000039f, +0xcc4003ea, +0xc01c8000, +0x044ca000, +0xcdc12010, +0x7c410000, +0xc8140009, +0x04180000, +0x041c0008, +0xcd800071, +0x09dc0001, +0x05980001, +0xcd0d0000, +0x99c0fffc, +0xcc800062, +0x8000039f, +0xcd400071, +0xc00e0100, +0xcc000041, +0xccc1304a, +0xc83c007f, +0xcc00007f, +0x80000001, +0xcc00007f, +0xcc00007f, +0x88000000, +0xcc00007f, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00010333, +0x00100004, +0x00170006, +0x00210008, +0x00270028, +0x00280023, +0x00290029, +0x002a0026, +0x002b0029, +0x002d0038, +0x002e003f, +0x002f004a, +0x0034004c, +0x00360030, +0x003900af, +0x003a00d0, +0x003b00e5, +0x003c00fd, +0x003d016c, +0x003f00ad, +0x00410338, +0x0043036c, +0x0044018f, +0x004500fd, +0x004601ad, +0x004701ad, +0x00480200, +0x0049020e, +0x004a0257, +0x004b0284, +0x00520261, +0x00530273, +0x00540289, +0x0057029b, +0x0060029f, +0x006102ae, +0x006202b8, +0x006302c2, +0x006402cc, +0x006502d6, +0x006602e0, +0x006702ea, +0x006802f4, +0x006902f8, +0x006a02fc, +0x006b0300, +0x006c0304, +0x006d0308, +0x006e030c, +0x006f0310, +0x00700314, +0x00720386, +0x0074038c, +0x0079038a, +0x007c031e, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +0x000f039b, +}; + +static const u32 RV770_pfp_microcode[]={ +0x7c408000, +0xa0000000, +0x7e82800b, +0x80000000, +0xdc030000, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xc818000e, +0x31980001, +0x7c424000, +0x95800252, +0x7c428000, +0xc81c001c, +0xc037c000, +0x7c40c000, +0x7c410000, +0x7cb4800b, +0xc0360003, +0x99c00000, +0xc81c001c, +0x7cb4800c, +0x24d40002, +0x7d654000, +0xcd400043, +0xce800043, +0xcd000043, +0xcc800040, +0xce400040, +0xce800040, +0xccc00040, +0xdc3a0000, +0x9780ffde, +0xcd000040, +0x7c40c000, +0x80000018, +0x7c410000, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xc818000e, +0x8000000c, +0x31980002, +0xd40003c0, +0xd4000fc0, +0xd4000fa2, +0xc818000e, +0x288c0008, +0x30cc000f, +0x34100001, +0x7d0d0008, +0x8000000c, +0x7d91800b, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xd40003c0, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xcc4003f9, +0x80000261, +0xcc4003f8, +0xc82003f8, +0xc81c03f9, +0xc81803fb, +0xc037ffff, +0x7c414000, +0xcf41a29e, +0x66200020, +0x7de1c02c, +0x7d58c008, +0x7cdcc020, +0x68d00020, +0xc0360003, +0xcc000054, +0x7cb4800c, +0x8000006a, +0xcc800040, +0x7c418000, +0xcd81a29e, +0xcc800040, +0xcd800040, +0x80000068, +0xcc000054, +0xc019ffff, +0xcc800040, +0xcd81a29e, +0x7c40c000, +0x7c410000, +0x7c414000, +0xccc1a1fa, +0xcd01a1f9, +0xcd41a29d, +0xccc00040, +0xcd000040, +0xcd400040, +0xcc400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xcc000054, +0xcc800040, +0x7c40c000, +0x7c410000, +0x7c414000, +0xccc1a1fa, +0xcd01a1f9, +0xcd41a29d, +0xccc00040, +0xcd000040, +0xcd400040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0x7c40c000, +0x30d00001, +0xccc1a29f, +0x95000003, +0x04140001, +0x04140002, +0xcd4003fb, +0xcc800040, +0x80000000, +0xccc00040, +0x7c40c000, +0xcc800040, +0xccc1a2a2, +0x80000000, +0xccc00040, +0x7c40c000, +0x28d4001f, +0xcc800040, +0x95400003, +0x7c410000, +0xccc00057, +0x2918001f, +0xccc00040, +0x95800003, +0xcd000040, +0xcd000058, +0x80000261, +0xcc00007f, +0xc8200017, +0xc8300022, +0x9a000006, +0x0e280001, +0xc824001e, +0x0a640001, +0xd4001240, +0xce400040, +0xc036c000, +0x96800007, +0x37747900, +0x041c0001, +0xcf400040, +0xcdc00040, +0xcf0003fa, +0x7c030000, +0xca0c0010, +0x7c410000, +0x94c00004, +0x7c414000, +0xd42002c4, +0xcde00044, +0x9b00000b, +0x7c418000, +0xcc00004b, +0xcda00049, +0xcd200041, +0xcd600041, +0xcda00041, +0x06200001, +0xce000056, +0x80000261, +0xcc00007f, +0xc8280020, +0xc82c0021, +0xcc000063, +0x7eea4001, +0x65740020, +0x7f53402c, +0x269c0002, +0x7df5c020, +0x69f80020, +0xce80004b, +0xce600049, +0xcde00041, +0xcfa00041, +0xce600041, +0x271c0002, +0x7df5c020, +0x69f80020, +0x7db24001, +0xcf00004b, +0xce600049, +0xcde00041, +0xcfa00041, +0x800000bd, +0xce600041, +0xc8200017, +0xc8300022, +0x9a000006, +0x0e280001, +0xc824001e, +0x0a640001, +0xd4001240, +0xce400040, +0xca0c0010, +0x7c410000, +0x94c0000b, +0xc036c000, +0x96800007, +0x37747900, +0x041c0001, +0xcf400040, +0xcdc00040, +0xcf0003fa, +0x7c030000, +0x800000b6, +0x7c414000, +0xcc000048, +0x800000ef, +0x00000000, +0xc8200017, +0xc81c0023, +0x0e240002, +0x99c00015, +0x7c418000, +0x0a200001, +0xce000056, +0xd4000440, +0xcc000040, +0xc036c000, +0xca140013, +0x96400007, +0x37747900, +0xcf400040, +0xcc000040, +0xc83003fa, +0x80000104, +0xcf000022, +0xcc000022, +0x9540015d, +0xcc00007f, +0xcca00046, +0x80000000, +0xcc200046, +0x80000261, +0xcc000064, +0xc8200017, +0xc810001f, +0x96000005, +0x09100001, +0xd4000440, +0xcd000040, +0xcd000022, +0xcc800040, +0xd0400040, +0xc80c0025, +0x94c0feeb, +0xc8100008, +0xcd000040, +0xd4000fc0, +0x80000000, +0xd4000fa2, +0x7c40c000, +0x7c410000, +0xccc003fd, +0xcd0003fc, +0xccc00042, +0xcd000042, +0x2914001f, +0x29180010, +0x31980007, +0x3b5c0001, +0x7d76000b, +0x99800005, +0x7d5e400b, +0xcc000042, +0x80000261, +0xcc00004d, +0x29980001, +0x292c0008, +0x9980003d, +0x32ec0001, +0x96000004, +0x2930000c, +0x80000261, +0xcc000042, +0x04140010, +0xcd400042, +0x33300001, +0x34280001, +0x8400015e, +0xc8140003, +0x9b40001b, +0x0438000c, +0x8400015e, +0xc8140003, +0x9b400017, +0x04380008, +0x8400015e, +0xc8140003, +0x9b400013, +0x04380004, +0x8400015e, +0xc8140003, +0x9b400015, +0xc80c03fd, +0x9a800009, +0xc81003fc, +0x9b000118, +0xcc00004d, +0x04140010, +0xccc00042, +0xcd000042, +0x80000136, +0xcd400042, +0x96c00111, +0xcc00004d, +0x80000261, +0xcc00004e, +0x9ac00003, +0xcc00004d, +0xcc00004e, +0xdf830000, +0x80000000, +0xd80301ff, +0x9ac00107, +0xcc00004d, +0x80000261, +0xcc00004e, +0xc8180003, +0xc81c0003, +0xc8200003, +0x7d5d4003, +0x7da1c003, +0x7d5d400c, +0x2a10001f, +0x299c001f, +0x7d1d000b, +0x7d17400b, +0x88000000, +0x7e92800b, +0x96400004, +0xcc00004e, +0x80000261, +0xcc000042, +0x04380008, +0xcf800042, +0xc8080003, +0xc80c0003, +0xc8100003, +0xc8140003, +0xc8180003, +0xc81c0003, +0xc8240003, +0xc8280003, +0x29fc001f, +0x2ab0001f, +0x7ff3c00b, +0x28f0001f, +0x7ff3c00b, +0x2970001f, +0x7ff3c00b, +0x7d888001, +0x7dccc001, +0x7e510001, +0x7e954001, +0x7c908002, +0x7cd4c002, +0x7cbc800b, +0x9ac00003, +0x7c8f400b, +0x38b40001, +0x9b4000d8, +0xcc00004d, +0x9bc000d6, +0xcc00004e, +0xc80c03fd, +0xc81003fc, +0xccc00042, +0x8000016f, +0xcd000042, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xcc400040, +0xcc400040, +0xcc400040, +0x7c40c000, +0xccc00040, +0xccc0000d, +0x80000000, +0xd0400040, +0x7c40c000, +0x7c410000, +0x65140020, +0x7d4d402c, +0x24580002, +0x7d598020, +0x7c41c000, +0xcd800042, +0x69980020, +0xcd800042, +0xcdc00042, +0xc023c000, +0x05e40002, +0x7ca0800b, +0x26640010, +0x7ca4800c, +0xcc800040, +0xcdc00040, +0xccc00040, +0x95c0000e, +0xcd000040, +0x09dc0001, +0xc8280003, +0x96800008, +0xce800040, +0xc834001d, +0x97400000, +0xc834001d, +0x26a80008, +0x84000264, +0xcc2b0000, +0x99c0fff7, +0x09dc0001, +0xdc3a0000, +0x97800004, +0x7c418000, +0x800001a3, +0x25980002, +0xa0000000, +0x7d808000, +0xc818001d, +0x7c40c000, +0x64d00008, +0x95800000, +0xc818001d, +0xcc130000, +0xcc800040, +0xccc00040, +0x80000000, +0xcc400040, +0xc810001f, +0x7c40c000, +0xcc800040, +0x7cd1400c, +0xcd400040, +0x05180001, +0x80000000, +0xcd800022, +0x7c40c000, +0x64500020, +0x84000264, +0xcc000061, +0x7cd0c02c, +0xc8200017, +0xc8d60000, +0x99400008, +0x7c438000, +0xdf830000, +0xcfa0004f, +0x84000264, +0xcc000062, +0x80000000, +0xd040007f, +0x80000261, +0xcc000062, +0x84000264, +0xcc000061, +0xc8200017, +0x7c40c000, +0xc036ff00, +0xc810000d, +0xc0303fff, +0x7cf5400b, +0x7d51800b, +0x7d81800f, +0x99800008, +0x7cf3800b, +0xdf830000, +0xcfa0004f, +0x84000264, +0xcc000062, +0x80000000, +0xd040007f, +0x80000261, +0xcc000062, +0x84000264, +0x7c40c000, +0x28dc0008, +0x95c00019, +0x30dc0010, +0x7c410000, +0x99c00004, +0x64540020, +0x80000209, +0xc91d0000, +0x7d15002c, +0xc91e0000, +0x7c420000, +0x7c424000, +0x7c418000, +0x7de5c00b, +0x7de28007, +0x9a80000e, +0x41ac0005, +0x9ac00000, +0x0aec0001, +0x30dc0010, +0x99c00004, +0x00000000, +0x8000020c, +0xc91d0000, +0x8000020c, +0xc91e0000, +0xcc800040, +0xccc00040, +0xd0400040, +0xc80c0025, +0x94c0fde3, +0xc8100008, +0xcd000040, +0xd4000fc0, +0x80000000, +0xd4000fa2, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xd40003c0, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0x7c40c000, +0x30d00006, +0x0d100006, +0x99000007, +0xc8140015, +0x99400005, +0xcc000052, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xccc00040, +0x80000000, +0xd0400040, +0x7c40c000, +0xcc4d0000, +0xdc3a0000, +0x9780fdbc, +0x04cc0001, +0x80000243, +0xcc4d0000, +0x7c40c000, +0x7c410000, +0x29240018, +0x32640001, +0x9640000f, +0xcc800040, +0x7c414000, +0x7c418000, +0x7c41c000, +0xccc00043, +0xcd000043, +0x31dc7fff, +0xcdc00043, +0xccc00040, +0xcd000040, +0xcd400040, +0xcd800040, +0x80000000, +0xcdc00040, +0xccc00040, +0xcd000040, +0x80000000, +0xd0400040, +0x80000000, +0xd040007f, +0xcc00007f, +0x80000000, +0xcc00007f, +0xcc00007f, +0x88000000, +0xcc00007f, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00030223, +0x0004022b, +0x000500a0, +0x00020003, +0x0006003c, +0x00070027, +0x00080192, +0x00090044, +0x000a002d, +0x0010025f, +0x001700f1, +0x002201d8, +0x002301e9, +0x0026004c, +0x0027005f, +0x0020011b, +0x00280093, +0x0029004f, +0x002a0084, +0x002b0065, +0x002f008e, +0x003200d9, +0x00340233, +0x00360075, +0x0039010b, +0x003c01fd, +0x003f00a0, +0x00410248, +0x00440195, +0x0048019e, +0x004901c6, +0x004a01d0, +0x00550226, +0x0056022e, +0x0060000a, +0x0061002a, +0x00620030, +0x00630030, +0x00640030, +0x00650030, +0x00660030, +0x00670030, +0x00680037, +0x0069003f, +0x006a0047, +0x006b0047, +0x006c0047, +0x006d0047, +0x006e0047, +0x006f0047, +0x00700047, +0x0073025f, +0x007b0241, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +}; + +static const u32 RV730_pfp_microcode[]={ +0x7c408000, +0xa0000000, +0x7e82800b, +0x80000000, +0xdc030000, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xc818000e, +0x31980001, +0x7c424000, +0x9580023a, +0x7c428000, +0xc81c001c, +0xc037c000, +0x7c40c000, +0x7c410000, +0x7cb4800b, +0xc0360003, +0x99c00000, +0xc81c001c, +0x7cb4800c, +0x24d40002, +0x7d654000, +0xcd400043, +0xce800043, +0xcd000043, +0xcc800040, +0xce400040, +0xce800040, +0xccc00040, +0xdc3a0000, +0x9780ffde, +0xcd000040, +0x7c40c000, +0x80000018, +0x7c410000, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xc818000e, +0x8000000c, +0x31980002, +0xd40003c0, +0xd4000fc0, +0xd4000fa2, +0xc818000e, +0x288c0008, +0x30cc000f, +0x34100001, +0x7d0d0008, +0x8000000c, +0x7d91800b, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xd40003c0, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xcc4003f9, +0x80000249, +0xcc4003f8, +0xc037ffff, +0x7c414000, +0xcf41a29e, +0xc82003f8, +0xc81c03f9, +0x66200020, +0xc81803fb, +0x7de1c02c, +0x7d58c008, +0x7cdcc020, +0x69100020, +0xc0360003, +0xcc000054, +0x7cb4800c, +0x80000069, +0xcc800040, +0x7c418000, +0xcd81a29e, +0xcc800040, +0x80000067, +0xcd800040, +0xc019ffff, +0xcc800040, +0xcd81a29e, +0x7c40c000, +0x7c410000, +0x7c414000, +0xccc1a1fa, +0xcd01a1f9, +0xcd41a29d, +0xccc00040, +0xcd000040, +0xcd400040, +0xcc400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xcc000054, +0xcc800040, +0x7c40c000, +0x7c410000, +0x7c414000, +0xccc1a1fa, +0xcd01a1f9, +0xcd41a29d, +0xccc00040, +0xcd000040, +0xcd400040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0x7c40c000, +0x30d00001, +0xccc1a29f, +0x95000003, +0x04140001, +0x04140002, +0xcd4003fb, +0xcc800040, +0x80000000, +0xccc00040, +0x7c40c000, +0xcc800040, +0xccc1a2a2, +0x80000000, +0xccc00040, +0x7c40c000, +0x28d4001f, +0xcc800040, +0x95400003, +0x7c410000, +0xccc00057, +0x2918001f, +0xccc00040, +0x95800003, +0xcd000040, +0xcd000058, +0x80000249, +0xcc00007f, +0xc8200017, +0xc8300022, +0x9a000006, +0x0e280001, +0xc824001e, +0x0a640001, +0xd4001240, +0xce400040, +0xc036c000, +0x96800007, +0x37747900, +0x041c0001, +0xcf400040, +0xcdc00040, +0xcf0003fa, +0x7c030000, +0xca0c0010, +0x7c410000, +0x94c00004, +0x7c414000, +0xd42002c4, +0xcde00044, +0x9b00000b, +0x7c418000, +0xcc00004b, +0xcda00049, +0xcd200041, +0xcd600041, +0xcda00041, +0x06200001, +0xce000056, +0x80000249, +0xcc00007f, +0xc8280020, +0xc82c0021, +0xcc000063, +0x7eea4001, +0x65740020, +0x7f53402c, +0x269c0002, +0x7df5c020, +0x69f80020, +0xce80004b, +0xce600049, +0xcde00041, +0xcfa00041, +0xce600041, +0x271c0002, +0x7df5c020, +0x69f80020, +0x7db24001, +0xcf00004b, +0xce600049, +0xcde00041, +0xcfa00041, +0x800000bc, +0xce600041, +0xc8200017, +0xc8300022, +0x9a000006, +0x0e280001, +0xc824001e, +0x0a640001, +0xd4001240, +0xce400040, +0xca0c0010, +0x7c410000, +0x94c0000b, +0xc036c000, +0x96800007, +0x37747900, +0x041c0001, +0xcf400040, +0xcdc00040, +0xcf0003fa, +0x7c030000, +0x800000b5, +0x7c414000, +0xcc000048, +0x800000ee, +0x00000000, +0xc8200017, +0xc81c0023, +0x0e240002, +0x99c00015, +0x7c418000, +0x0a200001, +0xce000056, +0xd4000440, +0xcc000040, +0xc036c000, +0xca140013, +0x96400007, +0x37747900, +0xcf400040, +0xcc000040, +0xc83003fa, +0x80000103, +0xcf000022, +0xcc000022, +0x95400146, +0xcc00007f, +0xcca00046, +0x80000000, +0xcc200046, +0x80000249, +0xcc000064, +0xc8200017, +0xc810001f, +0x96000005, +0x09100001, +0xd4000440, +0xcd000040, +0xcd000022, +0xcc800040, +0xd0400040, +0xc80c0025, +0x94c0feec, +0xc8100008, +0xcd000040, +0xd4000fc0, +0x80000000, +0xd4000fa2, +0x7c40c000, +0x7c410000, +0xccc003fd, +0xcd0003fc, +0xccc00042, +0xcd000042, +0x2914001f, +0x29180010, +0x31980007, +0x3b5c0001, +0x7d76000b, +0x99800005, +0x7d5e400b, +0xcc000042, +0x80000249, +0xcc00004d, +0x29980001, +0x292c0008, +0x9980003d, +0x32ec0001, +0x96000004, +0x2930000c, +0x80000249, +0xcc000042, +0x04140010, +0xcd400042, +0x33300001, +0x34280001, +0x8400015d, +0xc8140003, +0x9b40001b, +0x0438000c, +0x8400015d, +0xc8140003, +0x9b400017, +0x04380008, +0x8400015d, +0xc8140003, +0x9b400013, +0x04380004, +0x8400015d, +0xc8140003, +0x9b400015, +0xc80c03fd, +0x9a800009, +0xc81003fc, +0x9b000101, +0xcc00004d, +0x04140010, +0xccc00042, +0xcd000042, +0x80000135, +0xcd400042, +0x96c000fa, +0xcc00004d, +0x80000249, +0xcc00004e, +0x9ac00003, +0xcc00004d, +0xcc00004e, +0xdf830000, +0x80000000, +0xd80301ff, +0x9ac000f0, +0xcc00004d, +0x80000249, +0xcc00004e, +0xc8180003, +0xc81c0003, +0xc8200003, +0x7d5d4003, +0x7da1c003, +0x7d5d400c, +0x2a10001f, +0x299c001f, +0x7d1d000b, +0x7d17400b, +0x88000000, +0x7e92800b, +0x96400004, +0xcc00004e, +0x80000249, +0xcc000042, +0x04380008, +0xcf800042, +0xc8080003, +0xc80c0003, +0xc8100003, +0xc8140003, +0xc8180003, +0xc81c0003, +0xc8240003, +0xc8280003, +0x29fc001f, +0x2ab0001f, +0x7ff3c00b, +0x28f0001f, +0x7ff3c00b, +0x2970001f, +0x7ff3c00b, +0x7d888001, +0x7dccc001, +0x7e510001, +0x7e954001, +0x7c908002, +0x7cd4c002, +0x7cbc800b, +0x9ac00003, +0x7c8f400b, +0x38b40001, +0x9b4000c1, +0xcc00004d, +0x9bc000bf, +0xcc00004e, +0xc80c03fd, +0xc81003fc, +0xccc00042, +0x8000016e, +0xcd000042, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xcc400040, +0xcc400040, +0xcc400040, +0x7c40c000, +0xccc00040, +0xccc0000d, +0x80000000, +0xd0400040, +0x7c40c000, +0x7c410000, +0x65140020, +0x7d4d402c, +0x24580002, +0x7d598020, +0x7c41c000, +0xcd800042, +0x69980020, +0xcd800042, +0xcdc00042, +0xc023c000, +0x05e40002, +0x7ca0800b, +0x26640010, +0x7ca4800c, +0xcc800040, +0xcdc00040, +0xccc00040, +0x95c0000e, +0xcd000040, +0x09dc0001, +0xc8280003, +0x96800008, +0xce800040, +0xc834001d, +0x97400000, +0xc834001d, +0x26a80008, +0x8400024c, +0xcc2b0000, +0x99c0fff7, +0x09dc0001, +0xdc3a0000, +0x97800004, +0x7c418000, +0x800001a2, +0x25980002, +0xa0000000, +0x7d808000, +0xc818001d, +0x7c40c000, +0x64d00008, +0x95800000, +0xc818001d, +0xcc130000, +0xcc800040, +0xccc00040, +0x80000000, +0xcc400040, +0xc810001f, +0x7c40c000, +0xcc800040, +0x7cd1400c, +0xcd400040, +0x05180001, +0x80000000, +0xcd800022, +0x7c40c000, +0x64500020, +0x8400024c, +0xcc000061, +0x7cd0c02c, +0xc8200017, +0xc8d60000, +0x99400008, +0x7c438000, +0xdf830000, +0xcfa0004f, +0x8400024c, +0xcc000062, +0x80000000, +0xd040007f, +0x80000249, +0xcc000062, +0x8400024c, +0xcc000061, +0xc8200017, +0x7c40c000, +0xc036ff00, +0xc810000d, +0xc0303fff, +0x7cf5400b, +0x7d51800b, +0x7d81800f, +0x99800008, +0x7cf3800b, +0xdf830000, +0xcfa0004f, +0x8400024c, +0xcc000062, +0x80000000, +0xd040007f, +0x80000249, +0xcc000062, +0x8400024c, +0x7c40c000, +0x28dc0008, +0x95c00019, +0x30dc0010, +0x7c410000, +0x99c00004, +0x64540020, +0x80000208, +0xc91d0000, +0x7d15002c, +0xc91e0000, +0x7c420000, +0x7c424000, +0x7c418000, +0x7de5c00b, +0x7de28007, +0x9a80000e, +0x41ac0005, +0x9ac00000, +0x0aec0001, +0x30dc0010, +0x99c00004, +0x00000000, +0x8000020b, +0xc91d0000, +0x8000020b, +0xc91e0000, +0xcc800040, +0xccc00040, +0xd0400040, +0xc80c0025, +0x94c0fde4, +0xc8100008, +0xcd000040, +0xd4000fc0, +0x80000000, +0xd4000fa2, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xd40003c0, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0x7c40c000, +0x30d00006, +0x0d100006, +0x99000007, +0xc8140015, +0x99400005, +0xcc000052, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xccc00040, +0x80000000, +0xd0400040, +0x7c40c000, +0xcc4d0000, +0xdc3a0000, +0x9780fdbd, +0x04cc0001, +0x80000242, +0xcc4d0000, +0x80000000, +0xd040007f, +0xcc00007f, +0x80000000, +0xcc00007f, +0xcc00007f, +0x88000000, +0xcc00007f, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00030222, +0x0004022a, +0x0005009f, +0x00020003, +0x0006003c, +0x00070027, +0x00080191, +0x00090044, +0x000a002d, +0x00100247, +0x001700f0, +0x002201d7, +0x002301e8, +0x0026004c, +0x0027005f, +0x0020011a, +0x00280092, +0x0029004f, +0x002a0083, +0x002b0064, +0x002f008d, +0x003200d8, +0x00340232, +0x00360074, +0x0039010a, +0x003c01fc, +0x003f009f, +0x00410005, +0x00440194, +0x0048019d, +0x004901c5, +0x004a01cf, +0x00550225, +0x0056022d, +0x0060000a, +0x0061002a, +0x00620030, +0x00630030, +0x00640030, +0x00650030, +0x00660030, +0x00670030, +0x00680037, +0x0069003f, +0x006a0047, +0x006b0047, +0x006c0047, +0x006d0047, +0x006e0047, +0x006f0047, +0x00700047, +0x00730247, +0x007b0240, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +}; + +static const u32 RV730_cp_microcode[]={ +0xcc0003ea, +0x7c408000, +0xa0000000, +0xcc800062, +0x80000001, +0xd040007f, +0x80000001, +0xcc400041, +0x7c40c000, +0xc0160004, +0x30d03fff, +0x7d15000c, +0xcc110000, +0x28d8001e, +0x31980001, +0x28dc001f, +0xc8200004, +0x95c00006, +0x7c424000, +0xcc000062, +0x7e56800c, +0xcc290000, +0xc8240004, +0x7e26000b, +0x95800006, +0x7c42c000, +0xcc000062, +0x7ed7000c, +0xcc310000, +0xc82c0004, +0x7e2e000c, +0xcc000062, +0x31103fff, +0x80000001, +0xce110000, +0x7c40c000, +0x80000001, +0xcc400040, +0x80000001, +0xcc412257, +0x7c418000, +0xcc400045, +0xcc400048, +0xcc41225c, +0xcc41a1fc, +0x7c408000, +0xa0000000, +0xcc800062, +0xcc400045, +0xcc400048, +0x7c40c000, +0xcc41225c, +0xcc41a1fc, +0x7c408000, +0xa0000000, +0xcc800062, +0xcc000045, +0xcc000048, +0xcc41225c, +0xcc41a1fc, +0x7c408000, +0xa0000000, +0xcc800062, +0x040ca1fd, +0xc0120001, +0xcc000045, +0xcc000048, +0x7cd0c00c, +0xcc41225c, +0xcc41a1fc, +0xd04d0000, +0x7c408000, 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+0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00010331, +0x00100004, +0x00170006, +0x00210008, +0x00270028, +0x00280023, +0x00290029, +0x002a0026, +0x002b0029, +0x002d0038, +0x002e003f, +0x002f004a, +0x0034004c, +0x00360030, +0x003900af, +0x003a00cf, +0x003b00e4, +0x003c00fc, +0x003d016b, +0x003f00ad, +0x00410336, +0x00430349, +0x0044018e, +0x004500fc, +0x004601ac, +0x004701ac, +0x004801fe, +0x0049020c, +0x004a0255, +0x004b0282, +0x0052025f, +0x00530271, +0x00540287, +0x00570299, +0x0060029d, +0x006102ac, +0x006202b6, +0x006302c0, +0x006402ca, +0x006502d4, +0x006602de, +0x006702e8, +0x006802f2, +0x006902f6, +0x006a02fa, +0x006b02fe, +0x006c0302, +0x006d0306, +0x006e030a, +0x006f030e, +0x00700312, +0x00720363, +0x00740369, +0x00790367, +0x007c031c, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +0x000f0378, +}; + +static const u32 RV710_pfp_microcode[]={ +0x7c408000, +0xa0000000, +0x7e82800b, +0x80000000, +0xdc030000, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xc818000e, +0x31980001, +0x7c424000, +0x9580023a, +0x7c428000, +0xc81c001c, +0xc037c000, +0x7c40c000, +0x7c410000, +0x7cb4800b, +0xc0360003, +0x99c00000, +0xc81c001c, +0x7cb4800c, +0x24d40002, +0x7d654000, +0xcd400043, +0xce800043, +0xcd000043, +0xcc800040, +0xce400040, +0xce800040, +0xccc00040, +0xdc3a0000, +0x9780ffde, +0xcd000040, +0x7c40c000, +0x80000018, +0x7c410000, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xc818000e, +0x8000000c, +0x31980002, +0xd40003c0, +0xd4000fc0, +0xd4000fa2, +0xc818000e, +0x288c0008, +0x30cc000f, +0x34100001, +0x7d0d0008, +0x8000000c, +0x7d91800b, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xd40003c0, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xcc4003f9, +0x80000249, +0xcc4003f8, +0xc037ffff, +0x7c414000, +0xcf41a29e, +0xc82003f8, +0xc81c03f9, +0x66200020, +0xc81803fb, +0x7de1c02c, +0x7d58c008, +0x7cdcc020, +0x69100020, +0xc0360003, +0xcc000054, +0x7cb4800c, +0x80000069, +0xcc800040, +0x7c418000, +0xcd81a29e, +0xcc800040, +0x80000067, +0xcd800040, +0xc019ffff, +0xcc800040, +0xcd81a29e, +0x7c40c000, +0x7c410000, +0x7c414000, +0xccc1a1fa, +0xcd01a1f9, +0xcd41a29d, +0xccc00040, +0xcd000040, +0xcd400040, +0xcc400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xcc000054, +0xcc800040, +0x7c40c000, +0x7c410000, +0x7c414000, +0xccc1a1fa, +0xcd01a1f9, +0xcd41a29d, +0xccc00040, +0xcd000040, +0xcd400040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0x7c40c000, +0x30d00001, +0xccc1a29f, +0x95000003, +0x04140001, +0x04140002, +0xcd4003fb, +0xcc800040, +0x80000000, +0xccc00040, +0x7c40c000, +0xcc800040, +0xccc1a2a2, +0x80000000, +0xccc00040, +0x7c40c000, +0x28d4001f, +0xcc800040, +0x95400003, +0x7c410000, +0xccc00057, +0x2918001f, +0xccc00040, +0x95800003, +0xcd000040, +0xcd000058, +0x80000249, +0xcc00007f, +0xc8200017, +0xc8300022, +0x9a000006, +0x0e280001, +0xc824001e, +0x0a640001, +0xd4001240, +0xce400040, +0xc036c000, +0x96800007, +0x37747900, +0x041c0001, +0xcf400040, +0xcdc00040, +0xcf0003fa, +0x7c030000, +0xca0c0010, +0x7c410000, +0x94c00004, +0x7c414000, +0xd42002c4, +0xcde00044, +0x9b00000b, +0x7c418000, +0xcc00004b, +0xcda00049, +0xcd200041, +0xcd600041, +0xcda00041, +0x06200001, +0xce000056, +0x80000249, +0xcc00007f, +0xc8280020, +0xc82c0021, +0xcc000063, +0x7eea4001, +0x65740020, +0x7f53402c, +0x269c0002, +0x7df5c020, +0x69f80020, +0xce80004b, +0xce600049, +0xcde00041, +0xcfa00041, +0xce600041, +0x271c0002, +0x7df5c020, +0x69f80020, +0x7db24001, +0xcf00004b, +0xce600049, +0xcde00041, +0xcfa00041, +0x800000bc, +0xce600041, +0xc8200017, +0xc8300022, +0x9a000006, +0x0e280001, +0xc824001e, +0x0a640001, +0xd4001240, +0xce400040, +0xca0c0010, +0x7c410000, +0x94c0000b, +0xc036c000, +0x96800007, +0x37747900, +0x041c0001, +0xcf400040, +0xcdc00040, +0xcf0003fa, +0x7c030000, +0x800000b5, +0x7c414000, +0xcc000048, +0x800000ee, +0x00000000, +0xc8200017, +0xc81c0023, +0x0e240002, +0x99c00015, +0x7c418000, +0x0a200001, +0xce000056, +0xd4000440, +0xcc000040, +0xc036c000, +0xca140013, +0x96400007, +0x37747900, +0xcf400040, +0xcc000040, +0xc83003fa, +0x80000103, +0xcf000022, +0xcc000022, +0x95400146, +0xcc00007f, +0xcca00046, +0x80000000, +0xcc200046, +0x80000249, +0xcc000064, +0xc8200017, +0xc810001f, +0x96000005, +0x09100001, +0xd4000440, +0xcd000040, +0xcd000022, +0xcc800040, +0xd0400040, +0xc80c0025, +0x94c0feec, +0xc8100008, +0xcd000040, +0xd4000fc0, +0x80000000, +0xd4000fa2, +0x7c40c000, +0x7c410000, +0xccc003fd, +0xcd0003fc, +0xccc00042, +0xcd000042, +0x2914001f, +0x29180010, +0x31980007, +0x3b5c0001, +0x7d76000b, +0x99800005, +0x7d5e400b, +0xcc000042, +0x80000249, +0xcc00004d, +0x29980001, +0x292c0008, +0x9980003d, +0x32ec0001, +0x96000004, +0x2930000c, +0x80000249, +0xcc000042, +0x04140010, +0xcd400042, +0x33300001, +0x34280001, +0x8400015d, +0xc8140003, +0x9b40001b, +0x0438000c, +0x8400015d, +0xc8140003, +0x9b400017, +0x04380008, +0x8400015d, +0xc8140003, +0x9b400013, +0x04380004, +0x8400015d, +0xc8140003, +0x9b400015, +0xc80c03fd, +0x9a800009, +0xc81003fc, +0x9b000101, +0xcc00004d, +0x04140010, +0xccc00042, +0xcd000042, +0x80000135, +0xcd400042, +0x96c000fa, +0xcc00004d, +0x80000249, +0xcc00004e, +0x9ac00003, +0xcc00004d, +0xcc00004e, +0xdf830000, +0x80000000, +0xd80301ff, +0x9ac000f0, +0xcc00004d, +0x80000249, +0xcc00004e, +0xc8180003, +0xc81c0003, +0xc8200003, +0x7d5d4003, +0x7da1c003, +0x7d5d400c, +0x2a10001f, +0x299c001f, +0x7d1d000b, +0x7d17400b, +0x88000000, +0x7e92800b, +0x96400004, +0xcc00004e, +0x80000249, +0xcc000042, +0x04380008, +0xcf800042, +0xc8080003, +0xc80c0003, +0xc8100003, +0xc8140003, +0xc8180003, +0xc81c0003, +0xc8240003, +0xc8280003, +0x29fc001f, +0x2ab0001f, +0x7ff3c00b, +0x28f0001f, +0x7ff3c00b, +0x2970001f, +0x7ff3c00b, +0x7d888001, +0x7dccc001, +0x7e510001, +0x7e954001, +0x7c908002, +0x7cd4c002, +0x7cbc800b, +0x9ac00003, +0x7c8f400b, +0x38b40001, +0x9b4000c1, +0xcc00004d, +0x9bc000bf, +0xcc00004e, +0xc80c03fd, +0xc81003fc, +0xccc00042, +0x8000016e, +0xcd000042, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xcc400040, +0xcc400040, +0xcc400040, +0x7c40c000, +0xccc00040, +0xccc0000d, +0x80000000, +0xd0400040, +0x7c40c000, +0x7c410000, +0x65140020, +0x7d4d402c, +0x24580002, +0x7d598020, +0x7c41c000, +0xcd800042, +0x69980020, +0xcd800042, +0xcdc00042, +0xc023c000, +0x05e40002, +0x7ca0800b, +0x26640010, +0x7ca4800c, +0xcc800040, +0xcdc00040, +0xccc00040, +0x95c0000e, +0xcd000040, +0x09dc0001, +0xc8280003, +0x96800008, +0xce800040, +0xc834001d, +0x97400000, +0xc834001d, +0x26a80008, +0x8400024c, +0xcc2b0000, +0x99c0fff7, +0x09dc0001, +0xdc3a0000, +0x97800004, +0x7c418000, +0x800001a2, +0x25980002, +0xa0000000, +0x7d808000, +0xc818001d, +0x7c40c000, +0x64d00008, +0x95800000, +0xc818001d, +0xcc130000, +0xcc800040, +0xccc00040, +0x80000000, +0xcc400040, +0xc810001f, +0x7c40c000, +0xcc800040, +0x7cd1400c, +0xcd400040, +0x05180001, +0x80000000, +0xcd800022, +0x7c40c000, +0x64500020, +0x8400024c, +0xcc000061, +0x7cd0c02c, +0xc8200017, +0xc8d60000, +0x99400008, +0x7c438000, +0xdf830000, +0xcfa0004f, +0x8400024c, +0xcc000062, +0x80000000, +0xd040007f, +0x80000249, +0xcc000062, +0x8400024c, +0xcc000061, +0xc8200017, +0x7c40c000, +0xc036ff00, +0xc810000d, +0xc0303fff, +0x7cf5400b, +0x7d51800b, +0x7d81800f, +0x99800008, +0x7cf3800b, +0xdf830000, +0xcfa0004f, +0x8400024c, +0xcc000062, +0x80000000, +0xd040007f, +0x80000249, +0xcc000062, +0x8400024c, +0x7c40c000, +0x28dc0008, +0x95c00019, +0x30dc0010, +0x7c410000, +0x99c00004, +0x64540020, +0x80000208, +0xc91d0000, +0x7d15002c, +0xc91e0000, +0x7c420000, +0x7c424000, +0x7c418000, +0x7de5c00b, +0x7de28007, +0x9a80000e, +0x41ac0005, +0x9ac00000, +0x0aec0001, +0x30dc0010, +0x99c00004, +0x00000000, +0x8000020b, +0xc91d0000, +0x8000020b, +0xc91e0000, +0xcc800040, +0xccc00040, +0xd0400040, +0xc80c0025, +0x94c0fde4, +0xc8100008, +0xcd000040, +0xd4000fc0, +0x80000000, +0xd4000fa2, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0xd40003c0, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xd0400040, +0x7c408000, +0xa0000000, +0x7e82800b, +0x7c40c000, +0x30d00006, +0x0d100006, +0x99000007, +0xc8140015, +0x99400005, +0xcc000052, +0xd4000340, +0xd4000fc0, +0xd4000fa2, +0xcc800040, +0xccc00040, +0x80000000, +0xd0400040, +0x7c40c000, +0xcc4d0000, +0xdc3a0000, +0x9780fdbd, +0x04cc0001, +0x80000242, +0xcc4d0000, +0x80000000, +0xd040007f, +0xcc00007f, +0x80000000, +0xcc00007f, +0xcc00007f, +0x88000000, +0xcc00007f, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00030222, +0x0004022a, +0x0005009f, +0x00020003, +0x0006003c, +0x00070027, +0x00080191, +0x00090044, +0x000a002d, +0x00100247, +0x001700f0, +0x002201d7, +0x002301e8, +0x0026004c, +0x0027005f, +0x0020011a, +0x00280092, +0x0029004f, +0x002a0083, +0x002b0064, +0x002f008d, +0x003200d8, +0x00340232, +0x00360074, +0x0039010a, +0x003c01fc, +0x003f009f, +0x00410005, +0x00440194, +0x0048019d, +0x004901c5, +0x004a01cf, +0x00550225, +0x0056022d, +0x0060000a, +0x0061002a, +0x00620030, +0x00630030, +0x00640030, +0x00650030, +0x00660030, +0x00670030, +0x00680037, +0x0069003f, +0x006a0047, +0x006b0047, +0x006c0047, +0x006d0047, +0x006e0047, +0x006f0047, +0x00700047, +0x00730247, +0x007b0240, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +0x00000005, +}; + +static const u32 RV710_cp_microcode[]={ +0xcc0003ea, +0x04080003, +0xcc800043, +0x7c408000, +0xa0000000, +0xcc800062, +0x80000003, +0xd040007f, +0x80000003, +0xcc400041, +0x7c40c000, +0xc0160004, +0x30d03fff, +0x7d15000c, +0xcc110000, +0x28d8001e, +0x31980001, +0x28dc001f, +0xc8200004, +0x95c00006, +0x7c424000, +0xcc000062, +0x7e56800c, +0xcc290000, +0xc8240004, +0x7e26000b, +0x95800006, +0x7c42c000, +0xcc000062, +0x7ed7000c, +0xcc310000, +0xc82c0004, +0x7e2e000c, +0xcc000062, +0x31103fff, +0x80000003, +0xce110000, +0x7c40c000, +0x80000003, +0xcc400040, +0x80000003, +0xcc412257, +0x7c418000, +0xcc400045, +0xcc400048, +0xcc41225c, +0xcc41a1fc, +0x7c408000, +0xa0000000, +0xcc800062, +0xcc400045, +0xcc400048, +0x7c40c000, +0xcc41225c, +0xcc41a1fc, +0x7c408000, +0xa0000000, +0xcc800062, +0xcc000045, +0xcc000048, +0xcc41225c, +0xcc41a1fc, +0x7c408000, +0xa0000000, +0xcc800062, +0x040ca1fd, +0xc0120001, +0xcc000045, +0xcc000048, +0x7cd0c00c, +0xcc41225c, +0xcc41a1fc, +0xd04d0000, +0x7c408000, +0xa0000000, +0xcc800062, +0x80000003, +0xcc41225d, +0x7c408000, +0x7c40c000, +0xc02a0002, +0x7c410000, +0x7d29000c, +0x30940001, +0x30980006, +0x309c0300, +0x29dc0008, +0x7c420000, +0x7c424000, +0x9540000f, +0xc02e0004, +0x05f02258, +0x7f2f000c, +0xcc310000, +0xc8280004, +0xccc12169, +0xcd01216a, +0xce81216b, +0x0db40002, +0xcc01216c, +0x9740000e, +0x0db40000, +0x8000007d, +0xc834000a, +0x0db40002, +0x97400009, +0x0db40000, +0xc02e0004, +0x05f02258, +0x7f2f000c, +0xcc310000, +0xc8280004, +0x8000007d, +0xc834000a, +0x97400004, +0x7e028000, +0x8000007d, +0xc834000a, +0x0db40004, +0x9740ff8c, +0x00000000, +0xce01216d, +0xce41216e, +0xc8280003, +0xc834000a, +0x9b400004, +0x043c0005, +0x8400026d, +0xcc000062, +0x0df40000, +0x9740000b, +0xc82c03e6, +0xce81a2b7, +0xc0300006, +0x7ef34028, +0xc0300020, +0x7f6b8020, +0x7fb3c029, +0xcf81a2c4, +0x80000003, +0xcfc1a2d1, +0x0df40001, +0x9740000b, +0xc82c03e7, +0xce81a2bb, +0xc0300006, +0x7ef34028, +0xc0300020, +0x7f6b8020, +0x7fb3c029, +0xcf81a2c5, +0x80000003, +0xcfc1a2d2, +0x0df40002, +0x9740000b, +0xc82c03e8, +0xce81a2bf, +0xc0300006, +0x7ef34028, +0xc0300020, +0x7f6b8020, +0x7fb3c029, +0xcf81a2c6, +0x80000003, +0xcfc1a2d3, +0xc82c03e9, +0xce81a2c3, +0xc0300006, +0x7ef34028, +0xc0300020, +0x7f6b8020, +0x7fb3c029, +0xcf81a2c7, +0x80000003, +0xcfc1a2d4, +0x80000003, +0xcc400042, +0x7c40c000, +0x7c410000, +0x2914001d, +0x31540001, +0x9940000c, +0x31181000, +0xc81c0011, +0x95c00000, +0xc81c0011, +0xccc12100, +0xcd012101, +0xccc12102, +0xcd012103, +0x04180004, +0x8000037e, +0xcd81a2a4, +0xc02a0004, +0x95800008, +0x36a821a3, +0xcc290000, +0xc8280004, +0xc81c0011, +0x0de40040, +0x9640ffff, +0xc81c0011, +0xccc12170, +0xcd012171, +0xc8200012, +0x96000000, +0xc8200012, +0x8000037e, +0xcc000064, +0x7c40c000, +0x7c410000, +0xcc000045, +0xcc000048, +0x40d40003, +0xcd41225c, +0xcd01a1fc, +0xc01a0001, +0x041ca1fd, +0x7dd9c00c, +0x7c420000, +0x08cc0001, +0x06240001, +0x06280002, +0xce1d0000, +0xce5d0000, +0x98c0fffa, +0xce9d0000, +0x7c408000, +0xa0000000, +0xcc800062, +0x7c40c000, +0x30d00001, +0x28cc0001, +0x7c414000, +0x95000006, +0x7c418000, +0xcd41216d, +0xcd81216e, +0x800000f4, +0xc81c0003, +0xc0220004, +0x7e16000c, +0xcc210000, +0xc81c0004, +0x7c424000, +0x98c00004, +0x7c428000, +0x80000003, +0xcde50000, +0xce412169, +0xce81216a, +0xcdc1216b, +0x80000003, +0xcc01216c, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0x7c41c000, +0x28a40008, +0x326400ff, +0x0e68003c, +0x9680000a, +0x7c020000, +0x7c420000, +0x1e300003, +0xcc00006a, +0x9b000003, +0x42200005, +0x04200040, +0x80000111, +0x7c024000, +0x7e024000, +0x9a400000, +0x0a640001, +0x30ec0010, +0x9ac0000a, +0xcc000062, +0xc02a0004, +0xc82c0021, +0x7e92800c, +0xcc000041, +0xcc290000, +0xcec00021, +0x80000121, +0xc8300004, +0xcd01216d, +0xcd41216e, +0xc8300003, +0x7f1f000b, +0x30f40007, +0x27780001, +0x9740002a, +0x07b80126, +0x9f800000, +0x00000000, +0x80000136, +0x7f1b8004, +0x8000013a, +0x7f1b8005, +0x8000013e, +0x7f1b8002, +0x80000142, +0x7f1b8003, +0x80000146, +0x7f1b8007, +0x8000014a, +0x7f1b8006, +0x8000014f, +0x28a40008, +0x9b800019, +0x28a40008, +0x8000015f, +0x326400ff, +0x9b800015, +0x28a40008, +0x8000015f, +0x326400ff, +0x9b800011, +0x28a40008, +0x8000015f, +0x326400ff, +0x9b80000d, +0x28a40008, +0x8000015f, +0x326400ff, +0x9b800009, +0x28a40008, +0x8000015f, +0x326400ff, +0x9b800005, +0x28a40008, +0x8000015f, +0x326400ff, +0x28a40008, +0x326400ff, +0x0e68003c, +0x9a80feb2, +0x28ec0008, +0x7c434000, +0x7c438000, +0x7c43c000, +0x96c00007, +0xcc000062, +0xcf412169, +0xcf81216a, +0xcfc1216b, +0x80000003, +0xcc01216c, +0x80000003, +0xcff50000, +0xcc00006b, +0x84000381, +0x0e68003c, +0x9a800004, +0xc8280015, +0x80000003, +0xd040007f, +0x9680ffab, +0x7e024000, +0x8400023b, +0xc00e0002, +0xcc000041, +0x80000239, +0xccc1304a, +0x7c40c000, +0x7c410000, +0xc01e0001, +0x29240012, +0xc0220002, +0x96400005, +0xc0260004, +0xc027fffb, +0x7d25000b, +0xc0260000, +0x7dd2800b, +0x7e12c00b, +0x7d25000c, +0x7c414000, +0x7c418000, +0xccc12169, +0x9a80000a, +0xcd01216a, +0xcd41216b, +0x96c0fe83, +0xcd81216c, +0xc8300018, +0x97000000, +0xc8300018, +0x80000003, +0xcc000018, +0x84000381, +0xcc00007f, +0xc8140013, +0xc8180014, +0xcd41216b, +0x96c0fe77, +0xcd81216c, +0x80000183, +0xc8300018, +0xc80c0008, +0x98c00000, +0xc80c0008, +0x7c410000, +0x95000002, +0x00000000, +0x7c414000, +0xc8200009, +0xcc400043, +0xce01a1f4, +0xcc400044, +0xc00e8000, +0x7c424000, +0x7c428000, +0x2aac001f, +0x96c0fe64, +0xc035f000, +0xce4003e2, +0x32780003, +0x267c0008, +0x7ff7c00b, +0x7ffbc00c, +0x2a780018, +0xcfc003e3, +0xcf8003e4, +0x26b00002, +0x7f3f0000, +0xcf0003e5, +0x8000031f, +0x7c80c000, +0x7c40c000, +0x28d00008, +0x3110000f, +0x9500000f, +0x25280001, +0x06a801b4, +0x9e800000, +0x00000000, +0x800001d5, +0xc0120800, +0x800001e3, +0xc814000f, +0x800001ea, +0xc8140010, +0x800001f1, +0xccc1a2a4, +0x800001fa, +0xc8140011, +0x30d0003f, +0x0d280015, +0x9a800012, +0x0d28001e, +0x9a80001e, +0x0d280020, +0x9a800023, +0x0d24000f, +0x0d280010, +0x7e6a800c, +0x9a800026, +0x0d200004, +0x0d240014, +0x0d280028, +0x7e62400c, +0x7ea6800c, +0x9a80002a, +0xc8140011, +0x80000003, +0xccc1a2a4, +0xc0120800, +0x7c414000, +0x7d0cc00c, +0xc0120008, +0x29580003, +0x295c000c, +0x7c420000, +0x7dd1c00b, +0x26200014, +0x7e1e400c, +0x7e4e800c, +0xce81a2a4, +0x80000003, +0xcd81a1fe, +0xc814000f, +0x0410210e, +0x95400000, +0xc814000f, +0xd0510000, +0x80000003, +0xccc1a2a4, +0xc8140010, +0x04102108, +0x95400000, +0xc8140010, +0xd0510000, +0x80000003, +0xccc1a2a4, +0xccc1a2a4, +0x04100001, +0xcd000019, +0x84000381, +0xcc00007f, +0xc8100019, +0x99000000, +0xc8100019, +0x80000004, +0x7c408000, +0x04102100, +0x95400000, +0xc8140011, +0xd0510000, +0x8000037e, +0xccc1a2a4, +0x7c40c000, +0xcc40000d, +0x94c0fe01, +0xcc40000e, +0x7c410000, +0x95000005, +0x08cc0001, +0xc8140005, +0x99400014, +0x00000000, +0x98c0fffb, +0x7c410000, +0x80000004, +0x7d008000, +0xc8140005, +0x7c40c000, +0x9940000c, +0xc818000c, +0x7c410000, +0x9580fdf0, +0xc820000e, +0xc81c000d, +0x66200020, +0x7e1e002c, +0x25240002, +0x7e624020, +0x80000003, +0xcce60000, +0x7c410000, +0xcc00006c, +0xcc00006d, +0xc818001f, +0xc81c001e, +0x65980020, +0x7dd9c02c, +0x7cd4c00c, +0xccde0000, +0x45dc0004, +0xc8280017, +0x9680000f, +0xc00e0001, +0x28680008, +0x2aac0016, +0x32a800ff, +0x0eb00049, +0x7f2f000b, +0x97000006, +0x00000000, +0xc8140005, +0x7c40c000, +0x80000223, +0x7c410000, +0x80000226, +0xd040007f, +0x8400023b, +0xcc000041, +0xccc1304a, +0x94000000, +0xc83c001a, +0x043c0005, +0xcfc1a2a4, +0xc0361f90, +0xc0387fff, +0x7c03c010, +0x7f7b400c, +0xcf41217c, +0xcfc1217d, +0xcc01217e, +0xc03a0004, +0x0434217f, +0x7f7b400c, +0xcc350000, +0xc83c0004, +0x2bfc001f, +0x04380020, +0x97c00005, +0xcc000062, +0x9b800000, +0x0bb80001, +0x80000247, +0xcc000071, +0xcc01a1f4, +0x04380016, +0xc0360002, +0xcf81a2a4, +0x88000000, +0xcf412010, +0x7c40c000, +0x28d0001c, +0x95000005, +0x04d40001, +0xcd400065, +0x80000003, +0xcd400068, +0x09540002, +0x80000003, +0xcd400066, +0x8400026c, +0xc81803ea, +0x7c40c000, +0x9980fd9f, +0xc8140016, +0x08d00001, +0x9940002b, +0xcd000068, +0x7c408000, +0xa0000000, +0xcc800062, +0x043c0005, +0xcfc1a2a4, +0xcc01a1f4, +0x84000381, +0xcc000046, +0x88000000, +0xcc00007f, +0x8400027e, +0xc81803ea, +0x7c40c000, +0x9980fd8d, +0xc8140016, +0x08d00001, +0x99400019, +0xcd000068, +0x7c408000, +0xa0000000, +0xcc800062, +0x043c0022, +0xcfc1a2a4, +0x84000381, +0xcc000047, +0x88000000, +0xcc00007f, +0xc8100016, +0x9900000d, +0xcc400067, +0x80000004, +0x7c408000, +0xc81803ea, +0x9980fd79, +0x7c40c000, +0x94c00003, +0xc8100016, +0x99000004, +0xccc00068, +0x80000004, +0x7c408000, +0x8400023b, +0xc0148000, +0xcc000041, +0xcd41304a, +0xc0148000, +0x99000000, +0xc8100016, +0x80000004, +0x7c408000, +0xc0120001, +0x7c51400c, +0x80000003, +0xd0550000, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0x291c001f, +0xccc0004a, +0xcd00004b, +0x95c00003, +0xc01c8000, +0xcdc12010, +0xdd830000, +0x055c2000, +0xcc000062, +0x80000003, +0xd81f4100, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0xccc0004c, +0xcd00004d, +0xdd830000, +0x055ca000, +0x80000003, +0xd81f4100, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0xccc0004e, +0xcd00004f, +0xdd830000, +0x055cc000, +0x80000003, +0xd81f4100, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0xccc00050, +0xcd000051, +0xdd830000, +0x055cf8e0, +0x80000003, +0xd81f4100, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0xccc00052, +0xcd000053, +0xdd830000, +0x055cf880, +0x80000003, +0xd81f4100, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0xccc00054, +0xcd000055, +0xdd830000, +0x055ce000, +0x80000003, +0xd81f4100, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0xccc00056, +0xcd000057, +0xdd830000, +0x055cf000, +0x80000003, +0xd81f4100, +0x7c40c000, +0x7c410000, +0x7c414000, +0x7c418000, +0xccc00058, +0xcd000059, +0xdd830000, +0x055cf3fc, +0x80000003, +0xd81f4100, +0xd0432000, +0x7c408000, +0xa0000000, +0xcc800062, +0xd043a000, +0x7c408000, +0xa0000000, +0xcc800062, +0xd043c000, +0x7c408000, +0xa0000000, +0xcc800062, +0xd043f8e0, +0x7c408000, +0xa0000000, +0xcc800062, +0xd043f880, +0x7c408000, +0xa0000000, +0xcc800062, +0xd043e000, +0x7c408000, +0xa0000000, +0xcc800062, +0xd043f000, +0x7c408000, +0xa0000000, +0xcc800062, +0xd043f3fc, +0x7c408000, +0xa0000000, +0xcc800062, +0xc81403e0, +0xcc430000, +0xcc430000, +0xcc430000, +0x7d45c000, +0xcdc30000, +0xd0430000, +0x7c408000, +0xa0000000, +0xcc800062, +0x7c40c000, +0xc81003e2, +0xc81403e5, +0xc81803e3, +0xc81c03e4, +0xcd812169, +0xcdc1216a, +0xccc1216b, +0xcc01216c, +0x04200004, +0x7da18000, +0x7d964002, +0x9640fcd9, +0xcd8003e3, +0x31280003, +0xc02df000, +0x25180008, +0x7dad800b, +0x7da9800c, +0x80000003, +0xcd8003e3, +0x308cffff, +0xd04d0000, +0x7c408000, +0xa0000000, +0xcc800062, +0xc8140020, +0x15580002, +0x9580ffff, +0xc8140020, +0xcc00006e, +0xcc412180, +0x7c40c000, +0xccc1218d, +0xcc412181, +0x28d0001f, +0x34588000, +0xcd81218c, +0x9500fcbf, +0xcc412182, +0xc8140020, +0x9940ffff, +0xc8140020, +0x80000004, +0x7c408000, +0x7c40c000, +0x28d00018, +0x31100001, +0xc0160080, +0x95000003, +0xc02a0004, +0x7cd4c00c, +0xccc1217c, +0xcc41217d, +0xcc41217e, +0x7c418000, +0x1db00003, +0x36a0217f, +0x9b000003, +0x419c0005, +0x041c0040, +0x99c00000, +0x09dc0001, +0xcc210000, +0xc8240004, +0x2a6c001f, +0x419c0005, +0x9ac0fffa, +0xcc800062, +0x80000004, +0x7c408000, +0x7c40c000, +0x04d403e6, +0x80000003, +0xcc540000, +0x8000037e, +0xcc4003ea, +0xc01c8000, +0x044ca000, +0xcdc12010, +0x7c410000, +0xc8140009, +0x04180000, +0x041c0008, +0xcd800071, +0x09dc0001, +0x05980001, +0xcd0d0000, +0x99c0fffc, +0xcc800062, +0x8000037e, +0xcd400071, +0xc00e0100, +0xcc000041, +0xccc1304a, +0xc83c007f, +0xcc00007f, +0x80000003, +0xcc00007f, +0xcc00007f, +0x88000000, +0xcc00007f, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00010333, +0x00100006, +0x00170008, +0x0021000a, +0x0027002a, +0x00280025, +0x0029002b, +0x002a0028, +0x002b002b, +0x002d003a, +0x002e0041, +0x002f004c, +0x0034004e, +0x00360032, +0x003900b1, +0x003a00d1, +0x003b00e6, +0x003c00fe, +0x003d016d, +0x003f00af, +0x00410338, +0x0043034b, +0x00440190, +0x004500fe, +0x004601ae, +0x004701ae, +0x00480200, +0x0049020e, +0x004a0257, +0x004b0284, +0x00520261, +0x00530273, +0x00540289, +0x0057029b, +0x0060029f, +0x006102ae, +0x006202b8, +0x006302c2, +0x006402cc, +0x006502d6, +0x006602e0, +0x006702ea, +0x006802f4, +0x006902f8, +0x006a02fc, +0x006b0300, +0x006c0304, +0x006d0308, +0x006e030c, +0x006f0310, +0x00700314, +0x00720365, +0x0074036b, +0x00790369, +0x007c031e, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +0x000f037a, +}; diff --git a/sys/dev/pci/drm/radeon_cp.c b/sys/dev/pci/drm/radeon_cp.c index 261a08160ee..683be44d874 100644 --- a/sys/dev/pci/drm/radeon_cp.c +++ b/sys/dev/pci/drm/radeon_cp.c @@ -2,7 +2,8 @@ /* * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. * Copyright 2000 VA Linux Systems, Inc., Fremont, California. - * Copyright 2007 Advanced Micro Devices, Inc. + * Copyright 2007-2009 Advanced Micro Devices, Inc. + * Copyright 2008 Red Hat Inc. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -27,6 +28,8 @@ * Authors: * Kevin E. Martin <martin@valinux.com> * Gareth Hughes <gareth@valinux.com> + * Dave Airlie <airlied@redhat.com> + * Alex Deucher <alexander.deucher@amd.com> */ #include "drmP.h" @@ -36,6 +39,7 @@ #include "r300_reg.h" #include "radeon_microcode.h" +#include "r600_microcode.h" #define RADEON_FIFO_DEBUG 0 int radeon_do_cleanup_cp(struct drm_device *); @@ -49,27 +53,62 @@ void radeon_cp_load_microcode(drm_radeon_private_t *); int radeon_cp_get_buffers(struct drm_device *dev, struct drm_file *, struct drm_dma *); +void r600gart_add_entry(struct drm_ati_pcigart_info *, bus_size_t, + bus_addr_t); + u32 R500_READ_MCIND(drm_radeon_private_t *, int ); u32 RS480_READ_MCIND(drm_radeon_private_t *, int); u32 RS690_READ_MCIND(drm_radeon_private_t *, int); +u32 RS600_READ_MCIND(drm_radeon_private_t *, int); u32 IGP_READ_MCIND(drm_radeon_private_t *, int); -u32 radeon_read_fb_location(drm_radeon_private_t *); -void radeon_write_fb_location(drm_radeon_private_t *, u32); -void radeon_write_fb_location(drm_radeon_private_t *, u32); -void radeon_write_agp_location(drm_radeon_private_t *, u32); -void radeon_write_agp_base(drm_radeon_private_t *, u64); int RADEON_READ_PLL(struct drm_device * , int); u32 RADEON_READ_PCIE(drm_radeon_private_t *, int); int radeon_do_pixcache_flush(drm_radeon_private_t *); int radeon_do_wait_for_fifo(drm_radeon_private_t *, int); int radeon_do_wait_for_idle(drm_radeon_private_t *); +int r600_do_wait_for_fifo(drm_radeon_private_t *, int); +int r600_do_wait_for_idle(drm_radeon_private_t *); void radeon_init_pipes(drm_radeon_private_t *); void radeon_test_writeback(drm_radeon_private_t *); void radeon_set_igpgart(drm_radeon_private_t *, int); +void rs600_set_igpgart(drm_radeon_private_t *, int); void radeon_set_pciegart(drm_radeon_private_t *, int); void radeon_set_pcigart(drm_radeon_private_t *, int); int radeondrm_setup_pcigart(struct drm_radeon_private *); +int radeon_setup_pcigart_surface(drm_radeon_private_t *dev_priv); + +# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */ +# define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1)) + +#define R600_PTE_VALID (1 << 0) +#define R600_PTE_SYSTEM (1 << 1) +#define R600_PTE_SNOOPED (1 << 2) +#define R600_PTE_READABLE (1 << 5) +#define R600_PTE_WRITEABLE (1 << 6) + +/* MAX values used for gfx init */ +#define R6XX_MAX_SH_GPRS 256 +#define R6XX_MAX_TEMP_GPRS 16 +#define R6XX_MAX_SH_THREADS 256 +#define R6XX_MAX_SH_STACK_ENTRIES 4096 +#define R6XX_MAX_BACKENDS 8 +#define R6XX_MAX_BACKENDS_MASK 0xff +#define R6XX_MAX_SIMDS 8 +#define R6XX_MAX_SIMDS_MASK 0xff +#define R6XX_MAX_PIPES 8 +#define R6XX_MAX_PIPES_MASK 0xff + +#define R7XX_MAX_SH_GPRS 256 +#define R7XX_MAX_TEMP_GPRS 16 +#define R7XX_MAX_SH_THREADS 256 +#define R7XX_MAX_SH_STACK_ENTRIES 4096 +#define R7XX_MAX_BACKENDS 8 +#define R7XX_MAX_BACKENDS_MASK 0xff +#define R7XX_MAX_SIMDS 16 +#define R7XX_MAX_SIMDS_MASK 0xffff +#define R7XX_MAX_PIPES 8 +#define R7XX_MAX_PIPES_MASK 0xff u32 @@ -103,22 +142,41 @@ RS690_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) } u32 +RS600_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) +{ + u32 ret; + RADEON_WRITE(RS600_MC_INDEX, ((addr & RS600_MC_ADDR_MASK) | + RS600_MC_IND_CITF_ARB0)); + ret = RADEON_READ(RS600_MC_DATA); + return ret; +} +u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) { - if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) - return RS690_READ_MCIND(dev_priv, addr); + if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) + return RS690_READ_MCIND(dev_priv, addr); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) + return RS600_READ_MCIND(dev_priv, addr); else - return RS480_READ_MCIND(dev_priv, addr); + return RS480_READ_MCIND(dev_priv, addr); } u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv) { - if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) + return RADEON_READ(R700_MC_VM_FB_LOCATION); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + return RADEON_READ(R600_MC_VM_FB_LOCATION); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) return R500_READ_MCIND(dev_priv, RV515_MC_FB_LOCATION); - else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) + else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) return RS690_READ_MCIND(dev_priv, RS690_MC_FB_LOCATION); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) + return RS600_READ_MCIND(dev_priv, RS600_MC_FB_LOCATION); else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) return R500_READ_MCIND(dev_priv, R520_MC_FB_LOCATION); else @@ -128,10 +186,17 @@ radeon_read_fb_location(drm_radeon_private_t *dev_priv) void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc) { - if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) + RADEON_WRITE(R700_MC_VM_FB_LOCATION, fb_loc); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + RADEON_WRITE(R600_MC_VM_FB_LOCATION, fb_loc); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) R500_WRITE_MCIND(RV515_MC_FB_LOCATION, fb_loc); - else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) + else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) RS690_WRITE_MCIND(RS690_MC_FB_LOCATION, fb_loc); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) + RS600_WRITE_MCIND(RS600_MC_FB_LOCATION, fb_loc); else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) R500_WRITE_MCIND(R520_MC_FB_LOCATION, fb_loc); else @@ -141,10 +206,20 @@ radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc) void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc) { - if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) + /*R6xx/R7xx: AGP_TOP and BOT are actually 18 bits each */ + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) { + RADEON_WRITE(R700_MC_VM_AGP_BOT, agp_loc & 0xffff); /* FIX ME */ + RADEON_WRITE(R700_MC_VM_AGP_TOP, (agp_loc >> 16) & 0xffff); + } else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + RADEON_WRITE(R600_MC_VM_AGP_BOT, agp_loc & 0xffff); /* FIX ME */ + RADEON_WRITE(R600_MC_VM_AGP_TOP, (agp_loc >> 16) & 0xffff); + } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) R500_WRITE_MCIND(RV515_MC_AGP_LOCATION, agp_loc); - else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) + else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) RS690_WRITE_MCIND(RS690_MC_AGP_LOCATION, agp_loc); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) + RS600_WRITE_MCIND(RS600_MC_AGP_LOCATION, agp_loc); else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) R500_WRITE_MCIND(R520_MC_AGP_LOCATION, agp_loc); else @@ -156,13 +231,23 @@ radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base) { u32 agp_base_hi = upper_32_bits(agp_base); u32 agp_base_lo = agp_base & 0xffffffff; - - if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) { + u32 r6xx_agp_base = (agp_base >> 22) & 0x3ffff; + + /* R6xx/R7xx must be aligned to a 4MB boundry */ + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) + RADEON_WRITE(R700_MC_VM_AGP_BASE, r6xx_agp_base); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + RADEON_WRITE(R600_MC_VM_AGP_BASE, r6xx_agp_base); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) { R500_WRITE_MCIND(RV515_MC_AGP_BASE, agp_base_lo); R500_WRITE_MCIND(RV515_MC_AGP_BASE_2, agp_base_hi); - } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) { + } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) { RS690_WRITE_MCIND(RS690_MC_AGP_BASE, agp_base_lo); RS690_WRITE_MCIND(RS690_MC_AGP_BASE_2, agp_base_hi); + } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) { + RS600_WRITE_MCIND(RS600_AGP_BASE, agp_base_lo); + RS600_WRITE_MCIND(RS600_AGP_BASE_2, agp_base_hi); } else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) { R500_WRITE_MCIND(R520_MC_AGP_BASE, agp_base_lo); R500_WRITE_MCIND(R520_MC_AGP_BASE_2, agp_base_hi); @@ -177,6 +262,26 @@ radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base) } } +void +radeon_enable_bm(struct drm_radeon_private *dev_priv) +{ + u32 tmp; + /* Turn on bus mastering */ + if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) { + /* rs600/rs690/rs740 */ + tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS; + RADEON_WRITE(RADEON_BUS_CNTL, tmp); + } else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) { + /* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */ + tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS; + RADEON_WRITE(RADEON_BUS_CNTL, tmp); + } /* PCIE cards appears to not need this */ +} + int RADEON_READ_PLL(struct drm_device *dev, int addr) { @@ -193,6 +298,1067 @@ RADEON_READ_PCIE(drm_radeon_private_t *dev_priv, int addr) return RADEON_READ(RADEON_PCIE_DATA); } +/* + * Some R600/R700 setup functions. + */ +static u32 r600_get_tile_pipe_to_backend_map(u32 num_tile_pipes, + u32 num_backends, + u32 backend_disable_mask) +{ + u32 backend_map = 0; + u32 enabled_backends_mask; + u32 enabled_backends_count; + u32 cur_pipe; + u32 swizzle_pipe[R6XX_MAX_PIPES]; + u32 cur_backend; + u32 i; + + if (num_tile_pipes > R6XX_MAX_PIPES) + num_tile_pipes = R6XX_MAX_PIPES; + if (num_tile_pipes < 1) + num_tile_pipes = 1; + if (num_backends > R6XX_MAX_BACKENDS) + num_backends = R6XX_MAX_BACKENDS; + if (num_backends < 1) + num_backends = 1; + + enabled_backends_mask = 0; + enabled_backends_count = 0; + for (i = 0; i < R6XX_MAX_BACKENDS; ++i) { + if (((backend_disable_mask >> i) & 1) == 0) { + enabled_backends_mask |= (1 << i); + ++enabled_backends_count; + } + if (enabled_backends_count == num_backends) + break; + } + + if (enabled_backends_count == 0) { + enabled_backends_mask = 1; + enabled_backends_count = 1; + } + + if (enabled_backends_count != num_backends) + num_backends = enabled_backends_count; + + memset((uint8_t *)&swizzle_pipe[0], 0, sizeof(u32) * R6XX_MAX_PIPES); + switch (num_tile_pipes) { + case 1: + swizzle_pipe[0] = 0; + break; + case 2: + swizzle_pipe[0] = 0; + swizzle_pipe[1] = 1; + break; + case 3: + swizzle_pipe[0] = 0; + swizzle_pipe[1] = 1; + swizzle_pipe[2] = 2; + break; + case 4: + swizzle_pipe[0] = 0; + swizzle_pipe[1] = 1; + swizzle_pipe[2] = 2; + swizzle_pipe[3] = 3; + break; + case 5: + swizzle_pipe[0] = 0; + swizzle_pipe[1] = 1; + swizzle_pipe[2] = 2; + swizzle_pipe[3] = 3; + swizzle_pipe[4] = 4; + break; + case 6: + swizzle_pipe[0] = 0; + swizzle_pipe[1] = 2; + swizzle_pipe[2] = 4; + swizzle_pipe[3] = 5; + swizzle_pipe[4] = 1; + swizzle_pipe[5] = 3; + break; + case 7: + swizzle_pipe[0] = 0; + swizzle_pipe[1] = 2; + swizzle_pipe[2] = 4; + swizzle_pipe[3] = 6; + swizzle_pipe[4] = 1; + swizzle_pipe[5] = 3; + swizzle_pipe[6] = 5; + break; + case 8: + swizzle_pipe[0] = 0; + swizzle_pipe[1] = 2; + swizzle_pipe[2] = 4; + swizzle_pipe[3] = 6; + swizzle_pipe[4] = 1; + swizzle_pipe[5] = 3; + swizzle_pipe[6] = 5; + swizzle_pipe[7] = 7; + break; + } + + cur_backend = 0; + for (cur_pipe = 0; cur_pipe < num_tile_pipes; ++cur_pipe) { + while (((1 << cur_backend) & enabled_backends_mask) == 0) + cur_backend = (cur_backend + 1) % R6XX_MAX_BACKENDS; + + backend_map |= (u32)(((cur_backend & 3) << (swizzle_pipe[cur_pipe] * 2))); + + cur_backend = (cur_backend + 1) % R6XX_MAX_BACKENDS; + } + + return backend_map; +} + +static int r600_count_pipe_bits(uint32_t val) +{ + int i, ret = 0; + for (i = 0; i < 32; i++) { + ret += val & 1; + val >>= 1; + } + return ret; +} + +static void r600_gfx_init(struct drm_device *dev, + drm_radeon_private_t *dev_priv) +{ + int i, j, num_qd_pipes; + u32 sx_debug_1; + u32 tc_cntl; + u32 arb_pop; + u32 num_gs_verts_per_thread; + u32 vgt_gs_per_es; + u32 gs_prim_buffer_depth = 0; + u32 sq_ms_fifo_sizes; + u32 sq_config; + u32 sq_gpr_resource_mgmt_1 = 0; + u32 sq_gpr_resource_mgmt_2 = 0; + u32 sq_thread_resource_mgmt = 0; + u32 sq_stack_resource_mgmt_1 = 0; + u32 sq_stack_resource_mgmt_2 = 0; + u32 hdp_host_path_cntl; + u32 backend_map; + u32 gb_tiling_config = 0; + u32 cc_rb_backend_disable = 0; + u32 cc_gc_shader_pipe_config = 0; + u32 ramcfg; + + /* setup chip specs */ + switch (dev_priv->flags & RADEON_FAMILY_MASK) { + case CHIP_R600: + dev_priv->r600_max_pipes = 4; + dev_priv->r600_max_tile_pipes = 8; + dev_priv->r600_max_simds = 4; + dev_priv->r600_max_backends = 4; + dev_priv->r600_max_gprs = 256; + dev_priv->r600_max_threads = 192; + dev_priv->r600_max_stack_entries = 256; + dev_priv->r600_max_hw_contexts = 8; + dev_priv->r600_max_gs_threads = 16; + dev_priv->r600_sx_max_export_size = 128; + dev_priv->r600_sx_max_export_pos_size = 16; + dev_priv->r600_sx_max_export_smx_size = 128; + dev_priv->r600_sq_num_cf_insts = 2; + break; + case CHIP_RV630: + case CHIP_RV635: + dev_priv->r600_max_pipes = 2; + dev_priv->r600_max_tile_pipes = 2; + dev_priv->r600_max_simds = 3; + dev_priv->r600_max_backends = 1; + dev_priv->r600_max_gprs = 128; + dev_priv->r600_max_threads = 192; + dev_priv->r600_max_stack_entries = 128; + dev_priv->r600_max_hw_contexts = 8; + dev_priv->r600_max_gs_threads = 4; + dev_priv->r600_sx_max_export_size = 128; + dev_priv->r600_sx_max_export_pos_size = 16; + dev_priv->r600_sx_max_export_smx_size = 128; + dev_priv->r600_sq_num_cf_insts = 2; + break; + case CHIP_RV610: + case CHIP_RS780: + case CHIP_RS880: + case CHIP_RV620: + dev_priv->r600_max_pipes = 1; + dev_priv->r600_max_tile_pipes = 1; + dev_priv->r600_max_simds = 2; + dev_priv->r600_max_backends = 1; + dev_priv->r600_max_gprs = 128; + dev_priv->r600_max_threads = 192; + dev_priv->r600_max_stack_entries = 128; + dev_priv->r600_max_hw_contexts = 4; + dev_priv->r600_max_gs_threads = 4; + dev_priv->r600_sx_max_export_size = 128; + dev_priv->r600_sx_max_export_pos_size = 16; + dev_priv->r600_sx_max_export_smx_size = 128; + dev_priv->r600_sq_num_cf_insts = 1; + break; + case CHIP_RV670: + dev_priv->r600_max_pipes = 4; + dev_priv->r600_max_tile_pipes = 4; + dev_priv->r600_max_simds = 4; + dev_priv->r600_max_backends = 4; + dev_priv->r600_max_gprs = 192; + dev_priv->r600_max_threads = 192; + dev_priv->r600_max_stack_entries = 256; + dev_priv->r600_max_hw_contexts = 8; + dev_priv->r600_max_gs_threads = 16; + dev_priv->r600_sx_max_export_size = 128; + dev_priv->r600_sx_max_export_pos_size = 16; + dev_priv->r600_sx_max_export_smx_size = 128; + dev_priv->r600_sq_num_cf_insts = 2; + break; + default: + break; + } + + /* Initialize HDP */ + j = 0; + for (i = 0; i < 32; i++) { + RADEON_WRITE((0x2c14 + j), 0x00000000); + RADEON_WRITE((0x2c18 + j), 0x00000000); + RADEON_WRITE((0x2c1c + j), 0x00000000); + RADEON_WRITE((0x2c20 + j), 0x00000000); + RADEON_WRITE((0x2c24 + j), 0x00000000); + j += 0x18; + } + + RADEON_WRITE(R600_GRBM_CNTL, R600_GRBM_READ_TIMEOUT(0xff)); + + /* setup tiling, simd, pipe config */ + ramcfg = RADEON_READ(R600_RAMCFG); + + switch (dev_priv->r600_max_tile_pipes) { + case 1: + gb_tiling_config |= R600_PIPE_TILING(0); + break; + case 2: + gb_tiling_config |= R600_PIPE_TILING(1); + break; + case 4: + gb_tiling_config |= R600_PIPE_TILING(2); + break; + case 8: + gb_tiling_config |= R600_PIPE_TILING(3); + break; + default: + break; + } + + gb_tiling_config |= R600_BANK_TILING((ramcfg >> R600_NOOFBANK_SHIFT) & R600_NOOFBANK_MASK); + + gb_tiling_config |= R600_GROUP_SIZE(0); + + if (((ramcfg >> R600_NOOFROWS_SHIFT) & R600_NOOFROWS_MASK) > 3) { + gb_tiling_config |= R600_ROW_TILING(3); + gb_tiling_config |= R600_SAMPLE_SPLIT(3); + } else { + gb_tiling_config |= + R600_ROW_TILING(((ramcfg >> R600_NOOFROWS_SHIFT) & R600_NOOFROWS_MASK)); + gb_tiling_config |= + R600_SAMPLE_SPLIT(((ramcfg >> R600_NOOFROWS_SHIFT) & R600_NOOFROWS_MASK)); + } + + gb_tiling_config |= R600_BANK_SWAPS(1); + + backend_map = r600_get_tile_pipe_to_backend_map(dev_priv->r600_max_tile_pipes, + dev_priv->r600_max_backends, + (0xff << dev_priv->r600_max_backends) & 0xff); + gb_tiling_config |= R600_BACKEND_MAP(backend_map); + + cc_gc_shader_pipe_config = + R600_INACTIVE_QD_PIPES((R6XX_MAX_PIPES_MASK << dev_priv->r600_max_pipes) & R6XX_MAX_PIPES_MASK); + cc_gc_shader_pipe_config |= + R600_INACTIVE_SIMDS((R6XX_MAX_SIMDS_MASK << dev_priv->r600_max_simds) & R6XX_MAX_SIMDS_MASK); + + cc_rb_backend_disable = + R600_BACKEND_DISABLE((R6XX_MAX_BACKENDS_MASK << dev_priv->r600_max_backends) & R6XX_MAX_BACKENDS_MASK); + + RADEON_WRITE(R600_GB_TILING_CONFIG, gb_tiling_config); + RADEON_WRITE(R600_DCP_TILING_CONFIG, (gb_tiling_config & 0xffff)); + RADEON_WRITE(R600_HDP_TILING_CONFIG, (gb_tiling_config & 0xffff)); + + RADEON_WRITE(R600_CC_RB_BACKEND_DISABLE, cc_rb_backend_disable); + RADEON_WRITE(R600_CC_GC_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config); + RADEON_WRITE(R600_GC_USER_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config); + + num_qd_pipes = + R6XX_MAX_BACKENDS - r600_count_pipe_bits(cc_gc_shader_pipe_config & R600_INACTIVE_QD_PIPES_MASK); + RADEON_WRITE(R600_VGT_OUT_DEALLOC_CNTL, (num_qd_pipes * 4) & R600_DEALLOC_DIST_MASK); + RADEON_WRITE(R600_VGT_VERTEX_REUSE_BLOCK_CNTL, ((num_qd_pipes * 4) - 2) & R600_VTX_REUSE_DEPTH_MASK); + + /* set HW defaults for 3D engine */ + RADEON_WRITE(R600_CP_QUEUE_THRESHOLDS, (R600_ROQ_IB1_START(0x16) | + R600_ROQ_IB2_START(0x2b))); + + RADEON_WRITE(R600_CP_MEQ_THRESHOLDS, (R600_MEQ_END(0x40) | + R600_ROQ_END(0x40))); + + RADEON_WRITE(R600_TA_CNTL_AUX, (R600_DISABLE_CUBE_ANISO | + R600_SYNC_GRADIENT | + R600_SYNC_WALKER | + R600_SYNC_ALIGNER)); + + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV670) + RADEON_WRITE(R600_ARB_GDEC_RD_CNTL, 0x00000021); + + sx_debug_1 = RADEON_READ(R600_SX_DEBUG_1); + sx_debug_1 |= R600_SMX_EVENT_RELEASE; + if (((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_R600)) + sx_debug_1 |= R600_ENABLE_NEW_SMX_ADDRESS; + RADEON_WRITE(R600_SX_DEBUG_1, sx_debug_1); + + if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R600) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880)) + RADEON_WRITE(R600_DB_DEBUG, R600_PREZ_MUST_WAIT_FOR_POSTZ_DONE); + else + RADEON_WRITE(R600_DB_DEBUG, 0); + + RADEON_WRITE(R600_DB_WATERMARKS, (R600_DEPTH_FREE(4) | + R600_DEPTH_FLUSH(16) | + R600_DEPTH_PENDING_FREE(4) | + R600_DEPTH_CACHELINE_FREE(16))); + RADEON_WRITE(R600_PA_SC_MULTI_CHIP_CNTL, 0); + RADEON_WRITE(R600_VGT_NUM_INSTANCES, 0); + + RADEON_WRITE(R600_SPI_CONFIG_CNTL, R600_GPR_WRITE_PRIORITY(0)); + RADEON_WRITE(R600_SPI_CONFIG_CNTL_1, R600_VTX_DONE_DELAY(0)); + + sq_ms_fifo_sizes = RADEON_READ(R600_SQ_MS_FIFO_SIZES); + if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880)) { + sq_ms_fifo_sizes = (R600_CACHE_FIFO_SIZE(0xa) | + R600_FETCH_FIFO_HIWATER(0xa) | + R600_DONE_FIFO_HIWATER(0xe0) | + R600_ALU_UPDATE_FIFO_HIWATER(0x8)); + } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R600) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630)) { + sq_ms_fifo_sizes &= ~R600_DONE_FIFO_HIWATER(0xff); + sq_ms_fifo_sizes |= R600_DONE_FIFO_HIWATER(0x4); + } + RADEON_WRITE(R600_SQ_MS_FIFO_SIZES, sq_ms_fifo_sizes); + + /* SQ_CONFIG, SQ_GPR_RESOURCE_MGMT, SQ_THREAD_RESOURCE_MGMT, SQ_STACK_RESOURCE_MGMT + * should be adjusted as needed by the 2D/3D drivers. This just sets default values + */ + sq_config = RADEON_READ(R600_SQ_CONFIG); + sq_config &= ~(R600_PS_PRIO(3) | + R600_VS_PRIO(3) | + R600_GS_PRIO(3) | + R600_ES_PRIO(3)); + sq_config |= (R600_DX9_CONSTS | + R600_VC_ENABLE | + R600_PS_PRIO(0) | + R600_VS_PRIO(1) | + R600_GS_PRIO(2) | + R600_ES_PRIO(3)); + + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R600) { + sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(124) | + R600_NUM_VS_GPRS(124) | + R600_NUM_CLAUSE_TEMP_GPRS(4)); + sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(0) | + R600_NUM_ES_GPRS(0)); + sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(136) | + R600_NUM_VS_THREADS(48) | + R600_NUM_GS_THREADS(4) | + R600_NUM_ES_THREADS(4)); + sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(128) | + R600_NUM_VS_STACK_ENTRIES(128)); + sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(0) | + R600_NUM_ES_STACK_ENTRIES(0)); + } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880)) { + /* no vertex cache */ + sq_config &= ~R600_VC_ENABLE; + + sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(44) | + R600_NUM_VS_GPRS(44) | + R600_NUM_CLAUSE_TEMP_GPRS(2)); + sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(17) | + R600_NUM_ES_GPRS(17)); + sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(79) | + R600_NUM_VS_THREADS(78) | + R600_NUM_GS_THREADS(4) | + R600_NUM_ES_THREADS(31)); + sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(40) | + R600_NUM_VS_STACK_ENTRIES(40)); + sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(32) | + R600_NUM_ES_STACK_ENTRIES(16)); + } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV635)) { + sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(44) | + R600_NUM_VS_GPRS(44) | + R600_NUM_CLAUSE_TEMP_GPRS(2)); + sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(18) | + R600_NUM_ES_GPRS(18)); + sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(79) | + R600_NUM_VS_THREADS(78) | + R600_NUM_GS_THREADS(4) | + R600_NUM_ES_THREADS(31)); + sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(40) | + R600_NUM_VS_STACK_ENTRIES(40)); + sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(32) | + R600_NUM_ES_STACK_ENTRIES(16)); + } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV670) { + sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(44) | + R600_NUM_VS_GPRS(44) | + R600_NUM_CLAUSE_TEMP_GPRS(2)); + sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(17) | + R600_NUM_ES_GPRS(17)); + sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(79) | + R600_NUM_VS_THREADS(78) | + R600_NUM_GS_THREADS(4) | + R600_NUM_ES_THREADS(31)); + sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(64) | + R600_NUM_VS_STACK_ENTRIES(64)); + sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(64) | + R600_NUM_ES_STACK_ENTRIES(64)); + } + + RADEON_WRITE(R600_SQ_CONFIG, sq_config); + RADEON_WRITE(R600_SQ_GPR_RESOURCE_MGMT_1, sq_gpr_resource_mgmt_1); + RADEON_WRITE(R600_SQ_GPR_RESOURCE_MGMT_2, sq_gpr_resource_mgmt_2); + RADEON_WRITE(R600_SQ_THREAD_RESOURCE_MGMT, sq_thread_resource_mgmt); + RADEON_WRITE(R600_SQ_STACK_RESOURCE_MGMT_1, sq_stack_resource_mgmt_1); + RADEON_WRITE(R600_SQ_STACK_RESOURCE_MGMT_2, sq_stack_resource_mgmt_2); + + if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880)) + RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, R600_CACHE_INVALIDATION(R600_TC_ONLY)); + else + RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, R600_CACHE_INVALIDATION(R600_VC_AND_TC)); + + RADEON_WRITE(R600_PA_SC_AA_SAMPLE_LOCS_2S, (R600_S0_X(0xc) | + R600_S0_Y(0x4) | + R600_S1_X(0x4) | + R600_S1_Y(0xc))); + RADEON_WRITE(R600_PA_SC_AA_SAMPLE_LOCS_4S, (R600_S0_X(0xe) | + R600_S0_Y(0xe) | + R600_S1_X(0x2) | + R600_S1_Y(0x2) | + R600_S2_X(0xa) | + R600_S2_Y(0x6) | + R600_S3_X(0x6) | + R600_S3_Y(0xa))); + RADEON_WRITE(R600_PA_SC_AA_SAMPLE_LOCS_8S_WD0, (R600_S0_X(0xe) | + R600_S0_Y(0xb) | + R600_S1_X(0x4) | + R600_S1_Y(0xc) | + R600_S2_X(0x1) | + R600_S2_Y(0x6) | + R600_S3_X(0xa) | + R600_S3_Y(0xe))); + RADEON_WRITE(R600_PA_SC_AA_SAMPLE_LOCS_8S_WD1, (R600_S4_X(0x6) | + R600_S4_Y(0x1) | + R600_S5_X(0x0) | + R600_S5_Y(0x0) | + R600_S6_X(0xb) | + R600_S6_Y(0x4) | + R600_S7_X(0x7) | + R600_S7_Y(0x8))); + + + switch (dev_priv->flags & RADEON_FAMILY_MASK) { + case CHIP_R600: + case CHIP_RV630: + case CHIP_RV635: + gs_prim_buffer_depth = 0; + break; + case CHIP_RV610: + case CHIP_RS780: + case CHIP_RS880: + case CHIP_RV620: + gs_prim_buffer_depth = 32; + break; + case CHIP_RV670: + gs_prim_buffer_depth = 128; + break; + default: + break; + } + + num_gs_verts_per_thread = dev_priv->r600_max_pipes * 16; + vgt_gs_per_es = gs_prim_buffer_depth + num_gs_verts_per_thread; + /* Max value for this is 256 */ + if (vgt_gs_per_es > 256) + vgt_gs_per_es = 256; + + RADEON_WRITE(R600_VGT_ES_PER_GS, 128); + RADEON_WRITE(R600_VGT_GS_PER_ES, vgt_gs_per_es); + RADEON_WRITE(R600_VGT_GS_PER_VS, 2); + RADEON_WRITE(R600_VGT_GS_VERTEX_REUSE, 16); + + /* more default values. 2D/3D driver should adjust as needed */ + RADEON_WRITE(R600_PA_SC_LINE_STIPPLE_STATE, 0); + RADEON_WRITE(R600_VGT_STRMOUT_EN, 0); + RADEON_WRITE(R600_SX_MISC, 0); + RADEON_WRITE(R600_PA_SC_MODE_CNTL, 0); + RADEON_WRITE(R600_PA_SC_AA_CONFIG, 0); + RADEON_WRITE(R600_PA_SC_LINE_STIPPLE, 0); + RADEON_WRITE(R600_SPI_INPUT_Z, 0); + RADEON_WRITE(R600_SPI_PS_IN_CONTROL_0, R600_NUM_INTERP(2)); + RADEON_WRITE(R600_CB_COLOR7_FRAG, 0); + + /* clear render buffer base addresses */ + RADEON_WRITE(R600_CB_COLOR0_BASE, 0); + RADEON_WRITE(R600_CB_COLOR1_BASE, 0); + RADEON_WRITE(R600_CB_COLOR2_BASE, 0); + RADEON_WRITE(R600_CB_COLOR3_BASE, 0); + RADEON_WRITE(R600_CB_COLOR4_BASE, 0); + RADEON_WRITE(R600_CB_COLOR5_BASE, 0); + RADEON_WRITE(R600_CB_COLOR6_BASE, 0); + RADEON_WRITE(R600_CB_COLOR7_BASE, 0); + + switch (dev_priv->flags & RADEON_FAMILY_MASK) { + case CHIP_RV610: + case CHIP_RS780: + case CHIP_RS880: + case CHIP_RV620: + tc_cntl = R600_TC_L2_SIZE(8); + break; + case CHIP_RV630: + case CHIP_RV635: + tc_cntl = R600_TC_L2_SIZE(4); + break; + case CHIP_R600: + tc_cntl = R600_TC_L2_SIZE(0) | R600_L2_DISABLE_LATE_HIT; + break; + default: + tc_cntl = R600_TC_L2_SIZE(0); + break; + } + + RADEON_WRITE(R600_TC_CNTL, tc_cntl); + + hdp_host_path_cntl = RADEON_READ(R600_HDP_HOST_PATH_CNTL); + RADEON_WRITE(R600_HDP_HOST_PATH_CNTL, hdp_host_path_cntl); + + arb_pop = RADEON_READ(R600_ARB_POP); + arb_pop |= R600_ENABLE_TC128; + RADEON_WRITE(R600_ARB_POP, arb_pop); + + RADEON_WRITE(R600_PA_SC_MULTI_CHIP_CNTL, 0); + RADEON_WRITE(R600_PA_CL_ENHANCE, (R600_CLIP_VTX_REORDER_ENA | + R600_NUM_CLIP_SEQ(3))); + RADEON_WRITE(R600_PA_SC_ENHANCE, R600_FORCE_EOV_MAX_CLK_CNT(4095)); + +} + +static u32 +r700_get_tile_pipe_to_backend_map(u32 num_tile_pipes, u32 num_backends, + u32 backend_disable_mask) +{ + u32 backend_map = 0; + u32 enabled_backends_mask; + u32 enabled_backends_count; + u32 cur_pipe; + u32 swizzle_pipe[R7XX_MAX_PIPES]; + u32 cur_backend; + u32 i; + + if (num_tile_pipes > R7XX_MAX_PIPES) + num_tile_pipes = R7XX_MAX_PIPES; + if (num_tile_pipes < 1) + num_tile_pipes = 1; + if (num_backends > R7XX_MAX_BACKENDS) + num_backends = R7XX_MAX_BACKENDS; + if (num_backends < 1) + num_backends = 1; + + enabled_backends_mask = 0; + enabled_backends_count = 0; + for (i = 0; i < R7XX_MAX_BACKENDS; ++i) { + if (((backend_disable_mask >> i) & 1) == 0) { + enabled_backends_mask |= (1 << i); + ++enabled_backends_count; + } + if (enabled_backends_count == num_backends) + break; + } + + if (enabled_backends_count == 0) { + enabled_backends_mask = 1; + enabled_backends_count = 1; + } + + if (enabled_backends_count != num_backends) + num_backends = enabled_backends_count; + + memset((uint8_t *)&swizzle_pipe[0], 0, sizeof(u32) * R7XX_MAX_PIPES); + switch (num_tile_pipes) { + case 1: + swizzle_pipe[0] = 0; + break; + case 2: + swizzle_pipe[0] = 0; + swizzle_pipe[1] = 1; + break; + case 3: + swizzle_pipe[0] = 0; + swizzle_pipe[1] = 2; + swizzle_pipe[2] = 1; + break; + case 4: + swizzle_pipe[0] = 0; + swizzle_pipe[1] = 2; + swizzle_pipe[2] = 3; + swizzle_pipe[3] = 1; + break; + case 5: + swizzle_pipe[0] = 0; + swizzle_pipe[1] = 2; + swizzle_pipe[2] = 4; + swizzle_pipe[3] = 1; + swizzle_pipe[4] = 3; + break; + case 6: + swizzle_pipe[0] = 0; + swizzle_pipe[1] = 2; + swizzle_pipe[2] = 4; + swizzle_pipe[3] = 5; + swizzle_pipe[4] = 3; + swizzle_pipe[5] = 1; + break; + case 7: + swizzle_pipe[0] = 0; + swizzle_pipe[1] = 2; + swizzle_pipe[2] = 4; + swizzle_pipe[3] = 6; + swizzle_pipe[4] = 3; + swizzle_pipe[5] = 1; + swizzle_pipe[6] = 5; + break; + case 8: + swizzle_pipe[0] = 0; + swizzle_pipe[1] = 2; + swizzle_pipe[2] = 4; + swizzle_pipe[3] = 6; + swizzle_pipe[4] = 3; + swizzle_pipe[5] = 1; + swizzle_pipe[6] = 7; + swizzle_pipe[7] = 5; + break; + } + + cur_backend = 0; + for (cur_pipe = 0; cur_pipe < num_tile_pipes; ++cur_pipe) { + while (((1 << cur_backend) & enabled_backends_mask) == 0) + cur_backend = (cur_backend + 1) % R7XX_MAX_BACKENDS; + + backend_map |= (u32)(((cur_backend & 3) << (swizzle_pipe[cur_pipe] * 2))); + + cur_backend = (cur_backend + 1) % R7XX_MAX_BACKENDS; + } + + return backend_map; +} + +static void r700_gfx_init(struct drm_device *dev, + drm_radeon_private_t *dev_priv) +{ + int i, j, num_qd_pipes; + u32 sx_debug_1; + u32 smx_dc_ctl0; + u32 num_gs_verts_per_thread; + u32 vgt_gs_per_es; + u32 gs_prim_buffer_depth = 0; + u32 sq_ms_fifo_sizes; + u32 sq_config; + u32 sq_thread_resource_mgmt; + u32 hdp_host_path_cntl; + u32 sq_dyn_gpr_size_simd_ab_0; + u32 backend_map; + u32 gb_tiling_config = 0; + u32 cc_rb_backend_disable = 0; + u32 cc_gc_shader_pipe_config = 0; + u32 mc_arb_ramcfg; + u32 db_debug4; + + /* setup chip specs */ + switch (dev_priv->flags & RADEON_FAMILY_MASK) { + case CHIP_RV770: + dev_priv->r600_max_pipes = 4; + dev_priv->r600_max_tile_pipes = 8; + dev_priv->r600_max_simds = 10; + dev_priv->r600_max_backends = 4; + dev_priv->r600_max_gprs = 256; + dev_priv->r600_max_threads = 248; + dev_priv->r600_max_stack_entries = 512; + dev_priv->r600_max_hw_contexts = 8; + dev_priv->r600_max_gs_threads = 16 * 2; + dev_priv->r600_sx_max_export_size = 128; + dev_priv->r600_sx_max_export_pos_size = 16; + dev_priv->r600_sx_max_export_smx_size = 112; + dev_priv->r600_sq_num_cf_insts = 2; + + dev_priv->r700_sx_num_of_sets = 7; + dev_priv->r700_sc_prim_fifo_size = 0xF9; + dev_priv->r700_sc_hiz_tile_fifo_size = 0x30; + dev_priv->r700_sc_earlyz_tile_fifo_fize = 0x130; + break; + case CHIP_RV730: + dev_priv->r600_max_pipes = 2; + dev_priv->r600_max_tile_pipes = 4; + dev_priv->r600_max_simds = 8; + dev_priv->r600_max_backends = 2; + dev_priv->r600_max_gprs = 128; + dev_priv->r600_max_threads = 248; + dev_priv->r600_max_stack_entries = 256; + dev_priv->r600_max_hw_contexts = 8; + dev_priv->r600_max_gs_threads = 16 * 2; + dev_priv->r600_sx_max_export_size = 256; + dev_priv->r600_sx_max_export_pos_size = 32; + dev_priv->r600_sx_max_export_smx_size = 224; + dev_priv->r600_sq_num_cf_insts = 2; + + dev_priv->r700_sx_num_of_sets = 7; + dev_priv->r700_sc_prim_fifo_size = 0xf9; + dev_priv->r700_sc_hiz_tile_fifo_size = 0x30; + dev_priv->r700_sc_earlyz_tile_fifo_fize = 0x130; + if (dev_priv->r600_sx_max_export_pos_size > 16) { + dev_priv->r600_sx_max_export_pos_size -= 16; + dev_priv->r600_sx_max_export_smx_size += 16; + } + break; + case CHIP_RV710: + dev_priv->r600_max_pipes = 2; + dev_priv->r600_max_tile_pipes = 2; + dev_priv->r600_max_simds = 2; + dev_priv->r600_max_backends = 1; + dev_priv->r600_max_gprs = 256; + dev_priv->r600_max_threads = 192; + dev_priv->r600_max_stack_entries = 256; + dev_priv->r600_max_hw_contexts = 4; + dev_priv->r600_max_gs_threads = 8 * 2; + dev_priv->r600_sx_max_export_size = 128; + dev_priv->r600_sx_max_export_pos_size = 16; + dev_priv->r600_sx_max_export_smx_size = 112; + dev_priv->r600_sq_num_cf_insts = 1; + + dev_priv->r700_sx_num_of_sets = 7; + dev_priv->r700_sc_prim_fifo_size = 0x40; + dev_priv->r700_sc_hiz_tile_fifo_size = 0x30; + dev_priv->r700_sc_earlyz_tile_fifo_fize = 0x130; + break; + case CHIP_RV740: + dev_priv->r600_max_pipes = 4; + dev_priv->r600_max_tile_pipes = 4; + dev_priv->r600_max_simds = 8; + dev_priv->r600_max_backends = 4; + dev_priv->r600_max_gprs = 256; + dev_priv->r600_max_threads = 248; + dev_priv->r600_max_stack_entries = 512; + dev_priv->r600_max_hw_contexts = 8; + dev_priv->r600_max_gs_threads = 16 * 2; + dev_priv->r600_sx_max_export_size = 256; + dev_priv->r600_sx_max_export_pos_size = 32; + dev_priv->r600_sx_max_export_smx_size = 224; + dev_priv->r600_sq_num_cf_insts = 2; + + dev_priv->r700_sx_num_of_sets = 7; + dev_priv->r700_sc_prim_fifo_size = 0x100; + dev_priv->r700_sc_hiz_tile_fifo_size = 0x30; + dev_priv->r700_sc_earlyz_tile_fifo_fize = 0x130; + + if (dev_priv->r600_sx_max_export_pos_size > 16) { + dev_priv->r600_sx_max_export_pos_size -= 16; + dev_priv->r600_sx_max_export_smx_size += 16; + } + break; + default: + break; + } + + /* Initialize HDP */ + j = 0; + for (i = 0; i < 32; i++) { + RADEON_WRITE((0x2c14 + j), 0x00000000); + RADEON_WRITE((0x2c18 + j), 0x00000000); + RADEON_WRITE((0x2c1c + j), 0x00000000); + RADEON_WRITE((0x2c20 + j), 0x00000000); + RADEON_WRITE((0x2c24 + j), 0x00000000); + j += 0x18; + } + + RADEON_WRITE(R600_GRBM_CNTL, R600_GRBM_READ_TIMEOUT(0xff)); + + /* setup tiling, simd, pipe config */ + mc_arb_ramcfg = RADEON_READ(R700_MC_ARB_RAMCFG); + + switch (dev_priv->r600_max_tile_pipes) { + case 1: + gb_tiling_config |= R600_PIPE_TILING(0); + break; + case 2: + gb_tiling_config |= R600_PIPE_TILING(1); + break; + case 4: + gb_tiling_config |= R600_PIPE_TILING(2); + break; + case 8: + gb_tiling_config |= R600_PIPE_TILING(3); + break; + default: + break; + } + + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV770) + gb_tiling_config |= R600_BANK_TILING(1); + else + gb_tiling_config |= R600_BANK_TILING((mc_arb_ramcfg >> R700_NOOFBANK_SHIFT) & R700_NOOFBANK_MASK); + + gb_tiling_config |= R600_GROUP_SIZE(0); + + if (((mc_arb_ramcfg >> R700_NOOFROWS_SHIFT) & R700_NOOFROWS_MASK) > 3) { + gb_tiling_config |= R600_ROW_TILING(3); + gb_tiling_config |= R600_SAMPLE_SPLIT(3); + } else { + gb_tiling_config |= + R600_ROW_TILING(((mc_arb_ramcfg >> R700_NOOFROWS_SHIFT) & R700_NOOFROWS_MASK)); + gb_tiling_config |= + R600_SAMPLE_SPLIT(((mc_arb_ramcfg >> R700_NOOFROWS_SHIFT) & R700_NOOFROWS_MASK)); + } + + gb_tiling_config |= R600_BANK_SWAPS(1); + + backend_map = r700_get_tile_pipe_to_backend_map(dev_priv->r600_max_tile_pipes, + dev_priv->r600_max_backends, + (0xff << dev_priv->r600_max_backends) & 0xff); + gb_tiling_config |= R600_BACKEND_MAP(backend_map); + + cc_gc_shader_pipe_config = + R600_INACTIVE_QD_PIPES((R7XX_MAX_PIPES_MASK << dev_priv->r600_max_pipes) & R7XX_MAX_PIPES_MASK); + cc_gc_shader_pipe_config |= + R600_INACTIVE_SIMDS((R7XX_MAX_SIMDS_MASK << dev_priv->r600_max_simds) & R7XX_MAX_SIMDS_MASK); + + cc_rb_backend_disable = + R600_BACKEND_DISABLE((R7XX_MAX_BACKENDS_MASK << dev_priv->r600_max_backends) & R7XX_MAX_BACKENDS_MASK); + + RADEON_WRITE(R600_GB_TILING_CONFIG, gb_tiling_config); + RADEON_WRITE(R600_DCP_TILING_CONFIG, (gb_tiling_config & 0xffff)); + RADEON_WRITE(R600_HDP_TILING_CONFIG, (gb_tiling_config & 0xffff)); + + RADEON_WRITE(R600_CC_RB_BACKEND_DISABLE, cc_rb_backend_disable); + RADEON_WRITE(R600_CC_GC_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config); + RADEON_WRITE(R600_GC_USER_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config); + + RADEON_WRITE(R700_CC_SYS_RB_BACKEND_DISABLE, cc_rb_backend_disable); + RADEON_WRITE(R700_CGTS_SYS_TCC_DISABLE, 0); + RADEON_WRITE(R700_CGTS_TCC_DISABLE, 0); + RADEON_WRITE(R700_CGTS_USER_SYS_TCC_DISABLE, 0); + RADEON_WRITE(R700_CGTS_USER_TCC_DISABLE, 0); + + num_qd_pipes = + R7XX_MAX_BACKENDS - r600_count_pipe_bits(cc_gc_shader_pipe_config & R600_INACTIVE_QD_PIPES_MASK); + RADEON_WRITE(R600_VGT_OUT_DEALLOC_CNTL, (num_qd_pipes * 4) & R600_DEALLOC_DIST_MASK); + RADEON_WRITE(R600_VGT_VERTEX_REUSE_BLOCK_CNTL, ((num_qd_pipes * 4) - 2) & R600_VTX_REUSE_DEPTH_MASK); + + /* set HW defaults for 3D engine */ + RADEON_WRITE(R600_CP_QUEUE_THRESHOLDS, (R600_ROQ_IB1_START(0x16) | + R600_ROQ_IB2_START(0x2b))); + + RADEON_WRITE(R600_CP_MEQ_THRESHOLDS, R700_STQ_SPLIT(0x30)); + + RADEON_WRITE(R600_TA_CNTL_AUX, (R600_DISABLE_CUBE_ANISO | + R600_SYNC_GRADIENT | + R600_SYNC_WALKER | + R600_SYNC_ALIGNER)); + + sx_debug_1 = RADEON_READ(R700_SX_DEBUG_1); + sx_debug_1 |= R700_ENABLE_NEW_SMX_ADDRESS; + RADEON_WRITE(R700_SX_DEBUG_1, sx_debug_1); + + smx_dc_ctl0 = RADEON_READ(R600_SMX_DC_CTL0); + smx_dc_ctl0 &= ~R700_CACHE_DEPTH(0x1ff); + smx_dc_ctl0 |= R700_CACHE_DEPTH((dev_priv->r700_sx_num_of_sets * 64) - 1); + RADEON_WRITE(R600_SMX_DC_CTL0, smx_dc_ctl0); + + RADEON_WRITE(R700_SMX_EVENT_CTL, (R700_ES_FLUSH_CTL(4) | + R700_GS_FLUSH_CTL(4) | + R700_ACK_FLUSH_CTL(3) | + R700_SYNC_FLUSH_CTL)); + + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV770) + RADEON_WRITE(R700_DB_DEBUG3, R700_DB_CLK_OFF_DELAY(0x1f)); + else { + db_debug4 = RADEON_READ(RV700_DB_DEBUG4); + db_debug4 |= RV700_DISABLE_TILE_COVERED_FOR_PS_ITER; + RADEON_WRITE(RV700_DB_DEBUG4, db_debug4); + } + + RADEON_WRITE(R600_SX_EXPORT_BUFFER_SIZES, (R600_COLOR_BUFFER_SIZE((dev_priv->r600_sx_max_export_size / 4) - 1) | + R600_POSITION_BUFFER_SIZE((dev_priv->r600_sx_max_export_pos_size / 4) - 1) | + R600_SMX_BUFFER_SIZE((dev_priv->r600_sx_max_export_smx_size / 4) - 1))); + + RADEON_WRITE(R700_PA_SC_FIFO_SIZE_R7XX, (R700_SC_PRIM_FIFO_SIZE(dev_priv->r700_sc_prim_fifo_size) | + R700_SC_HIZ_TILE_FIFO_SIZE(dev_priv->r700_sc_hiz_tile_fifo_size) | + R700_SC_EARLYZ_TILE_FIFO_SIZE(dev_priv->r700_sc_earlyz_tile_fifo_fize))); + + RADEON_WRITE(R600_PA_SC_MULTI_CHIP_CNTL, 0); + + RADEON_WRITE(R600_VGT_NUM_INSTANCES, 1); + + RADEON_WRITE(R600_SPI_CONFIG_CNTL, R600_GPR_WRITE_PRIORITY(0)); + + RADEON_WRITE(R600_SPI_CONFIG_CNTL_1, R600_VTX_DONE_DELAY(4)); + + RADEON_WRITE(R600_CP_PERFMON_CNTL, 0); + + sq_ms_fifo_sizes = (R600_CACHE_FIFO_SIZE(16 * dev_priv->r600_sq_num_cf_insts) | + R600_DONE_FIFO_HIWATER(0xe0) | + R600_ALU_UPDATE_FIFO_HIWATER(0x8)); + switch (dev_priv->flags & RADEON_FAMILY_MASK) { + case CHIP_RV770: + sq_ms_fifo_sizes |= R600_FETCH_FIFO_HIWATER(0x1); + break; + case CHIP_RV730: + case CHIP_RV710: + case CHIP_RV740: + default: + sq_ms_fifo_sizes |= R600_FETCH_FIFO_HIWATER(0x4); + break; + } + RADEON_WRITE(R600_SQ_MS_FIFO_SIZES, sq_ms_fifo_sizes); + + /* SQ_CONFIG, SQ_GPR_RESOURCE_MGMT, SQ_THREAD_RESOURCE_MGMT, SQ_STACK_RESOURCE_MGMT + * should be adjusted as needed by the 2D/3D drivers. This just sets default values + */ + sq_config = RADEON_READ(R600_SQ_CONFIG); + sq_config &= ~(R600_PS_PRIO(3) | + R600_VS_PRIO(3) | + R600_GS_PRIO(3) | + R600_ES_PRIO(3)); + sq_config |= (R600_DX9_CONSTS | + R600_VC_ENABLE | + R600_EXPORT_SRC_C | + R600_PS_PRIO(0) | + R600_VS_PRIO(1) | + R600_GS_PRIO(2) | + R600_ES_PRIO(3)); + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710) + /* no vertex cache */ + sq_config &= ~R600_VC_ENABLE; + + RADEON_WRITE(R600_SQ_CONFIG, sq_config); + + RADEON_WRITE(R600_SQ_GPR_RESOURCE_MGMT_1, (R600_NUM_PS_GPRS((dev_priv->r600_max_gprs * 24)/64) | + R600_NUM_VS_GPRS((dev_priv->r600_max_gprs * 24)/64) | + R600_NUM_CLAUSE_TEMP_GPRS(((dev_priv->r600_max_gprs * 24)/64)/2))); + + RADEON_WRITE(R600_SQ_GPR_RESOURCE_MGMT_2, (R600_NUM_GS_GPRS((dev_priv->r600_max_gprs * 7)/64) | + R600_NUM_ES_GPRS((dev_priv->r600_max_gprs * 7)/64))); + + sq_thread_resource_mgmt = (R600_NUM_PS_THREADS((dev_priv->r600_max_threads * 4)/8) | + R600_NUM_VS_THREADS((dev_priv->r600_max_threads * 2)/8) | + R600_NUM_ES_THREADS((dev_priv->r600_max_threads * 1)/8)); + if (((dev_priv->r600_max_threads * 1) / 8) > dev_priv->r600_max_gs_threads) + sq_thread_resource_mgmt |= R600_NUM_GS_THREADS(dev_priv->r600_max_gs_threads); + else + sq_thread_resource_mgmt |= R600_NUM_GS_THREADS((dev_priv->r600_max_gs_threads * 1)/8); + RADEON_WRITE(R600_SQ_THREAD_RESOURCE_MGMT, sq_thread_resource_mgmt); + + RADEON_WRITE(R600_SQ_STACK_RESOURCE_MGMT_1, (R600_NUM_PS_STACK_ENTRIES((dev_priv->r600_max_stack_entries * 1)/4) | + R600_NUM_VS_STACK_ENTRIES((dev_priv->r600_max_stack_entries * 1)/4))); + + RADEON_WRITE(R600_SQ_STACK_RESOURCE_MGMT_2, (R600_NUM_GS_STACK_ENTRIES((dev_priv->r600_max_stack_entries * 1)/4) | + R600_NUM_ES_STACK_ENTRIES((dev_priv->r600_max_stack_entries * 1)/4))); + + sq_dyn_gpr_size_simd_ab_0 = (R700_SIMDA_RING0((dev_priv->r600_max_gprs * 38)/64) | + R700_SIMDA_RING1((dev_priv->r600_max_gprs * 38)/64) | + R700_SIMDB_RING0((dev_priv->r600_max_gprs * 38)/64) | + R700_SIMDB_RING1((dev_priv->r600_max_gprs * 38)/64)); + + RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_0, sq_dyn_gpr_size_simd_ab_0); + RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_1, sq_dyn_gpr_size_simd_ab_0); + RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_2, sq_dyn_gpr_size_simd_ab_0); + RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_3, sq_dyn_gpr_size_simd_ab_0); + RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_4, sq_dyn_gpr_size_simd_ab_0); + RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_5, sq_dyn_gpr_size_simd_ab_0); + RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_6, sq_dyn_gpr_size_simd_ab_0); + RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_7, sq_dyn_gpr_size_simd_ab_0); + + RADEON_WRITE(R700_PA_SC_FORCE_EOV_MAX_CNTS, (R700_FORCE_EOV_MAX_CLK_CNT(4095) | + R700_FORCE_EOV_MAX_REZ_CNT(255))); + + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710) + RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, (R600_CACHE_INVALIDATION(R600_TC_ONLY) | + R700_AUTO_INVLD_EN(R700_ES_AND_GS_AUTO))); + else + RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, (R600_CACHE_INVALIDATION(R600_VC_AND_TC) | + R700_AUTO_INVLD_EN(R700_ES_AND_GS_AUTO))); + + switch (dev_priv->flags & RADEON_FAMILY_MASK) { + case CHIP_RV770: + case CHIP_RV730: + case CHIP_RV740: + gs_prim_buffer_depth = 384; + break; + case CHIP_RV710: + gs_prim_buffer_depth = 128; + break; + default: + break; + } + + num_gs_verts_per_thread = dev_priv->r600_max_pipes * 16; + vgt_gs_per_es = gs_prim_buffer_depth + num_gs_verts_per_thread; + /* Max value for this is 256 */ + if (vgt_gs_per_es > 256) + vgt_gs_per_es = 256; + + RADEON_WRITE(R600_VGT_ES_PER_GS, 128); + RADEON_WRITE(R600_VGT_GS_PER_ES, vgt_gs_per_es); + RADEON_WRITE(R600_VGT_GS_PER_VS, 2); + + /* more default values. 2D/3D driver should adjust as needed */ + RADEON_WRITE(R600_VGT_GS_VERTEX_REUSE, 16); + RADEON_WRITE(R600_PA_SC_LINE_STIPPLE_STATE, 0); + RADEON_WRITE(R600_VGT_STRMOUT_EN, 0); + RADEON_WRITE(R600_SX_MISC, 0); + RADEON_WRITE(R600_PA_SC_MODE_CNTL, 0); + RADEON_WRITE(R700_PA_SC_EDGERULE, 0xaaaaaaaa); + RADEON_WRITE(R600_PA_SC_AA_CONFIG, 0); + RADEON_WRITE(R600_PA_SC_CLIPRECT_RULE, 0xffff); + RADEON_WRITE(R600_PA_SC_LINE_STIPPLE, 0); + RADEON_WRITE(R600_SPI_INPUT_Z, 0); + RADEON_WRITE(R600_SPI_PS_IN_CONTROL_0, R600_NUM_INTERP(2)); + RADEON_WRITE(R600_CB_COLOR7_FRAG, 0); + + /* clear render buffer base addresses */ + RADEON_WRITE(R600_CB_COLOR0_BASE, 0); + RADEON_WRITE(R600_CB_COLOR1_BASE, 0); + RADEON_WRITE(R600_CB_COLOR2_BASE, 0); + RADEON_WRITE(R600_CB_COLOR3_BASE, 0); + RADEON_WRITE(R600_CB_COLOR4_BASE, 0); + RADEON_WRITE(R600_CB_COLOR5_BASE, 0); + RADEON_WRITE(R600_CB_COLOR6_BASE, 0); + RADEON_WRITE(R600_CB_COLOR7_BASE, 0); + + RADEON_WRITE(R700_TCP_CNTL, 0); + + hdp_host_path_cntl = RADEON_READ(R600_HDP_HOST_PATH_CNTL); + RADEON_WRITE(R600_HDP_HOST_PATH_CNTL, hdp_host_path_cntl); + + RADEON_WRITE(R600_PA_SC_MULTI_CHIP_CNTL, 0); + + RADEON_WRITE(R600_PA_CL_ENHANCE, (R600_CLIP_VTX_REORDER_ENA | + R600_NUM_CLIP_SEQ(3))); + +} + #if RADEON_FIFO_DEBUG static void radeon_status(drm_radeon_private_t *dev_priv) @@ -279,6 +1445,9 @@ radeon_do_wait_for_idle(drm_radeon_private_t *dev_priv) { int i, ret; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + return (r600_do_wait_for_idle(dev_priv)); + ret = radeon_do_wait_for_fifo(dev_priv, 64); if (ret) return ret; @@ -302,11 +1471,67 @@ radeon_do_wait_for_idle(drm_radeon_private_t *dev_priv) return EBUSY; } +int +r600_do_wait_for_fifo(drm_radeon_private_t *dev_priv, int entries) +{ + int i; + + for (i = 0; i < dev_priv->usec_timeout; i++) { + int slots; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) + slots = (RADEON_READ(R600_GRBM_STATUS) + & R700_CMDFIFO_AVAIL_MASK); + else + slots = (RADEON_READ(R600_GRBM_STATUS) + & R600_CMDFIFO_AVAIL_MASK); + if (slots >= entries) + return 0; + DRM_UDELAY(1); + } + DRM_INFO("wait for fifo failed status : 0x%08X 0x%08X\n", + RADEON_READ(R600_GRBM_STATUS), + RADEON_READ(R600_GRBM_STATUS2)); + + return -EBUSY; +} + +int +r600_do_wait_for_idle(drm_radeon_private_t *dev_priv) +{ + int i, ret; + + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) + ret = r600_do_wait_for_fifo(dev_priv, 8); + else + ret = r600_do_wait_for_fifo(dev_priv, 16); + if (ret) + return ret; + for (i = 0; i < dev_priv->usec_timeout; i++) { + if (!(RADEON_READ(R600_GRBM_STATUS) & R600_GUI_ACTIVE)) + return 0; + DRM_UDELAY(1); + } + DRM_INFO("wait idle failed status : 0x%08X 0x%08X\n", + RADEON_READ(R600_GRBM_STATUS), + RADEON_READ(R600_GRBM_STATUS2)); + + return -EBUSY; +} + void radeon_init_pipes(drm_radeon_private_t *dev_priv) { uint32_t gb_tile_config, gb_pipe_sel = 0; + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) { + uint32_t z_pipe_sel = RADEON_READ(RV530_GB_PIPE_SELECT2); + if ((z_pipe_sel & 3) == 3) + dev_priv->num_z_pipes = 2; + else + dev_priv->num_z_pipes = 1; + } else + dev_priv->num_z_pipes = 1; + /* RS4xx/RS6xx/R4xx/R5xx */ if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R420) { gb_pipe_sel = RADEON_READ(R400_GB_PIPE_SELECT); @@ -325,7 +1550,7 @@ radeon_init_pipes(drm_radeon_private_t *dev_priv) gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 /*| R300_SUBPIXEL_1_16*/); - switch(dev_priv->num_gb_pipes) { + switch (dev_priv->num_gb_pipes) { case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break; case 3: gb_tile_config |= R300_PIPE_COUNT_R420_3P; break; case 4: gb_tile_config |= R300_PIPE_COUNT_R420; break; @@ -335,7 +1560,7 @@ radeon_init_pipes(drm_radeon_private_t *dev_priv) if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) { RADEON_WRITE_PLL(R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4)); - RADEON_WRITE(R500_SU_REG_DEST, ((1 << dev_priv->num_gb_pipes) - 1)); + RADEON_WRITE(R300_SU_REG_DEST, ((1 << dev_priv->num_gb_pipes) - 1)); } RADEON_WRITE(R300_GB_TILE_CONFIG, gb_tile_config); radeon_do_wait_for_idle(dev_priv); @@ -350,85 +1575,345 @@ radeon_init_pipes(drm_radeon_private_t *dev_priv) /* ================================================================ * CP control, initialization */ +static void r600_vm_flush_gart_range(struct drm_radeon_private *dev_priv) +{ + u_int32_t resp, countdown = 1000; + + RADEON_WRITE(R600_VM_CONTEXT0_INVALIDATION_LOW_ADDR, dev_priv->gart_vm_start >> 12); + RADEON_WRITE(R600_VM_CONTEXT0_INVALIDATION_HIGH_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12); + RADEON_WRITE(R600_VM_CONTEXT0_REQUEST_RESPONSE, 2); + + do { + resp = RADEON_READ(R600_VM_CONTEXT0_REQUEST_RESPONSE); + countdown--; + DRM_UDELAY(1); + } while (((resp & 0xf0) == 0) && countdown); +} + +static void r600_vm_init(struct drm_radeon_private *dev_priv) +{ + /* initialise the VM to use the page table we constructed up there */ + u32 vm_c0, i; + u32 mc_rd_a; + u32 vm_l2_cntl, vm_l2_cntl3; + /* okay set up the PCIE aperture type thingo */ + RADEON_WRITE(R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR, dev_priv->gart_vm_start >> 12); + RADEON_WRITE(R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12); + RADEON_WRITE(R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0); + + /* setup MC RD a */ + mc_rd_a = R600_MCD_L1_TLB | R600_MCD_L1_FRAG_PROC | R600_MCD_SYSTEM_ACCESS_MODE_IN_SYS | + R600_MCD_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU | R600_MCD_EFFECTIVE_L1_TLB_SIZE(5) | + R600_MCD_EFFECTIVE_L1_QUEUE_SIZE(5) | R600_MCD_WAIT_L2_QUERY; + + RADEON_WRITE(R600_MCD_RD_A_CNTL, mc_rd_a); + RADEON_WRITE(R600_MCD_RD_B_CNTL, mc_rd_a); + + RADEON_WRITE(R600_MCD_WR_A_CNTL, mc_rd_a); + RADEON_WRITE(R600_MCD_WR_B_CNTL, mc_rd_a); + + RADEON_WRITE(R600_MCD_RD_GFX_CNTL, mc_rd_a); + RADEON_WRITE(R600_MCD_WR_GFX_CNTL, mc_rd_a); + + RADEON_WRITE(R600_MCD_RD_SYS_CNTL, mc_rd_a); + RADEON_WRITE(R600_MCD_WR_SYS_CNTL, mc_rd_a); + + RADEON_WRITE(R600_MCD_RD_HDP_CNTL, mc_rd_a | R600_MCD_L1_STRICT_ORDERING); + RADEON_WRITE(R600_MCD_WR_HDP_CNTL, mc_rd_a /*| R600_MCD_L1_STRICT_ORDERING*/); + + RADEON_WRITE(R600_MCD_RD_PDMA_CNTL, mc_rd_a); + RADEON_WRITE(R600_MCD_WR_PDMA_CNTL, mc_rd_a); + + RADEON_WRITE(R600_MCD_RD_SEM_CNTL, mc_rd_a | R600_MCD_SEMAPHORE_MODE); + RADEON_WRITE(R600_MCD_WR_SEM_CNTL, mc_rd_a); + + vm_l2_cntl = R600_VM_L2_CACHE_EN | R600_VM_L2_FRAG_PROC | R600_VM_ENABLE_PTE_CACHE_LRU_W; + vm_l2_cntl |= R600_VM_L2_CNTL_QUEUE_SIZE(7); + RADEON_WRITE(R600_VM_L2_CNTL, vm_l2_cntl); + + RADEON_WRITE(R600_VM_L2_CNTL2, 0); + vm_l2_cntl3 = (R600_VM_L2_CNTL3_BANK_SELECT_0(0) | + R600_VM_L2_CNTL3_BANK_SELECT_1(1) | + R600_VM_L2_CNTL3_CACHE_UPDATE_MODE(2)); + RADEON_WRITE(R600_VM_L2_CNTL3, vm_l2_cntl3); + + vm_c0 = R600_VM_ENABLE_CONTEXT | R600_VM_PAGE_TABLE_DEPTH_FLAT; + + RADEON_WRITE(R600_VM_CONTEXT0_CNTL, vm_c0); + + vm_c0 &= ~R600_VM_ENABLE_CONTEXT; + + /* disable all other contexts */ + for (i = 1; i < 8; i++) + RADEON_WRITE(R600_VM_CONTEXT0_CNTL + (i * 4), vm_c0); + + RADEON_WRITE(R600_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, dev_priv->gart_info.bus_addr >> 12); + RADEON_WRITE(R600_VM_CONTEXT0_PAGE_TABLE_START_ADDR, dev_priv->gart_vm_start >> 12); + RADEON_WRITE(R600_VM_CONTEXT0_PAGE_TABLE_END_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12); + + r600_vm_flush_gart_range(dev_priv); +} + +/* load r600 microcode */ +static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv) +{ + const u32 (*cp)[3]; + const u32 *pfp; + int i; + + switch (dev_priv->flags & RADEON_FAMILY_MASK) { + case CHIP_R600: + DRM_DEBUG("Loading R600 Microcode\n"); + cp = R600_cp_microcode; + pfp = R600_pfp_microcode; + break; + case CHIP_RV610: + DRM_DEBUG("Loading RV610 Microcode\n"); + cp = RV610_cp_microcode; + pfp = RV610_pfp_microcode; + break; + case CHIP_RV630: + DRM_DEBUG("Loading RV630 Microcode\n"); + cp = RV630_cp_microcode; + pfp = RV630_pfp_microcode; + break; + case CHIP_RV620: + DRM_DEBUG("Loading RV620 Microcode\n"); + cp = RV620_cp_microcode; + pfp = RV620_pfp_microcode; + break; + case CHIP_RV635: + DRM_DEBUG("Loading RV635 Microcode\n"); + cp = RV635_cp_microcode; + pfp = RV635_pfp_microcode; + break; + case CHIP_RV670: + DRM_DEBUG("Loading RV670 Microcode\n"); + cp = RV670_cp_microcode; + pfp = RV670_pfp_microcode; + break; + case CHIP_RS780: + case CHIP_RS880: + DRM_DEBUG("Loading RS780/RS880 Microcode\n"); + cp = RS780_cp_microcode; + pfp = RS780_pfp_microcode; + break; + default: + return; + } + + radeon_do_cp_stop(dev_priv); + + RADEON_WRITE(R600_CP_RB_CNTL, + R600_RB_NO_UPDATE | + R600_RB_BLKSZ(15) | + R600_RB_BUFSZ(3)); + + RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP); + RADEON_READ(R600_GRBM_SOFT_RESET); + DRM_UDELAY(15000); + RADEON_WRITE(R600_GRBM_SOFT_RESET, 0); + + RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); + + for (i = 0; i < PM4_UCODE_SIZE; i++) { + RADEON_WRITE(R600_CP_ME_RAM_DATA, cp[i][0]); + RADEON_WRITE(R600_CP_ME_RAM_DATA, cp[i][1]); + RADEON_WRITE(R600_CP_ME_RAM_DATA, cp[i][2]); + } + + RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); + for (i = 0; i < PFP_UCODE_SIZE; i++) + RADEON_WRITE(R600_CP_PFP_UCODE_DATA, pfp[i]); + + RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); + RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); + RADEON_WRITE(R600_CP_ME_RAM_RADDR, 0); +} + +static void r700_vm_init(struct drm_radeon_private *dev_priv) +{ + /* initialise the VM to use the page table we constructed up there */ + u32 vm_c0, i; + u32 mc_vm_md_l1; + u32 vm_l2_cntl, vm_l2_cntl3; + /* okay set up the PCIE aperture type thingo */ + RADEON_WRITE(R700_MC_VM_SYSTEM_APERTURE_LOW_ADDR, dev_priv->gart_vm_start >> 12); + RADEON_WRITE(R700_MC_VM_SYSTEM_APERTURE_HIGH_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12); + RADEON_WRITE(R700_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0); + + mc_vm_md_l1 = R700_ENABLE_L1_TLB | + R700_ENABLE_L1_FRAGMENT_PROCESSING | + R700_SYSTEM_ACCESS_MODE_IN_SYS | + R700_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU | + R700_EFFECTIVE_L1_TLB_SIZE(5) | + R700_EFFECTIVE_L1_QUEUE_SIZE(5); + + RADEON_WRITE(R700_MC_VM_MD_L1_TLB0_CNTL, mc_vm_md_l1); + RADEON_WRITE(R700_MC_VM_MD_L1_TLB1_CNTL, mc_vm_md_l1); + RADEON_WRITE(R700_MC_VM_MD_L1_TLB2_CNTL, mc_vm_md_l1); + RADEON_WRITE(R700_MC_VM_MB_L1_TLB0_CNTL, mc_vm_md_l1); + RADEON_WRITE(R700_MC_VM_MB_L1_TLB1_CNTL, mc_vm_md_l1); + RADEON_WRITE(R700_MC_VM_MB_L1_TLB2_CNTL, mc_vm_md_l1); + RADEON_WRITE(R700_MC_VM_MB_L1_TLB3_CNTL, mc_vm_md_l1); + + vm_l2_cntl = R600_VM_L2_CACHE_EN | R600_VM_L2_FRAG_PROC | R600_VM_ENABLE_PTE_CACHE_LRU_W; + vm_l2_cntl |= R700_VM_L2_CNTL_QUEUE_SIZE(7); + RADEON_WRITE(R600_VM_L2_CNTL, vm_l2_cntl); + + RADEON_WRITE(R600_VM_L2_CNTL2, 0); + vm_l2_cntl3 = R700_VM_L2_CNTL3_BANK_SELECT(0) | R700_VM_L2_CNTL3_CACHE_UPDATE_MODE(2); + RADEON_WRITE(R600_VM_L2_CNTL3, vm_l2_cntl3); + + vm_c0 = R600_VM_ENABLE_CONTEXT | R600_VM_PAGE_TABLE_DEPTH_FLAT; + + RADEON_WRITE(R600_VM_CONTEXT0_CNTL, vm_c0); + + vm_c0 &= ~R600_VM_ENABLE_CONTEXT; + + /* disable all other contexts */ + for (i = 1; i < 8; i++) + RADEON_WRITE(R600_VM_CONTEXT0_CNTL + (i * 4), vm_c0); + + RADEON_WRITE(R700_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, dev_priv->gart_info.bus_addr >> 12); + RADEON_WRITE(R700_VM_CONTEXT0_PAGE_TABLE_START_ADDR, dev_priv->gart_vm_start >> 12); + RADEON_WRITE(R700_VM_CONTEXT0_PAGE_TABLE_END_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12); + + r600_vm_flush_gart_range(dev_priv); +} + +/* load r600 microcode */ +static void r700_cp_load_microcode(drm_radeon_private_t *dev_priv) +{ + const u32 *pfp; + const u32 *cp; + int i; + + switch (dev_priv->flags & RADEON_FAMILY_MASK) { + case CHIP_RV770: + DRM_DEBUG("Loading RV770/RV790 Microcode\n"); + pfp = RV770_pfp_microcode; + cp = RV770_cp_microcode; + break; + case CHIP_RV730: + case CHIP_RV740: + DRM_DEBUG("Loading RV730/RV740 Microcode\n"); + pfp = RV730_pfp_microcode; + cp = RV730_cp_microcode; + break; + case CHIP_RV710: + DRM_DEBUG("Loading RV710 Microcode\n"); + pfp = RV710_pfp_microcode; + cp = RV710_cp_microcode; + break; + default: + return; + } + + radeon_do_cp_stop(dev_priv); + + RADEON_WRITE(R600_CP_RB_CNTL, + R600_RB_NO_UPDATE | + (15 << 8) | + (3 << 0)); + + RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP); + RADEON_READ(R600_GRBM_SOFT_RESET); + DRM_UDELAY(15000); + RADEON_WRITE(R600_GRBM_SOFT_RESET, 0); + + RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); + for (i = 0; i < R700_PFP_UCODE_SIZE; i++) + RADEON_WRITE(R600_CP_PFP_UCODE_DATA, pfp[i]); + RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); + + RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); + for (i = 0; i < R700_PM4_UCODE_SIZE; i++) + RADEON_WRITE(R600_CP_ME_RAM_DATA, cp[i]); + RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); + + RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); + RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0); + RADEON_WRITE(R600_CP_ME_RAM_RADDR, 0); +} /* Load the microcode for the CP */ void radeon_cp_load_microcode(drm_radeon_private_t *dev_priv) { - int i; - DRM_DEBUG("\n"); + const u32 (*cp)[2]; + int i; - radeon_do_wait_for_idle(dev_priv); + DRM_DEBUG("\n"); - RADEON_WRITE(RADEON_CP_ME_RAM_ADDR, 0); + if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)) { + r700_cp_load_microcode(dev_priv); + return; + } else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + r600_cp_load_microcode(dev_priv); + return; + } - if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R100) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV100) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV200) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS100) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS200)) { + switch (dev_priv->flags & RADEON_FAMILY_MASK) { + case CHIP_R100: + case CHIP_RV100: + case CHIP_RV200: + case CHIP_RS100: + case CHIP_RS200: DRM_DEBUG("Loading R100 Microcode\n"); - for (i = 0; i < 256; i++) { - RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, - R100_cp_microcode[i][1]); - RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, - R100_cp_microcode[i][0]); - } - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R200) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV250) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV280) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS300)) { + cp = R100_cp_microcode; + break; + case CHIP_R200: + case CHIP_RV250: + case CHIP_RV280: + case CHIP_RS300: DRM_DEBUG("Loading R200 Microcode\n"); - for (i = 0; i < 256; i++) { - RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, - R200_cp_microcode[i][1]); - RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, - R200_cp_microcode[i][0]); - } - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV350) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) { + cp = R200_cp_microcode; + break; + case CHIP_R300: + case CHIP_R350: + case CHIP_RV350: + case CHIP_RV380: + case CHIP_RS400: + case CHIP_RS480: DRM_DEBUG("Loading R300 Microcode\n"); - for (i = 0; i < 256; i++) { - RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, - R300_cp_microcode[i][1]); - RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, - R300_cp_microcode[i][0]); - } - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R423) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV410)) { + cp = R300_cp_microcode; + break; + case CHIP_R420: + case CHIP_R423: + case CHIP_RV410: DRM_DEBUG("Loading R400 Microcode\n"); - for (i = 0; i < 256; i++) { - RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, - R420_cp_microcode[i][1]); - RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, - R420_cp_microcode[i][0]); - } - } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) { - DRM_DEBUG("Loading RS690 Microcode\n"); - for (i = 0; i < 256; i++) { - RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, - RS690_cp_microcode[i][1]); - RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, - RS690_cp_microcode[i][0]); - } - } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R520) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R580) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV560) || - ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV570)) { + cp = R420_cp_microcode; + break; + case CHIP_RS690: + case CHIP_RS740: + DRM_DEBUG("Loading RS690/RS740 Microcode\n"); + cp = RS690_cp_microcode; + break; + case CHIP_RS600: + DRM_DEBUG("Loading RS600 Microcode\n"); + cp = RS600_cp_microcode; + break; + case CHIP_RV515: + case CHIP_R520: + case CHIP_RV530: + case CHIP_R580: + case CHIP_RV560: + case CHIP_RV570: DRM_DEBUG("Loading R500 Microcode\n"); - for (i = 0; i < 256; i++) { - RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, - R520_cp_microcode[i][1]); - RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, - R520_cp_microcode[i][0]); - } + cp = R520_cp_microcode; + break; + default: + return; + } + + radeon_do_wait_for_idle(dev_priv); + + RADEON_WRITE(RADEON_CP_ME_RAM_ADDR, 0); + + for (i = 0; i != 256; i++) { + RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, cp[i][1]); + RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, cp[i][0]); } } @@ -439,6 +1924,22 @@ radeon_do_cp_idle(drm_radeon_private_t *dev_priv) { DRM_DEBUG("\n"); + + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + BEGIN_RING(5); + OUT_RING(CP_PACKET3(R600_IT_EVENT_WRITE, 0)); + OUT_RING(R600_CACHE_FLUSH_AND_INV_EVENT); + /* wait for 3D idle clean */ + OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1)); + OUT_RING((R600_WAIT_UNTIL - R600_SET_CONFIG_REG_OFFSET) >> 2); + OUT_RING(RADEON_WAIT_3D_IDLE | RADEON_WAIT_3D_IDLECLEAN); + + ADVANCE_RING(); + COMMIT_RING(); + + return (r600_do_wait_for_idle(dev_priv)); + } + BEGIN_RING(6); RADEON_PURGE_CACHE(); @@ -448,7 +1949,7 @@ radeon_do_cp_idle(drm_radeon_private_t *dev_priv) ADVANCE_RING(); COMMIT_RING(); - return radeon_do_wait_for_idle(dev_priv); + return (radeon_do_wait_for_idle(dev_priv)); } /* Start the Command Processor. @@ -456,26 +1957,59 @@ radeon_do_cp_idle(drm_radeon_private_t *dev_priv) void radeon_do_cp_start(drm_radeon_private_t *dev_priv) { - radeon_do_wait_for_idle(dev_priv); + DRM_DEBUG("\n"); - RADEON_WRITE(RADEON_CP_CSQ_CNTL, dev_priv->cp_mode); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + BEGIN_RING(7); + OUT_RING(CP_PACKET3(R600_IT_ME_INITIALIZE, 5)); + OUT_RING(0x00000001); + if (((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV770)) + OUT_RING(0x00000003); + else + OUT_RING(0x00000000); + OUT_RING((dev_priv->r600_max_hw_contexts - 1)); + OUT_RING(R600_ME_INITIALIZE_DEVICE_ID(1)); + OUT_RING(0x00000000); + OUT_RING(0x00000000); + ADVANCE_RING(); + COMMIT_RING(); + + /* set the mux and reset the halt bit */ + RADEON_WRITE(R600_CP_ME_CNTL, 0xff); + } else { + radeon_do_wait_for_idle(dev_priv); - dev_priv->cp_running = 1; + RADEON_WRITE(RADEON_CP_CSQ_CNTL, dev_priv->cp_mode); - BEGIN_RING(8); - /* isync can only be written through cp on r5xx write it here */ - OUT_RING(CP_PACKET0(RADEON_ISYNC_CNTL, 0)); - OUT_RING(RADEON_ISYNC_ANY2D_IDLE3D | - RADEON_ISYNC_ANY3D_IDLE2D | - RADEON_ISYNC_WAIT_IDLEGUI | - RADEON_ISYNC_CPSCRATCH_IDLEGUI); - RADEON_PURGE_CACHE(); - RADEON_PURGE_ZCACHE(); - RADEON_WAIT_UNTIL_IDLE(); - ADVANCE_RING(); - COMMIT_RING(); + /* on r420, any DMA from CP to system memory while 2D is active + * can cause a hang. workaround is to queue a CP RESYNC token + */ + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) { + BEGIN_RING(3); + OUT_RING(CP_PACKET0(R300_CP_RESYNC_ADDR, 1)); + OUT_RING(5); /* scratch reg 5 */ + OUT_RING(0xdeadbeef); + ADVANCE_RING(); + COMMIT_RING(); + } + + BEGIN_RING(8); + /* isync can only be written through cp on r5xx write it here */ + OUT_RING(CP_PACKET0(RADEON_ISYNC_CNTL, 0)); + OUT_RING(RADEON_ISYNC_ANY2D_IDLE3D | + RADEON_ISYNC_ANY3D_IDLE2D | + RADEON_ISYNC_WAIT_IDLEGUI | + RADEON_ISYNC_CPSCRATCH_IDLEGUI); + RADEON_PURGE_CACHE(); + RADEON_PURGE_ZCACHE(); + RADEON_WAIT_UNTIL_IDLE(); + ADVANCE_RING(); + COMMIT_RING(); + + dev_priv->track_flush |= RADEON_FLUSH_EMITED | RADEON_PURGE_EMITED; + } - dev_priv->track_flush |= RADEON_FLUSH_EMITED | RADEON_PURGE_EMITED; + dev_priv->cp_running = 1; } /* Reset the Command Processor. This will not flush any pending @@ -488,8 +2022,14 @@ radeon_do_cp_reset(drm_radeon_private_t *dev_priv) u32 cur_read_ptr; DRM_DEBUG("\n"); - cur_read_ptr = RADEON_READ(RADEON_CP_RB_RPTR); - RADEON_WRITE(RADEON_CP_RB_WPTR, cur_read_ptr); + + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + cur_read_ptr = RADEON_READ(R600_CP_RB_RPTR); + RADEON_WRITE(R600_CP_RB_WPTR, cur_read_ptr); + } else { + cur_read_ptr = RADEON_READ(RADEON_CP_RB_RPTR); + RADEON_WRITE(RADEON_CP_RB_WPTR, cur_read_ptr); + } radeondrm_set_ring_head(dev_priv, cur_read_ptr); dev_priv->ring.tail = cur_read_ptr; } @@ -503,9 +2043,61 @@ radeon_do_cp_stop(drm_radeon_private_t *dev_priv) { DRM_DEBUG("\n"); - RADEON_WRITE(RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIDIS_INDDIS); + /* finish the pending CP_RESYNC token */ + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) { + BEGIN_RING(2); + OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); + OUT_RING(R300_RB3D_DC_FINISH); + ADVANCE_RING(); + COMMIT_RING(); + radeon_do_wait_for_idle(dev_priv); + } + + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + RADEON_WRITE(R600_CP_ME_CNTL, 0xff | R600_CP_ME_HALT); + else + RADEON_WRITE(RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIDIS_INDDIS); + + dev_priv->cp_running = 0; +} + +int r600_do_engine_reset(struct drm_device *dev) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + u32 cp_ptr, cp_me_cntl, cp_rb_cntl; + + DRM_DEBUG("Resetting GPU\n"); + + cp_ptr = RADEON_READ(R600_CP_RB_WPTR); + cp_me_cntl = RADEON_READ(R600_CP_ME_CNTL); + RADEON_WRITE(R600_CP_ME_CNTL, R600_CP_ME_HALT); + + RADEON_WRITE(R600_GRBM_SOFT_RESET, 0x7fff); + RADEON_READ(R600_GRBM_SOFT_RESET); + DRM_UDELAY(50); + RADEON_WRITE(R600_GRBM_SOFT_RESET, 0); + RADEON_READ(R600_GRBM_SOFT_RESET); + + RADEON_WRITE(R600_CP_RB_WPTR_DELAY, 0); + cp_rb_cntl = RADEON_READ(R600_CP_RB_CNTL); + RADEON_WRITE(R600_CP_RB_CNTL, R600_RB_RPTR_WR_ENA); + RADEON_WRITE(R600_CP_RB_RPTR_WR, cp_ptr); + RADEON_WRITE(R600_CP_RB_WPTR, cp_ptr); + RADEON_WRITE(R600_CP_RB_CNTL, cp_rb_cntl); + RADEON_WRITE(R600_CP_ME_CNTL, cp_me_cntl); + + /* Reset the CP ring */ + radeon_do_cp_reset(dev_priv); + + /* The CP is no longer running after an engine reset */ dev_priv->cp_running = 0; + + /* Reset any pending vertex, indirect buffers */ + radeon_freelist_reset(dev); + + return 0; + } /* Reset the engine. This will stop the CP if it is running. @@ -517,6 +2109,9 @@ radeon_do_engine_reset(struct drm_device *dev) u32 clock_cntl_index = 0, mclk_cntl = 0, rbbm_soft_reset; DRM_DEBUG("\n"); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + return (r600_do_engine_reset(dev)); + radeon_do_pixcache_flush(dev_priv); if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV410) { @@ -576,13 +2171,167 @@ radeon_do_engine_reset(struct drm_device *dev) return 0; } +static void r600_cp_init_ring_buffer(struct drm_device *dev, + drm_radeon_private_t *dev_priv) +{ + u32 ring_start; + u64 rptr_addr; + + if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)) + r700_gfx_init(dev, dev_priv); + else + r600_gfx_init(dev, dev_priv); + + RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP); + RADEON_READ(R600_GRBM_SOFT_RESET); + DRM_UDELAY(15000); + RADEON_WRITE(R600_GRBM_SOFT_RESET, 0); + + + /* Set ring buffer size */ +#ifdef __BIG_ENDIAN + RADEON_WRITE(R600_CP_RB_CNTL, + RADEON_BUF_SWAP_32BIT | + RADEON_RB_NO_UPDATE | + (dev_priv->ring.rptr_update_l2qw << 8) | + dev_priv->ring.size_l2qw); +#else + RADEON_WRITE(R600_CP_RB_CNTL, + RADEON_RB_NO_UPDATE | + (dev_priv->ring.rptr_update_l2qw << 8) | + dev_priv->ring.size_l2qw); +#endif + + RADEON_WRITE(R600_CP_SEM_WAIT_TIMER, 0x4); + + /* Set the write pointer delay */ + RADEON_WRITE(R600_CP_RB_WPTR_DELAY, 0); + +#ifdef __BIG_ENDIAN + RADEON_WRITE(R600_CP_RB_CNTL, + RADEON_BUF_SWAP_32BIT | + RADEON_RB_NO_UPDATE | + RADEON_RB_RPTR_WR_ENA | + (dev_priv->ring.rptr_update_l2qw << 8) | + dev_priv->ring.size_l2qw); +#else + RADEON_WRITE(R600_CP_RB_CNTL, + RADEON_RB_NO_UPDATE | + RADEON_RB_RPTR_WR_ENA | + (dev_priv->ring.rptr_update_l2qw << 8) | + dev_priv->ring.size_l2qw); +#endif + + /* Initialize the ring buffer's read and write pointers */ + RADEON_WRITE(R600_CP_RB_RPTR_WR, 0); + RADEON_WRITE(R600_CP_RB_WPTR, 0); + radeondrm_set_ring_head(dev_priv, 0); + dev_priv->ring.tail = 0; + +#if __OS_HAS_AGP + if (dev_priv->flags & RADEON_IS_AGP) { + rptr_addr = dev_priv->ring_rptr->offset - dev->agp->base + + dev_priv->gart_vm_start; + } else +#endif + { + rptr_addr = dev_priv->ring_rptr->offset - dev->sg->handle + + dev_priv->gart_vm_start; + } + RADEON_WRITE(R600_CP_RB_RPTR_ADDR, + rptr_addr & 0xffffffff); + RADEON_WRITE(R600_CP_RB_RPTR_ADDR_HI, + upper_32_bits(rptr_addr)); + +#ifdef __BIG_ENDIAN + RADEON_WRITE(R600_CP_RB_CNTL, + RADEON_BUF_SWAP_32BIT | + (dev_priv->ring.rptr_update_l2qw << 8) | + dev_priv->ring.size_l2qw); +#else + RADEON_WRITE(R600_CP_RB_CNTL, + (dev_priv->ring.rptr_update_l2qw << 8) | + dev_priv->ring.size_l2qw); +#endif + +#if __OS_HAS_AGP + if (dev_priv->flags & RADEON_IS_AGP) { + /* XXX */ + radeon_write_agp_base(dev_priv, dev->agp->base); + + /* XXX */ + radeon_write_agp_location(dev_priv, + (((dev_priv->gart_vm_start - 1 + + dev_priv->gart_size) & 0xffff0000) | + (dev_priv->gart_vm_start >> 16))); + + ring_start = (dev_priv->cp_ring->offset + - dev->agp->base + + dev_priv->gart_vm_start); + } else +#endif + ring_start = (dev_priv->cp_ring->offset - dev->sg->handle + + dev_priv->gart_vm_start); + + RADEON_WRITE(R600_CP_RB_BASE, ring_start >> 8); + + RADEON_WRITE(R600_CP_ME_CNTL, 0xff); + + RADEON_WRITE(R600_CP_DEBUG, (1 << 27) | (1 << 28)); + + /* Initialize the scratch register pointer. This will cause + * the scratch register values to be written out to memory + * whenever they are updated. + * + * We simply put this behind the ring read pointer, this works + * with PCI GART as well as (whatever kind of) AGP GART + */ + { + u64 scratch_addr; + + scratch_addr = RADEON_READ(R600_CP_RB_RPTR_ADDR); + scratch_addr |= ((u64)RADEON_READ(R600_CP_RB_RPTR_ADDR_HI)) << 32; + scratch_addr += R600_SCRATCH_REG_OFFSET; + scratch_addr >>= 8; + scratch_addr &= 0xffffffff; + + RADEON_WRITE(R600_SCRATCH_ADDR, (uint32_t)scratch_addr); + } + + RADEON_WRITE(R600_SCRATCH_UMSK, 0x7); + + /* Turn on bus mastering */ + radeon_enable_bm(dev_priv); + + radeondrm_write_rptr(dev_priv, R600_SCRATCHOFF(0), 0); + RADEON_WRITE(R600_LAST_FRAME_REG, 0); + + radeondrm_write_rptr(dev_priv, R600_SCRATCHOFF(1), 0); + RADEON_WRITE(R600_LAST_DISPATCH_REG, 0); + + radeondrm_write_rptr(dev_priv, R600_SCRATCHOFF(2), 0); + RADEON_WRITE(R600_LAST_CLEAR_REG, 0); + + /* reset sarea copies of these */ + if (dev_priv->sarea_priv) { + dev_priv->sarea_priv->last_frame = 0; + dev_priv->sarea_priv->last_dispatch = 0; + dev_priv->sarea_priv->last_clear = 0; + } + + r600_do_wait_for_idle(dev_priv); +} + void radeon_cp_init_ring_buffer(struct drm_device *dev, drm_radeon_private_t *dev_priv) { u32 ring_start, cur_read_ptr; - u32 tmp; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + r600_cp_init_ring_buffer(dev, dev_priv); + return; + } /* Initialize the memory controller. With new memory map, the fb location * is not changed, it should have been properly initialized already. Part * of the problem is that the code below is bogus, assuming the GART is @@ -660,36 +2409,7 @@ radeon_cp_init_ring_buffer(struct drm_device *dev, RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7); - /* Turn on bus mastering */ - switch (dev_priv->flags & RADEON_FAMILY_MASK) { - case CHIP_RS690: - /* rs600/rs690 */ - tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS; - RADEON_WRITE(RADEON_BUS_CNTL, tmp); - break; - case CHIP_R100: - case CHIP_RV100: - case CHIP_RS100: - case CHIP_RV200: - case CHIP_RS200: - case CHIP_R200: - case CHIP_RV250: - case CHIP_RS300: - case CHIP_RV280: - case CHIP_R300: - case CHIP_R350: - case CHIP_RV350: - case CHIP_R420: - case CHIP_RS400: - case CHIP_RS480: - /* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */ - tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS; - RADEON_WRITE(RADEON_BUS_CNTL, tmp); - break; - default: - /* PCIE cards appear not to need this */ - break; - } + radeon_enable_bm(dev_priv); radeondrm_write_rptr(dev_priv, RADEON_SCRATCHOFF(0), 0); dev_priv->sarea_priv->last_frame = 0; @@ -698,7 +2418,7 @@ radeon_cp_init_ring_buffer(struct drm_device *dev, radeondrm_write_rptr(dev_priv, RADEON_SCRATCHOFF(1), 0); dev_priv->sarea_priv->last_dispatch = 0; RADEON_WRITE(RADEON_LAST_DISPATCH_REG, - dev_priv->sarea_priv->last_dispatch); + dev_priv->sarea_priv->last_dispatch); radeondrm_write_rptr(dev_priv, RADEON_SCRATCHOFF(2), 0); dev_priv->sarea_priv->last_clear = 0; @@ -720,17 +2440,35 @@ radeon_test_writeback(drm_radeon_private_t *dev_priv) { u32 tmp; + /* Start with assuming that writeback doesn't work */ + dev_priv->writeback_works = 0; + /* Writeback doesn't seem to work everywhere, test it here and possibly * enable it if it appears to work */ - radeondrm_write_rptr(dev_priv, RADEON_SCRATCHOFF(1), 0); - RADEON_WRITE(RADEON_SCRATCH_REG1, 0xdeadbeef); - for (tmp = 0; tmp < dev_priv->usec_timeout; tmp++) { - if (radeondrm_read_rptr(dev_priv, RADEON_SCRATCHOFF(1)) == - 0xdeadbeef) + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + radeondrm_write_rptr(dev_priv, R600_SCRATCHOFF(1), 0); + RADEON_WRITE(R600_SCRATCH_REG1, 0xdeadbeef); + + for (tmp = 0; tmp < dev_priv->usec_timeout; tmp++) { + u32 val; + + val = radeondrm_read_rptr(dev_priv, R600_SCRATCHOFF(1)); + if (val == 0xdeadbeef) + break; + DRM_UDELAY(1); + } + } else { + radeondrm_write_rptr(dev_priv, RADEON_SCRATCHOFF(1), 0); + RADEON_WRITE(RADEON_SCRATCH_REG1, 0xdeadbeef); + + for (tmp = 0; tmp < dev_priv->usec_timeout; tmp++) { + if (radeondrm_read_rptr(dev_priv, + RADEON_SCRATCHOFF(1)) == 0xdeadbeef) break; - DRM_UDELAY(1); + DRM_UDELAY(1); + } } if (tmp < dev_priv->usec_timeout) { @@ -747,9 +2485,76 @@ radeon_test_writeback(drm_radeon_private_t *dev_priv) if (!dev_priv->writeback_works) { /* Disable writeback to avoid unnecessary bus master transfers */ - RADEON_WRITE(RADEON_CP_RB_CNTL, RADEON_READ(RADEON_CP_RB_CNTL) | RADEON_RB_NO_UPDATE); - RADEON_WRITE(RADEON_SCRATCH_UMSK, 0); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + RADEON_WRITE(R600_CP_RB_CNTL, + RADEON_READ(R600_CP_RB_CNTL) | RADEON_RB_NO_UPDATE); + RADEON_WRITE(R600_SCRATCH_UMSK, 0); + } else { + RADEON_WRITE(RADEON_CP_RB_CNTL, + RADEON_READ(RADEON_CP_RB_CNTL) | + RADEON_RB_NO_UPDATE); + RADEON_WRITE(RADEON_SCRATCH_UMSK, 0); + } + } +} + +void +r600_page_table_cleanup(struct drm_device *dev, + struct drm_ati_pcigart_info *gart_info) +{ + if (gart_info->bus_addr) { + gart_info->bus_addr = 0; + if (gart_info->gart_table_location == DRM_ATI_GART_MAIN && + gart_info->tbl.dma.mem != NULL) { + drm_dmamem_free(dev->dmat, gart_info->tbl.dma.mem); + gart_info->tbl.dma.mem = NULL; + } + } +} + +void +r600gart_add_entry(struct drm_ati_pcigart_info *gart_info, bus_size_t offset, + bus_addr_t entry_addr) +{ + u_int64_t page_base = (u_int64_t)entry_addr & + ATI_PCIGART_PAGE_MASK; + page_base |= R600_PTE_VALID | R600_PTE_SYSTEM | R600_PTE_SNOOPED; + page_base |= R600_PTE_READABLE | R600_PTE_WRITEABLE; + bus_space_write_4(gart_info->tbl.fb.bst, gart_info->tbl.fb.bsh, + offset * sizeof(u_int64_t), (u_int32_t)page_base); + bus_space_write_4(gart_info->tbl.fb.bst, gart_info->tbl.fb.bsh, + offset * sizeof(u_int64_t) + 4, upper_32_bits(page_base)); +} + +/* R600 has page table setup */ +int r600_page_table_init(struct drm_device *dev) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + struct drm_ati_pcigart_info *gart_info = &dev_priv->gart_info; + struct drm_sg_mem *entry = dev->sg; + int i, j, max_pages, pages, gart_idx; + bus_addr_t entry_addr; + + /* okay page table is available - lets rock */ + + max_pages = (gart_info->table_size / sizeof(u_int64_t)); + /* convert from ati pages */ + max_pages /= (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); + pages = (entry->mem->map->dm_nsegs <= max_pages) ? + entry->mem->map->dm_nsegs : max_pages; + + bus_space_set_region_1(gart_info->tbl.fb.bst, gart_info->tbl.fb.bsh, + 0, 0, gart_info->table_size); + + KASSERT(PAGE_SIZE >= ATI_PCIGART_PAGE_SIZE); + + for (gart_idx = 0, i = 0; i < pages; i++) { + entry_addr = dev->sg->mem->map->dm_segs[i].ds_addr; + for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); + j++, entry_addr += ATI_PCIGART_PAGE_SIZE) + r600gart_add_entry(gart_info, gart_idx++, entry_addr); } + return 0; } /* @@ -761,6 +2566,7 @@ radeondrm_setup_pcigart(struct drm_radeon_private *dev_priv) struct drm_ati_pcigart_info *agi = &dev_priv->gart_info; struct drm_device *dev; bus_addr_t gartaddr; + u_int32_t sctrl; int ret; dev = (struct drm_device *)dev_priv->drmdev; @@ -780,28 +2586,59 @@ radeondrm_setup_pcigart(struct drm_radeon_private *dev_priv) /* this is a radeon virtual address */ agi->bus_addr = dev_priv->fb_location + dev_priv->pcigart_offset; - agi->gart_reg_if = dev_priv->flags & RADEON_IS_PCIE ? - DRM_ATI_GART_PCIE : DRM_ATI_GART_PCI; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + agi->gart_reg_if = DRM_ATI_GART_R600; + } else if (dev_priv->flags & RADEON_IS_PCIE) { + agi->gart_reg_if = DRM_ATI_GART_PCIE; + } else { + agi->gart_reg_if = DRM_ATI_GART_PCI; + } agi->gart_table_location = DRM_ATI_GART_FB; } else { - if (dev_priv->flags & RADEON_IS_PCIE) { + if (dev_priv->flags & RADEON_IS_PCIE || + ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)) { DRM_ERROR("Cannot use PCI Express without GART " "in FB memory\n"); return (EINVAL); } - agi->gart_reg_if = dev_priv->flags & RADEON_IS_IGPGART ? - DRM_ATI_GART_IGP : DRM_ATI_GART_PCI; + if (dev_priv->flags & RADEON_IS_IGPGART) + agi->gart_reg_if = DRM_ATI_GART_IGP; + else + agi->gart_reg_if = DRM_ATI_GART_PCI; + agi->gart_table_location = DRM_ATI_GART_MAIN; /* pcigart_init will allocate dma memory for us */ agi->bus_addr = 0; } - if (drm_ati_pcigart_init(dev, agi)) { + if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_R600) { + /* clear surfaces while we write the gart */ + sctrl = RADEON_READ(RADEON_SURFACE_CNTL); + RADEON_WRITE(RADEON_SURFACE_CNTL, 0); + } + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600 || + ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)) + ret = r600_page_table_init(dev); + else + ret = drm_ati_pcigart_init(dev, agi); + if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_R600) + RADEON_WRITE(RADEON_SURFACE_CNTL, sctrl); + if (ret) { DRM_ERROR("failed to init PCI GART!\n"); return (ENOMEM); } + if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_R600 && + (ret = radeon_setup_pcigart_surface(dev_priv)) != 0) { + DRM_ERROR("failed to setup GART surface!\n"); + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) + r600_page_table_cleanup(dev, &dev_priv->gart_info); + else + drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info); + return (ret); + } + /* Turn on PCI GART */ radeon_set_pcigart(dev_priv, 1); @@ -810,8 +2647,7 @@ radeondrm_setup_pcigart(struct drm_radeon_private *dev_priv) /* Enable or disable IGP GART on the chip */ void -radeon_set_igpgart(drm_radeon_private_t *dev_priv, int on) -{ +radeon_set_igpgart(drm_radeon_private_t *dev_priv, int on) { u32 temp; if (on) { @@ -821,8 +2657,8 @@ radeon_set_igpgart(drm_radeon_private_t *dev_priv, int on) dev_priv->gart_size); temp = IGP_READ_MCIND(dev_priv, RS480_MC_MISC_CNTL); - - if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) + if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, (RS480_GART_INDEX_REG_EN | RS690_BLOCK_GFX_D3_EN)); else @@ -848,8 +2684,8 @@ radeon_set_igpgart(drm_radeon_private_t *dev_priv, int on) radeon_write_agp_base(dev_priv, dev_priv->gart_vm_start); dev_priv->gart_size = 32*1024*1024; - temp = (((dev_priv->gart_vm_start - 1 + dev_priv->gart_size) & - 0xffff0000) | (dev_priv->gart_vm_start >> 16)); + temp = (((dev_priv->gart_vm_start - 1 + dev_priv->gart_size) & + 0xffff0000) | (dev_priv->gart_vm_start >> 16)); radeon_write_agp_location(dev_priv, temp); @@ -862,7 +2698,7 @@ radeon_set_igpgart(drm_radeon_private_t *dev_priv, int on) if ((temp & RS480_GART_CACHE_INVALIDATE) == 0) break; DRM_UDELAY(1); - } while(1); + } while (1); IGP_WRITE_MCIND(RS480_GART_CACHE_CNTRL, RS480_GART_CACHE_INVALIDATE); @@ -872,7 +2708,7 @@ radeon_set_igpgart(drm_radeon_private_t *dev_priv, int on) if ((temp & RS480_GART_CACHE_INVALIDATE) == 0) break; DRM_UDELAY(1); - } while(1); + } while (1); IGP_WRITE_MCIND(RS480_GART_CACHE_CNTRL, 0); } else { @@ -880,6 +2716,83 @@ radeon_set_igpgart(drm_radeon_private_t *dev_priv, int on) } } +/* Enable or disable IGP GART on the chip */ +void +rs600_set_igpgart(drm_radeon_private_t *dev_priv, int on) +{ + u32 temp; + int i; + + if (on) { + DRM_DEBUG("programming igp gart %08X %08lX %08X\n", + dev_priv->gart_vm_start, + (long)dev_priv->gart_info.bus_addr, + dev_priv->gart_size); + + IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, (RS600_EFFECTIVE_L2_CACHE_SIZE(6) | + RS600_EFFECTIVE_L2_QUEUE_SIZE(6))); + + for (i = 0; i < 19; i++) + IGP_WRITE_MCIND(RS600_MC_PT0_CLIENT0_CNTL + i, + (RS600_ENABLE_TRANSLATION_MODE_OVERRIDE | + RS600_SYSTEM_ACCESS_MODE_IN_SYS | + RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASSTHROUGH | + RS600_EFFECTIVE_L1_CACHE_SIZE(3) | + RS600_ENABLE_FRAGMENT_PROCESSING | + RS600_EFFECTIVE_L1_QUEUE_SIZE(3))); + + IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_CNTL, (RS600_ENABLE_PAGE_TABLE | + RS600_PAGE_TABLE_TYPE_FLAT)); + + /* disable all other contexts */ + for (i = 1; i < 8; i++) + IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_CNTL + i, 0); + + /* setup the page table aperture */ + IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_FLAT_BASE_ADDR, + dev_priv->gart_info.bus_addr); + IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_FLAT_START_ADDR, + dev_priv->gart_vm_start); + IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_FLAT_END_ADDR, + (dev_priv->gart_vm_start + dev_priv->gart_size - 1)); + IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR, 0); + + /* setup the system aperture */ + IGP_WRITE_MCIND(RS600_MC_PT0_SYSTEM_APERTURE_LOW_ADDR, + dev_priv->gart_vm_start); + IGP_WRITE_MCIND(RS600_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR, + (dev_priv->gart_vm_start + dev_priv->gart_size - 1)); + + /* enable page tables */ + temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL); + IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, (temp | RS600_ENABLE_PT)); + + temp = IGP_READ_MCIND(dev_priv, RS600_MC_CNTL1); + IGP_WRITE_MCIND(RS600_MC_CNTL1, (temp | RS600_ENABLE_PAGE_TABLES)); + + /* invalidate the cache */ + temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL); + + temp &= ~(RS600_INVALIDATE_ALL_L1_TLBS | RS600_INVALIDATE_L2_CACHE); + IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, temp); + temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL); + + temp |= RS600_INVALIDATE_ALL_L1_TLBS | RS600_INVALIDATE_L2_CACHE; + IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, temp); + temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL); + + temp &= ~(RS600_INVALIDATE_ALL_L1_TLBS | RS600_INVALIDATE_L2_CACHE); + IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, temp); + temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL); + + } else { + IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, 0); + temp = IGP_READ_MCIND(dev_priv, RS600_MC_CNTL1); + temp &= ~RS600_ENABLE_PAGE_TABLES; + IGP_WRITE_MCIND(RS600_MC_CNTL1, temp); + } +} + void radeon_set_pciegart(drm_radeon_private_t *dev_priv, int on) { @@ -916,10 +2829,25 @@ radeon_set_pcigart(drm_radeon_private_t *dev_priv, int on) { u32 tmp; - if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + + if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)) { + if (on) + r700_vm_init(dev_priv); + return; + } else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + if (on) + r600_vm_init(dev_priv); + return; + } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740) || (dev_priv->flags & RADEON_IS_IGPGART)) { radeon_set_igpgart(dev_priv, on); return; + } else + + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) { + rs600_set_igpgart(dev_priv, on); + return; } if (dev_priv->flags & RADEON_IS_PCIE) { @@ -954,9 +2882,53 @@ radeon_set_pcigart(drm_radeon_private_t *dev_priv, int on) } int +radeon_setup_pcigart_surface(drm_radeon_private_t *dev_priv) +{ + struct drm_ati_pcigart_info *gart_info = &dev_priv->gart_info; + struct radeon_virt_surface *vp; + int i; + + for (i = 0; i < RADEON_MAX_SURFACES * 2; i++) { + if (!dev_priv->virt_surfaces[i].file_priv || + dev_priv->virt_surfaces[i].file_priv == PCIGART_FILE_PRIV) + break; + } + if (i >= 2 * RADEON_MAX_SURFACES) + return ENOMEM; + vp = &dev_priv->virt_surfaces[i]; + + for (i = 0; i < RADEON_MAX_SURFACES; i++) { + struct radeon_surface *sp = &dev_priv->surfaces[i]; + if (sp->refcount) + continue; + + vp->surface_index = i; + vp->lower = gart_info->bus_addr; + vp->upper = vp->lower + gart_info->table_size; + vp->flags = 0; + vp->file_priv = PCIGART_FILE_PRIV; + + sp->refcount = 1; + sp->lower = vp->lower; + sp->upper = vp->upper; + sp->flags = 0; + + RADEON_WRITE(RADEON_SURFACE0_INFO + 16 * i, sp->flags); + RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND + 16 * i, sp->lower); + RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND + 16 * i, sp->upper); + return 0; + } + + return ENOMEM; +} + +int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init) { - drm_radeon_private_t *dev_priv = dev->dev_private; + drm_radeon_private_t *dev_priv = dev->dev_private; + u_int32_t ssz; + int lshift, sshift; + DRM_DEBUG("\n"); @@ -967,14 +2939,18 @@ radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init) return EINVAL; } - if (init->is_pci && (dev_priv->flags & RADEON_IS_AGP)) - { + if (init->is_pci && (dev_priv->flags & RADEON_IS_AGP)) { DRM_DEBUG("Forcing AGP card to PCI mode\n"); dev_priv->flags &= ~RADEON_IS_AGP; - } - else if (!(dev_priv->flags & (RADEON_IS_AGP | RADEON_IS_PCI | RADEON_IS_PCIE)) - && !init->is_pci) - { + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + /* The writeback test succeeds, but when writeback is + * enabled, the ring buffer read ptr update fails + * after first 128 bytes. + */ + radeon_no_wb = 1; + } + } else if (!(dev_priv->flags & (RADEON_IS_AGP | RADEON_IS_PCI | RADEON_IS_PCIE)) + && !init->is_pci) { DRM_DEBUG("Restoring AGP flag\n"); dev_priv->flags |= RADEON_IS_AGP; } @@ -1020,47 +2996,50 @@ radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init) dev_priv->back_offset = init->back_offset; dev_priv->back_pitch = init->back_pitch; - switch (init->depth_bpp) { - case 16: - dev_priv->depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z; - break; - case 32: - default: - dev_priv->depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z; - break; + if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_R600) { + switch (init->depth_bpp) { + case 16: + dev_priv->depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z; + break; + case 32: + default: + dev_priv->depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z; + break; + } + dev_priv->depth_offset = init->depth_offset; + dev_priv->depth_pitch = init->depth_pitch; + + /* Hardware state for depth clears. Remove this + * if/when we no longer clear the depth buffer with + * a 3D rectangle. Hard-code all values to prevent + * unwanted 3D state from slipping through and + * screwing with the clear operation. + */ + dev_priv->depth_clear.rb3d_cntl = + (RADEON_PLANE_MASK_ENABLE | + (dev_priv->color_fmt << 10) | + (dev_priv->chip_family < CHIP_R200 ? + RADEON_ZBLOCK16 : 0)); + + dev_priv->depth_clear.rb3d_zstencilcntl = + (dev_priv->depth_fmt | RADEON_Z_TEST_ALWAYS | + RADEON_STENCIL_TEST_ALWAYS | + RADEON_STENCIL_S_FAIL_REPLACE | + RADEON_STENCIL_ZPASS_REPLACE | + RADEON_STENCIL_ZFAIL_REPLACE | + RADEON_Z_WRITE_ENABLE); + + dev_priv->depth_clear.se_cntl = (RADEON_FFACE_CULL_CW | + RADEON_BFACE_SOLID | RADEON_FFACE_SOLID | + RADEON_FLAT_SHADE_VTX_LAST | + RADEON_DIFFUSE_SHADE_FLAT | + RADEON_ALPHA_SHADE_FLAT | + RADEON_SPECULAR_SHADE_FLAT | + RADEON_FOG_SHADE_FLAT | + RADEON_VTX_PIX_CENTER_OGL | + RADEON_ROUND_MODE_TRUNC | + RADEON_ROUND_PREC_8TH_PIX); } - dev_priv->depth_offset = init->depth_offset; - dev_priv->depth_pitch = init->depth_pitch; - - /* Hardware state for depth clears. Remove this if/when we no - * longer clear the depth buffer with a 3D rectangle. Hard-code - * all values to prevent unwanted 3D state from slipping through - * and screwing with the clear operation. - */ - dev_priv->depth_clear.rb3d_cntl = (RADEON_PLANE_MASK_ENABLE | - (dev_priv->color_fmt << 10) | - (dev_priv->chip_family < CHIP_R200 ? RADEON_ZBLOCK16 : 0)); - - dev_priv->depth_clear.rb3d_zstencilcntl = - (dev_priv->depth_fmt | - RADEON_Z_TEST_ALWAYS | - RADEON_STENCIL_TEST_ALWAYS | - RADEON_STENCIL_S_FAIL_REPLACE | - RADEON_STENCIL_ZPASS_REPLACE | - RADEON_STENCIL_ZFAIL_REPLACE | RADEON_Z_WRITE_ENABLE); - - dev_priv->depth_clear.se_cntl = (RADEON_FFACE_CULL_CW | - RADEON_BFACE_SOLID | - RADEON_FFACE_SOLID | - RADEON_FLAT_SHADE_VTX_LAST | - RADEON_DIFFUSE_SHADE_FLAT | - RADEON_ALPHA_SHADE_FLAT | - RADEON_SPECULAR_SHADE_FLAT | - RADEON_FOG_SHADE_FLAT | - RADEON_VTX_PIX_CENTER_OGL | - RADEON_ROUND_MODE_TRUNC | - RADEON_ROUND_PREC_8TH_PIX); - dev_priv->ring_offset = init->ring_offset; dev_priv->ring_rptr_offset = init->ring_rptr_offset; @@ -1071,6 +3050,7 @@ radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init) if (!dev_priv->sarea) { DRM_ERROR("could not find sarea!\n"); radeon_do_cleanup_cp(dev); + /* XXX */ return EINVAL; } @@ -1104,11 +3084,12 @@ radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init) } dev_priv->sarea_priv = - (drm_radeon_sarea_t *) ((u8 *) dev_priv->sarea->handle + - init->sarea_priv_offset); + (drm_radeon_sarea_t *)((u8 *)dev_priv->sarea->handle + + init->sarea_priv_offset); #if __OS_HAS_AGP if (dev_priv->flags & RADEON_IS_AGP) { + /* XXX WC */ drm_core_ioremap(dev_priv->cp_ring, dev); drm_core_ioremap(dev_priv->ring_rptr, dev); drm_core_ioremap(dev->agp_buffer_map, dev); @@ -1136,10 +3117,21 @@ radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init) dev->agp_buffer_map->handle); } - dev_priv->fb_location = (radeon_read_fb_location(dev_priv) & 0xffff) << 16; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + lshift = 24; + sshift = 8; + ssz = 0x1000000; + } else { + lshift = 16; + sshift = 0; + ssz = 0x10000; + } + + dev_priv->fb_location = (radeon_read_fb_location(dev_priv) & 0xffff) << + lshift; dev_priv->fb_size = - ((radeon_read_fb_location(dev_priv) & 0xffff0000u) + 0x10000) - - dev_priv->fb_location; + (((radeon_read_fb_location(dev_priv) & 0xffff0000u) << sshift) + + ssz) - dev_priv->fb_location; dev_priv->front_pitch_offset = (((dev_priv->front_pitch / 64) << 22) | ((dev_priv->front_offset @@ -1197,14 +3189,16 @@ radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init) #if __OS_HAS_AGP if (dev_priv->flags & RADEON_IS_AGP) - dev_priv->gart_buffers_offset = (dev->agp_buffer_map->offset - - dev->agp->base - + dev_priv->gart_vm_start); + dev_priv->gart_buffers_offset = (dev->agp_buffer_map->offset - + dev->agp->base + dev_priv->gart_vm_start); else #endif dev_priv->gart_buffers_offset = (dev->agp_buffer_map->offset - dev->sg->handle + dev_priv->gart_vm_start); + DRM_DEBUG("fb 0x%08x size %d\n", + (unsigned int) dev_priv->fb_location, + (unsigned int) dev_priv->fb_size); DRM_DEBUG("dev_priv->gart_size %d\n", dev_priv->gart_size); DRM_DEBUG("dev_priv->gart_vm_start 0x%x\n", dev_priv->gart_vm_start); DRM_DEBUG("dev_priv->gart_buffers_offset 0x%lx\n", @@ -1236,9 +3230,6 @@ radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init) } } - /* Start with assuming that writeback doesn't work */ - dev_priv->writeback_works = 0; - radeon_cp_load_microcode(dev_priv); radeon_cp_init_ring_buffer(dev, dev_priv); @@ -1271,8 +3262,15 @@ radeon_do_cleanup_cp(struct drm_device *dev) if (dev_priv->gart_info.bus_addr) { /* Turn off PCI GART */ radeon_set_pcigart(dev_priv, 0); - if (drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info)) + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600 + || (dev_priv->flags & RADEON_FAMILY_MASK) == + CHIP_RS600) { + r600_page_table_cleanup(dev, + &dev_priv->gart_info); + } else if (drm_ati_pcigart_cleanup(dev, + &dev_priv->gart_info)) { DRM_ERROR("failed to cleanup PCI GART!\n"); + } } if (dev_priv->gart_info.gart_table_location == @@ -1283,9 +3281,7 @@ radeon_do_cleanup_cp(struct drm_device *dev) memset(&dev_priv->gart_info.tbl, 0, sizeof(dev_priv->gart_info.tbl)); } - dev_priv->cp_ring = NULL; - dev_priv->ring_rptr = NULL; - dev->agp_buffer_map = NULL; + dev->agp_buffer_map = dev_priv->ring_rptr = dev_priv->cp_ring = NULL; return 0; } @@ -1293,7 +3289,7 @@ radeon_do_cleanup_cp(struct drm_device *dev) int radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_priv) { - drm_radeon_init_t *init = data; + drm_radeon_init_t *init = data; LOCK_TEST_WITH_RETURN(dev, file_priv); @@ -1304,6 +3300,7 @@ radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_priv) case RADEON_INIT_CP: case RADEON_INIT_R200_CP: case RADEON_INIT_R300_CP: + case RADEON_INIT_R600_CP: return radeon_do_init_cp(dev, init); case RADEON_CLEANUP_CP: return radeon_do_cleanup_cp(dev); @@ -1363,10 +3360,10 @@ radeon_cp_stop(struct drm_device *dev, void *data, struct drm_file *file_priv) /* Finally, we can turn off the CP. If the engine isn't idle, * we will get some dropped triangles as they won't be fully * rendered before the CP is shut down. + * + * After turning off we reset the engine. */ radeon_do_cp_stop(dev_priv); - - /* Reset the engine */ radeon_do_engine_reset(dev); return 0; @@ -1378,32 +3375,36 @@ radeon_driver_lastclose(struct drm_device *dev) drm_radeon_private_t *dev_priv = dev->dev_private; int i, ret; + radeon_surfaces_release(PCIGART_FILE_PRIV, dev->dev_private); + if (dev_priv->cp_running) { /* Stop the cp */ while ((ret = radeon_do_cp_idle(dev_priv)) != 0) { DRM_DEBUG("radeon_do_cp_idle %d\n", ret); - tsleep(&ret, PZERO, "rdnrel", 1); + tsleep(&ret, PZERO, "rdnrel", 1); } radeon_do_cp_stop(dev_priv); radeon_do_engine_reset(dev); } - /* Disable *all* interrupts */ - RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); - - /* remove all surfaces */ - for (i = 0; i < RADEON_MAX_SURFACES; i++) { - RADEON_WRITE(RADEON_SURFACE0_INFO + 16 * i, 0); - RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND + 16 * i, 0); - RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND + 16 * i, 0); - bzero(&dev_priv->surfaces[i], sizeof(struct radeon_surface)); + if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_R600) { + /* Disable *all* interrupts */ + RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); + + /* remove all surfaces */ + for (i = 0; i < RADEON_MAX_SURFACES; i++) { + RADEON_WRITE(RADEON_SURFACE0_INFO + 16 * i, 0); + RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND + 16 * i, 0); + RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND + 16 * i, 0); + bzero(&dev_priv->surfaces[i], + sizeof(struct radeon_surface)); + } } /* Free memory heap structures */ drm_mem_takedown(&dev_priv->gart_heap); drm_mem_takedown(&dev_priv->fb_heap); - /* deallocate kernel resources */ radeon_do_cleanup_cp(dev); } @@ -1476,7 +3477,8 @@ radeon_cp_resume(struct drm_device *dev) radeon_cp_init_ring_buffer(dev, dev_priv); radeon_do_engine_reset(dev); - radeon_irq_set_state(dev, RADEON_SW_INT_ENABLE, 1); + if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_R600) + radeon_irq_set_state(dev, RADEON_SW_INT_ENABLE, 1); DRM_DEBUG("radeon_cp_resume() complete\n"); @@ -1523,15 +3525,16 @@ radeon_freelist_get(struct drm_device *dev) u_int32_t done_age = radeondrm_get_scratch(dev_priv, 1); DRM_DEBUG("done_age = %d\n", done_age); - for (i = start; i < dma->buf_count; i++) { - buf = dma->buflist[i]; + for (i = 0; i < dma->buf_count; i++) { + buf = dma->buflist[start]; buf_priv = buf->dev_private; if (buf->file_priv == NULL || (buf->pending && buf_priv->age <= done_age)) { buf->pending = 0; return buf; } - start = 0; + if (++start >=dma->buf_count) + start = 0; } if (t) { @@ -1539,44 +3542,8 @@ radeon_freelist_get(struct drm_device *dev) } } - DRM_DEBUG("returning NULL!\n"); - return NULL; -} - -#if 0 -struct drm_buf *radeon_freelist_get(struct drm_device * dev) -{ - struct drm_device_dma *dma = dev->dma; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_buf_priv_t *buf_priv; - struct drm_buf *buf; - int i, t; - int start; - u32 done_age; - - done_age = radeondrm_get_scratch(dev_priv, 1); - - if (++dev_priv->last_buf >= dma->buf_count) - dev_priv->last_buf = 0; - - start = dev_priv->last_buf; - - for (t = 0; t < 2; t++) { - for (i = start; i < dma->buf_count; i++) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - if (buf->file_priv == 0 || (buf->pending && - buf_priv->age <= done_age)) { - buf->pending = 0; - return buf; - } - } - start = 0; - } - return NULL; } -#endif void radeon_freelist_reset(struct drm_device *dev) diff --git a/sys/dev/pci/drm/radeon_drm.h b/sys/dev/pci/drm/radeon_drm.h index ffaa46e4b5c..e5f80ec5e3f 100644 --- a/sys/dev/pci/drm/radeon_drm.h +++ b/sys/dev/pci/drm/radeon_drm.h @@ -303,6 +303,7 @@ typedef union { #define RADEON_INDEX_PRIM_OFFSET 20 #define RADEON_SCRATCH_REG_OFFSET 32 +#define R600_SCRATCH_REG_OFFSET 256 #define RADEON_NR_SAREA_CLIPRECTS 12 @@ -526,7 +527,8 @@ typedef struct drm_radeon_init { RADEON_INIT_CP = 0x01, RADEON_CLEANUP_CP = 0x02, RADEON_INIT_R200_CP = 0x03, - RADEON_INIT_R300_CP = 0x04 + RADEON_INIT_R300_CP = 0x04, + RADEON_INIT_R600_CP = 0x05, } func; unsigned long sarea_priv_offset; int is_pci; /* for overriding only */ @@ -652,6 +654,9 @@ typedef struct drm_radeon_indirect { int discard; } drm_radeon_indirect_t; +#define RADEON_INDIRECT_DISCARD (1 << 0) +#define RADEON_INDIRECT_NOFLUSH (1 << 1) + /* enum for card type parameters */ #define RADEON_CARD_PCI 0 #define RADEON_CARD_AGP 1 @@ -677,6 +682,8 @@ typedef struct drm_radeon_indirect { #define RADEON_PARAM_VBLANK_CRTC 13 /* VBLANK CRTC */ #define RADEON_PARAM_FB_LOCATION 14 /* FB location */ #define RADEON_PARAM_NUM_GB_PIPES 15 /* num GB pipes */ +#define RADEON_PARAM_DEVICE_ID 16 +#define RADEON_PARAM_NUM_Z_PIPES 17 /* num Z pipes */ typedef struct drm_radeon_getparam { int param; diff --git a/sys/dev/pci/drm/radeon_drv.c b/sys/dev/pci/drm/radeon_drv.c index b302470d9cf..2a0d3f26f28 100644 --- a/sys/dev/pci/drm/radeon_drv.c +++ b/sys/dev/pci/drm/radeon_drv.c @@ -479,6 +479,29 @@ const static struct drm_pcidev radeondrm_pciidlist[] = { {PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1250IGP, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, #endif + {PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3400_M82, + CHIP_RV620|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, + {PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3450, + CHIP_RV620|RADEON_NEW_MEMMAP}, + {PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3470, + CHIP_RV620||RADEON_NEW_MEMMAP}, + {PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2600_PRO, + CHIP_RV630|RADEON_NEW_MEMMAP}, + {PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3650, + CHIP_RV635|RADEON_NEW_MEMMAP}, + {PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3850, + CHIP_RV670|RADEON_NEW_MEMMAP}, + {PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3300, + CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, + {PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4350, + CHIP_RV710|RADEON_NEW_MEMMAP}, + {PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4650, + CHIP_RV730|RADEON_NEW_MEMMAP}, + {PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4870, + CHIP_RV770|RADEON_NEW_MEMMAP}, + {PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4890, + CHIP_RV770|RADEON_NEW_MEMMAP}, + {0, 0, 0} }; @@ -734,16 +757,30 @@ u_int32_t radeondrm_get_scratch(struct drm_radeon_private *dev_priv, u_int32_t off) { if (dev_priv->writeback_works) - return (radeondrm_read_rptr(dev_priv, RADEON_SCRATCHOFF(off))); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + return radeondrm_read_rptr(dev_priv, + R600_SCRATCHOFF(off)); + else + return radeondrm_read_rptr(dev_priv, + RADEON_SCRATCHOFF(off)); else - return (RADEON_READ( RADEON_SCRATCH_REG0 + 4*(off) )); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + return RADEON_READ(R600_SCRATCH_REG0 + 4 * off); + else + return RADEON_READ(RADEON_SCRATCH_REG0 + 4 * off); } void radeondrm_begin_ring(struct drm_radeon_private *dev_priv, int ncmd) { + int align_nr; RADEON_VPRINTF("%d\n", ncmd); - if (dev_priv->ring.space <= ncmd) { + + align_nr = RADEON_RING_ALIGN - ((dev_priv->ring.tail + ncmd) & + (RADEON_RING_ALIGN - 1)); + align_nr += ncmd; + + if (dev_priv->ring.space <= align_nr) { radeondrm_commit_ring(dev_priv); radeon_wait_ring(dev_priv, ncmd); } @@ -769,12 +806,38 @@ radeondrm_advance_ring(struct drm_radeon_private *dev_priv) void radeondrm_commit_ring(struct drm_radeon_private *dev_priv) { + int i, tail_aligned, num_p2; + u_int32_t *ring; + + /* check if the ring is padded out to 16-dword alignment */ + + tail_aligned = dev_priv->ring.tail & (RADEON_RING_ALIGN - 1); + if (tail_aligned) { + num_p2 = RADEON_RING_ALIGN - tail_aligned; + + ring = dev_priv->ring.start; + /* pad with some CP_PACKET2 */ + for (i = 0; i < num_p2; i++) + ring[dev_priv->ring.tail + i] = CP_PACKET2(); + + dev_priv->ring.tail += i; + dev_priv->ring.space -= num_p2; + + } + dev_priv->ring.tail &= dev_priv->ring.tail_mask; + /* XXX 128byte aligned stuff */ /* flush write combining buffer and writes to ring */ DRM_MEMORYBARRIER(); radeondrm_get_ring_head(dev_priv); - RADEON_WRITE(RADEON_CP_RB_WPTR, dev_priv->ring.tail); - /* read from PCI bus to ensure correct posting */ - RADEON_READ(RADEON_CP_RB_RPTR); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + RADEON_WRITE(R600_CP_RB_WPTR, dev_priv->ring.tail); + /* read from PCI bus to ensure correct posting */ + RADEON_READ(R600_CP_RB_RPTR); + } else { + RADEON_WRITE(RADEON_CP_RB_WPTR, dev_priv->ring.tail); + /* read from PCI bus to ensure correct posting */ + RADEON_READ(RADEON_CP_RB_RPTR); + } } void diff --git a/sys/dev/pci/drm/radeon_drv.h b/sys/dev/pci/drm/radeon_drv.h index 586c1595a92..febaa7c55f7 100644 --- a/sys/dev/pci/drm/radeon_drv.h +++ b/sys/dev/pci/drm/radeon_drv.h @@ -99,10 +99,11 @@ * 1.27- Add support for IGP GART * 1.28- Add support for VBL on CRTC2 * 1.29- R500 3D cmd buffer support + * 1.30- Add support for occlusion queries + * 1.31- Add support for num Z pipes from GET_PARAM */ - #define DRIVER_MAJOR 1 -#define DRIVER_MINOR 29 +#define DRIVER_MINOR 31 #define DRIVER_PATCHLEVEL 0 /* @@ -127,13 +128,27 @@ enum radeon_family { CHIP_RV410, CHIP_RS400, CHIP_RS480, + CHIP_RS600, CHIP_RS690, + CHIP_RS740, CHIP_RV515, CHIP_R520, CHIP_RV530, CHIP_RV560, CHIP_RV570, CHIP_R580, + CHIP_R600, + CHIP_RV610, + CHIP_RV630, + CHIP_RV620, + CHIP_RV635, + CHIP_RV670, + CHIP_RS780, + CHIP_RS880, + CHIP_RV770, + CHIP_RV730, + CHIP_RV710, + CHIP_RV740, CHIP_LAST, }; @@ -201,6 +216,7 @@ struct radeon_virt_surface { u32 upper; u32 flags; struct drm_file *file_priv; +#define PCIGART_FILE_PRIV ((void *) -1L) }; #define RADEON_FLUSH_EMITED (1 << 0) @@ -236,6 +252,7 @@ typedef struct drm_radeon_private { int writeback_works; int usec_timeout; + int microcode_version; int page_flipping; @@ -289,7 +306,30 @@ typedef struct drm_radeon_private { unsigned long fb_aper_size; int num_gb_pipes; + int num_z_pipes; int track_flush; + + /* r6xx/r7xx pipe/shader config */ + int r600_max_pipes; + int r600_max_tile_pipes; + int r600_max_simds; + int r600_max_backends; + int r600_max_gprs; + int r600_max_threads; + int r600_max_stack_entries; + int r600_max_hw_contexts; + int r600_max_gs_threads; + int r600_sx_max_export_size; + int r600_sx_max_export_pos_size; + int r600_sx_max_export_smx_size; + int r600_sq_num_cf_insts; + int r700_sx_num_of_sets; + int r700_sc_prim_fifo_size; + int r700_sc_hiz_tile_fifo_size; + int r700_sc_earlyz_tile_fifo_fize; + /* r6xx/r7xx drm blit vertex buffer */ + struct drm_buf *blit_vb; + uint32_t chip_family; /* extract from flags */ } drm_radeon_private_t; @@ -312,10 +352,10 @@ extern int radeon_no_wb; static __inline__ int radeon_check_offset(drm_radeon_private_t *dev_priv, u64 off) { - u32 fb_start = dev_priv->fb_location; - u32 fb_end = fb_start + dev_priv->fb_size - 1; - u32 gart_start = dev_priv->gart_vm_start; - u32 gart_end = gart_start + dev_priv->gart_size - 1; + u64 fb_start = dev_priv->fb_location; + u64 fb_end = fb_start + dev_priv->fb_size - 1; + u64 gart_start = dev_priv->gart_vm_start; + u64 gart_end = gart_start + dev_priv->gart_size - 1; return ((off >= fb_start && off <= fb_end) || (off >= gart_start && off <= gart_end)); @@ -335,6 +375,12 @@ void radeondrm_out_ring_table(struct drm_radeon_private *, u_int32_t *, int); /* radeon_cp.c */ +u32 radeon_read_fb_location(drm_radeon_private_t *); +void radeon_write_fb_location(drm_radeon_private_t *, u32); +void radeon_write_fb_location(drm_radeon_private_t *, u32); +void radeon_write_agp_location(drm_radeon_private_t *, u32); +void radeon_write_agp_base(drm_radeon_private_t *, u64); + extern int radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int radeon_cp_start(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int radeon_cp_stop(struct drm_device *dev, void *data, struct drm_file *file_priv); @@ -343,10 +389,13 @@ extern int radeon_cp_idle(struct drm_device *dev, void *data, struct drm_file *f extern int radeon_cp_resume(struct drm_device *dev); extern int radeon_cp_buffers(struct drm_device *, struct drm_dma *, struct drm_file *); +void radeon_cp_discard_buffer(struct drm_device *, struct drm_buf *); extern u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv); +void radeon_enable_bm(struct drm_radeon_private *); extern int radeon_surface_alloc(struct drm_device *, void *, struct drm_file *); extern int radeon_surface_free(struct drm_device *, void *, struct drm_file *); +extern void radeon_surfaces_release(struct drm_file *, drm_radeon_private_t *); extern int radeon_cp_swap(struct drm_device *, void *, struct drm_file *); extern int radeon_cp_clear(struct drm_device *, void *, struct drm_file *); extern int radeon_cp_texture(struct drm_device *, void *, struct drm_file *); @@ -393,12 +442,40 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, struct drm_file *file_priv, drm_radeon_kcmd_buffer_t *cmdbuf); +/* r600_cp.c */ +int r600_do_engine_reset(struct drm_device *); +int r600_do_cleanup_cp(struct drm_device *); +int r600_do_init_cp(struct drm_device *, drm_radeon_init_t *); +int r600_do_resume_cp(struct drm_device *); +int r600_do_cp_idle(drm_radeon_private_t *); +void r600_do_cp_start(drm_radeon_private_t *); +void r600_do_cp_reset(drm_radeon_private_t *); +void r600_do_cp_stop(drm_radeon_private_t *); +int r600_cp_dispatch_indirect(struct drm_device *, struct drm_buf *, + int, int); +int r600_page_table_init(struct drm_device *); +void r600_page_table_cleanup(struct drm_device *, + struct drm_ati_pcigart_info *); +void r600_cp_dispatch_swap(struct drm_device *, struct drm_file *); +int r600_cp_dispatch_texture(struct drm_device *, struct drm_file *, + drm_radeon_texture_t *, drm_radeon_tex_image_t *); + +/* r600_blit.c */ +int r600_prepare_blit_copy(struct drm_device *, struct drm_file *); +void r600_done_blit_copy(struct drm_device *); +void r600_blit_copy(struct drm_device *, uint64_t, uint64_t, int); +void r600_blit_swap(struct drm_device *, uint64_t, uint64_t, int, int, + int, int, int, int, int, int, int); + /* Register definitions, register access macros and drmAddMap constants * for Radeon kernel driver. */ +#define RADEON_MM_INDEX 0x0000 +#define RADEON_MM_DATA 0x0004 + #define RADEON_AGP_COMMAND 0x0f60 -#define RADEON_AGP_COMMAND_PCI_CONFIG 0x0060 /* offset in PCI config */ -# define RADEON_AGP_ENABLE (1<<8) +#define RADEON_AGP_COMMAND_PCI_CONFIG 0x0060 /* offset in PCI config */ +# define RADEON_AGP_ENABLE (1<<8) #define RADEON_AUX_SCISSOR_CNTL 0x26f0 # define RADEON_EXCLUSIVE_SCISSOR_0 (1 << 24) # define RADEON_EXCLUSIVE_SCISSOR_1 (1 << 25) @@ -408,36 +485,36 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, # define RADEON_SCISSOR_2_ENABLE (1 << 30) /* - * PCIE radeons (rv370/rv380, rv410, r423/r430/r480, r5xxx) - * don't have an explicit bus mastering disable bit. It's handled - * by the PCI D-states. PMI_BM_DIS disables D-state bus master - * handling, but not bus mastering itself. + * PCIE radeons (rv370/rv380, rv410, r423/r430/r480, r5xx) + * don't have an explicit bus mastering disable bit. It's handled + * by the PCI D-states. PMI_BM_DIS disables D-state bus master + * handling, not bus mastering itself. */ #define RADEON_BUS_CNTL 0x0030 /* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */ # define RADEON_BUS_MASTER_DIS (1 << 6) /* rs600/rs690/rs740 */ # define RS600_BUS_MASTER_DIS (1 << 14) -# define RS600_MSI_REARM (1 << 20) -/* see RS480_MSI_REARM in AIC_CNTL for rs480 */ +# define RS600_MSI_REARM (1 << 20) +/* see RS400_MSI_REARM in AIC_CNTL for rs480 */ #define RADEON_BUS_CNTL1 0x0034 # define RADEON_PMI_BM_DIS (1 << 2) # define RADEON_PMI_INT_DIS (1 << 3) #define RV370_BUS_CNTL 0x004c -# define RV370_PMI_BM_DIS (1 << 5) +# define RV370_PMI_BM_DIS (1 << 5) # define RV370_PMI_INT_DIS (1 << 6) #define RADEON_MSI_REARM_EN 0x0160 /* rv370/rv380, rv410, r423/r430/r480, r5xx */ -# define RV370_MSI_REARM_EN (1 << 0) +# define RV370_MSI_REARM_EN (1 << 0) #define RADEON_CLOCK_CNTL_DATA 0x000c # define RADEON_PLL_WR_EN (1 << 7) #define RADEON_CLOCK_CNTL_INDEX 0x0008 #define RADEON_CONFIG_APER_SIZE 0x0108 -#define RADEON_CONFIG_MEMSIZE 0x00f8 +#define RADEON_CONFIG_MEMSIZE 0x00f8 #define RADEON_CRTC_OFFSET 0x0224 #define RADEON_CRTC_OFFSET_CNTL 0x0228 # define RADEON_CRTC_TILE_EN (1 << 15) @@ -517,6 +594,56 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, #define RS690_MC_AGP_BASE 0x102 #define RS690_MC_AGP_BASE_2 0x103 +#define RS600_MC_INDEX 0x70 +# define RS600_MC_ADDR_MASK 0xffff +# define RS600_MC_IND_SEQ_RBS_0 (1 << 16) +# define RS600_MC_IND_SEQ_RBS_1 (1 << 17) +# define RS600_MC_IND_SEQ_RBS_2 (1 << 18) +# define RS600_MC_IND_SEQ_RBS_3 (1 << 19) +# define RS600_MC_IND_AIC_RBS (1 << 20) +# define RS600_MC_IND_CITF_ARB0 (1 << 21) +# define RS600_MC_IND_CITF_ARB1 (1 << 22) +# define RS600_MC_IND_WR_EN (1 << 23) +#define RS600_MC_DATA 0x74 + +#define RS600_MC_STATUS 0x0 +# define RS600_MC_IDLE (1 << 1) +#define RS600_MC_FB_LOCATION 0x4 +#define RS600_MC_AGP_LOCATION 0x5 +#define RS600_AGP_BASE 0x6 +#define RS600_AGP_BASE_2 0x7 +#define RS600_MC_CNTL1 0x9 +# define RS600_ENABLE_PAGE_TABLES (1 << 26) +#define RS600_MC_PT0_CNTL 0x100 +# define RS600_ENABLE_PT (1 << 0) +# define RS600_EFFECTIVE_L2_CACHE_SIZE(x) ((x) << 15) +# define RS600_EFFECTIVE_L2_QUEUE_SIZE(x) ((x) << 21) +# define RS600_INVALIDATE_ALL_L1_TLBS (1 << 28) +# define RS600_INVALIDATE_L2_CACHE (1 << 29) +#define RS600_MC_PT0_CONTEXT0_CNTL 0x102 +# define RS600_ENABLE_PAGE_TABLE (1 << 0) +# define RS600_PAGE_TABLE_TYPE_FLAT (0 << 1) +#define RS600_MC_PT0_SYSTEM_APERTURE_LOW_ADDR 0x112 +#define RS600_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR 0x114 +#define RS600_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR 0x11c +#define RS600_MC_PT0_CONTEXT0_FLAT_BASE_ADDR 0x12c +#define RS600_MC_PT0_CONTEXT0_FLAT_START_ADDR 0x13c +#define RS600_MC_PT0_CONTEXT0_FLAT_END_ADDR 0x14c +#define RS600_MC_PT0_CLIENT0_CNTL 0x16c +# define RS600_ENABLE_TRANSLATION_MODE_OVERRIDE (1 << 0) +# define RS600_TRANSLATION_MODE_OVERRIDE (1 << 1) +# define RS600_SYSTEM_ACCESS_MODE_MASK (3 << 8) +# define RS600_SYSTEM_ACCESS_MODE_PA_ONLY (0 << 8) +# define RS600_SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 8) +# define RS600_SYSTEM_ACCESS_MODE_IN_SYS (2 << 8) +# define RS600_SYSTEM_ACCESS_MODE_NOT_IN_SYS (3 << 8) +# define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASSTHROUGH (0 << 10) +# define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_DEFAULT_PAGE (1 << 10) +# define RS600_EFFECTIVE_L1_CACHE_SIZE(x) ((x) << 11) +# define RS600_ENABLE_FRAGMENT_PROCESSING (1 << 14) +# define RS600_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 15) +# define RS600_INVALIDATE_L1_TLB (1 << 20) + #define R520_MC_IND_INDEX 0x70 #define R520_MC_IND_WR_EN (1 << 24) #define R520_MC_IND_DATA 0x74 @@ -540,8 +667,8 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, /* pipe config regs */ #define R400_GB_PIPE_SELECT 0x402c +#define RV530_GB_PIPE_SELECT2 0x4124 #define R500_DYN_SCLK_PWMEM_PIPE 0x000d /* PLL */ -#define R500_SU_REG_DEST 0x42c8 #define R300_GB_TILE_CONFIG 0x4018 # define R300_ENABLE_TILING (1 << 0) # define R300_PIPE_COUNT_RV350 (0 << 1) @@ -600,11 +727,22 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, #define RADEON_SCRATCHOFF( x ) (RADEON_SCRATCH_REG_OFFSET + 4*(x)) -#define RADEON_CRTC_CRNT_FRAME 0x0214 -#define RADEON_CRTC2_CRNT_FRAME 0x0314 +extern u32 radeon_get_scratch(drm_radeon_private_t *dev_priv, int index); + +#define GET_SCRATCH(dev_priv, x) radeon_get_scratch(dev_priv, x) -#define RADEON_CRTC_STATUS 0x005c -#define RADEON_CRTC2_STATUS 0x03fc +#define R600_SCRATCH_REG0 0x8500 +#define R600_SCRATCH_REG1 0x8504 +#define R600_SCRATCH_REG2 0x8508 +#define R600_SCRATCH_REG3 0x850c +#define R600_SCRATCH_REG4 0x8510 +#define R600_SCRATCH_REG5 0x8514 +#define R600_SCRATCH_REG6 0x8518 +#define R600_SCRATCH_REG7 0x851c +#define R600_SCRATCH_UMSK 0x8540 +#define R600_SCRATCH_ADDR 0x8544 + +#define R600_SCRATCHOFF(x) (R600_SCRATCH_REG_OFFSET + 4*(x)) #define RADEON_GEN_INT_CNTL 0x0040 # define RADEON_CRTC_VBLANK_MASK (1 << 0) @@ -623,7 +761,6 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, # define RADEON_SW_INT_FIRE (1 << 26) # define R500_DISPLAY_INT_STATUS (1 << 0) - #define RADEON_HOST_PATH_CNTL 0x0130 # define RADEON_HDP_SOFT_RESET (1 << 26) # define RADEON_HDP_WC_TIMEOUT_MASK (7 << 28) @@ -698,7 +835,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, # define R300_ZC_FLUSH (1 << 0) # define R300_ZC_FREE (1 << 1) # define R300_ZC_BUSY (1 << 31) -#define RADEON_RB3D_DSTCACHE_CTLSTAT 0x325c +#define RADEON_RB3D_DSTCACHE_CTLSTAT 0x325c # define RADEON_RB3D_DC_FLUSH (3 << 0) # define RADEON_RB3D_DC_FREE (3 << 2) # define RADEON_RB3D_DC_FLUSH_ALL 0xf @@ -710,15 +847,15 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, #define RADEON_RB3D_ZSTENCILCNTL 0x1c2c # define RADEON_Z_TEST_MASK (7 << 4) # define RADEON_Z_TEST_ALWAYS (7 << 4) -# define RADEON_Z_HIERARCHY_ENABLE (1 << 8) +# define RADEON_Z_HIERARCHY_ENABLE (1 << 8) # define RADEON_STENCIL_TEST_ALWAYS (7 << 12) # define RADEON_STENCIL_S_FAIL_REPLACE (2 << 16) # define RADEON_STENCIL_ZPASS_REPLACE (2 << 20) # define RADEON_STENCIL_ZFAIL_REPLACE (2 << 24) -# define RADEON_Z_COMPRESSION_ENABLE (1 << 28) -# define RADEON_FORCE_Z_DIRTY (1 << 29) +# define RADEON_Z_COMPRESSION_ENABLE (1 << 28) +# define RADEON_FORCE_Z_DIRTY (1 << 29) # define RADEON_Z_WRITE_ENABLE (1 << 30) -# define RADEON_Z_DECOMPRESSION_ENABLE (1 << 31) +# define RADEON_Z_DECOMPRESSION_ENABLE (1 << 31) #define RADEON_RBBM_SOFT_RESET 0x00f0 # define RADEON_SOFT_RESET_CP (1 << 0) # define RADEON_SOFT_RESET_HI (1 << 1) @@ -886,6 +1023,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, #define RADEON_CP_RB_CNTL 0x0704 # define RADEON_BUF_SWAP_32BIT (2 << 16) # define RADEON_RB_NO_UPDATE (1 << 27) +# define RADEON_RB_RPTR_WR_ENA (1 << 31) #define RADEON_CP_RB_RPTR_ADDR 0x070c #define RADEON_CP_RB_RPTR 0x0710 #define RADEON_CP_RB_WPTR 0x0714 @@ -905,9 +1043,12 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, # define RADEON_CSQ_PRIBM_INDBM (4 << 28) # define RADEON_CSQ_PRIPIO_INDPIO (15 << 28) +#define R300_CP_RESYNC_ADDR 0x0778 +#define R300_CP_RESYNC_DATA 0x077c + #define RADEON_AIC_CNTL 0x01d0 # define RADEON_PCIGART_TRANSLATE_EN (1 << 0) -# define RS400_MSI_REARM (1 << 3) +# define RS400_MSI_REARM (1 << 3) #define RADEON_AIC_STAT 0x01d4 #define RADEON_AIC_PT_BASE 0x01d8 #define RADEON_AIC_LO_ADDR 0x01dc @@ -925,7 +1066,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, # define RADEON_CP_NEXT_CHAR 0x00001900 # define RADEON_CP_PLY_NEXTSCAN 0x00001D00 # define RADEON_CP_SET_SCISSORS 0x00001E00 - /* GEN_INDX_PRIM is unsupported starting with R300 */ + /* GEN_INDX_PRIM is unsupported starting with R300 */ # define RADEON_3D_RNDR_GEN_INDX_PRIM 0x00002300 # define RADEON_WAIT_FOR_IDLE 0x00002600 # define RADEON_3D_DRAW_VBUF 0x00002800 @@ -947,6 +1088,72 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, # define RADEON_CNTL_BITBLT_MULTI 0x00009B00 # define RADEON_CNTL_SET_SCISSORS 0xC0001E00 +# define R600_IT_INDIRECT_BUFFER_END 0x00001700 +# define R600_IT_SET_PREDICATION 0x00002000 +# define R600_IT_REG_RMW 0x00002100 +# define R600_IT_COND_EXEC 0x00002200 +# define R600_IT_PRED_EXEC 0x00002300 +# define R600_IT_START_3D_CMDBUF 0x00002400 +# define R600_IT_DRAW_INDEX_2 0x00002700 +# define R600_IT_CONTEXT_CONTROL 0x00002800 +# define R600_IT_DRAW_INDEX_IMMD_BE 0x00002900 +# define R600_IT_INDEX_TYPE 0x00002A00 +# define R600_IT_DRAW_INDEX 0x00002B00 +# define R600_IT_DRAW_INDEX_AUTO 0x00002D00 +# define R600_IT_DRAW_INDEX_IMMD 0x00002E00 +# define R600_IT_NUM_INSTANCES 0x00002F00 +# define R600_IT_STRMOUT_BUFFER_UPDATE 0x00003400 +# define R600_IT_INDIRECT_BUFFER_MP 0x00003800 +# define R600_IT_MEM_SEMAPHORE 0x00003900 +# define R600_IT_MPEG_INDEX 0x00003A00 +# define R600_IT_WAIT_REG_MEM 0x00003C00 +# define R600_IT_MEM_WRITE 0x00003D00 +# define R600_IT_INDIRECT_BUFFER 0x00003200 +# define R600_IT_CP_INTERRUPT 0x00004000 +# define R600_IT_SURFACE_SYNC 0x00004300 +# define R600_CB0_DEST_BASE_ENA (1 << 6) +# define R600_TC_ACTION_ENA (1 << 23) +# define R600_VC_ACTION_ENA (1 << 24) +# define R600_CB_ACTION_ENA (1 << 25) +# define R600_DB_ACTION_ENA (1 << 26) +# define R600_SH_ACTION_ENA (1 << 27) +# define R600_SMX_ACTION_ENA (1 << 28) +# define R600_IT_ME_INITIALIZE 0x00004400 +# define R600_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16) +# define R600_IT_COND_WRITE 0x00004500 +# define R600_IT_EVENT_WRITE 0x00004600 +# define R600_IT_EVENT_WRITE_EOP 0x00004700 +# define R600_IT_ONE_REG_WRITE 0x00005700 +# define R600_IT_SET_CONFIG_REG 0x00006800 +# define R600_SET_CONFIG_REG_OFFSET 0x00008000 +# define R600_SET_CONFIG_REG_END 0x0000ac00 +# define R600_IT_SET_CONTEXT_REG 0x00006900 +# define R600_SET_CONTEXT_REG_OFFSET 0x00028000 +# define R600_SET_CONTEXT_REG_END 0x00029000 +# define R600_IT_SET_ALU_CONST 0x00006A00 +# define R600_SET_ALU_CONST_OFFSET 0x00030000 +# define R600_SET_ALU_CONST_END 0x00032000 +# define R600_IT_SET_BOOL_CONST 0x00006B00 +# define R600_SET_BOOL_CONST_OFFSET 0x0003e380 +# define R600_SET_BOOL_CONST_END 0x00040000 +# define R600_IT_SET_LOOP_CONST 0x00006C00 +# define R600_SET_LOOP_CONST_OFFSET 0x0003e200 +# define R600_SET_LOOP_CONST_END 0x0003e380 +# define R600_IT_SET_RESOURCE 0x00006D00 +# define R600_SET_RESOURCE_OFFSET 0x00038000 +# define R600_SET_RESOURCE_END 0x0003c000 +# define R600_SQ_TEX_VTX_INVALID_TEXTURE 0x0 +# define R600_SQ_TEX_VTX_INVALID_BUFFER 0x1 +# define R600_SQ_TEX_VTX_VALID_TEXTURE 0x2 +# define R600_SQ_TEX_VTX_VALID_BUFFER 0x3 +# define R600_IT_SET_SAMPLER 0x00006E00 +# define R600_SET_SAMPLER_OFFSET 0x0003c000 +# define R600_SET_SAMPLER_END 0x0003cff0 +# define R600_IT_SET_CTL_CONST 0x00006F00 +# define R600_SET_CTL_CONST_OFFSET 0x0003cff0 +# define R600_SET_CTL_CONST_END 0x0003e200 +# define R600_IT_SURFACE_BASE_UPDATE 0x00007300 + #define RADEON_CP_PACKET_MASK 0xC0000000 #define RADEON_CP_PACKET_COUNT_MASK 0x3fff0000 #define RADEON_CP_PACKET0_REG_MASK 0x000007ff @@ -1110,40 +1317,15 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, #define R200_SE_TCL_POINT_SPRITE_CNTL 0x22c4 -#define R200_PP_TRI_PERF 0x2cf8 +#define R200_PP_TRI_PERF 0x2cf8 #define R200_PP_AFS_0 0x2f80 -#define R200_PP_AFS_1 0x2f00 /* same as txcblend_0 */ +#define R200_PP_AFS_1 0x2f00 /* same as txcblend_0 */ #define R200_VAP_PVS_CNTL_1 0x22D0 -/* MPEG settings from VHA code */ -#define RADEON_VHA_SETTO16_1 0x2694 -#define RADEON_VHA_SETTO16_2 0x2680 -#define RADEON_VHA_SETTO0_1 0x1840 -#define RADEON_VHA_FB_OFFSET 0x19e4 -#define RADEON_VHA_SETTO1AND70S 0x19d8 -#define RADEON_VHA_DST_PITCH 0x1408 - -// set as reference header -#define RADEON_VHA_BACKFRAME0_OFF_Y 0x1840 -#define RADEON_VHA_BACKFRAME1_OFF_PITCH_Y 0x1844 -#define RADEON_VHA_BACKFRAME0_OFF_U 0x1848 -#define RADEON_VHA_BACKFRAME1_OFF_PITCH_U 0x184c -#define RADOEN_VHA_BACKFRAME0_OFF_V 0x1850 -#define RADEON_VHA_BACKFRAME1_OFF_PITCH_V 0x1854 -#define RADEON_VHA_FORWFRAME0_OFF_Y 0x1858 -#define RADEON_VHA_FORWFRAME1_OFF_PITCH_Y 0x185c -#define RADEON_VHA_FORWFRAME0_OFF_U 0x1860 -#define RADEON_VHA_FORWFRAME1_OFF_PITCH_U 0x1864 -#define RADEON_VHA_FORWFRAME0_OFF_V 0x1868 -#define RADEON_VHA_FORWFRAME0_OFF_PITCH_V 0x1880 -#define RADEON_VHA_BACKFRAME0_OFF_Y_2 0x1884 -#define RADEON_VHA_BACKFRAME1_OFF_PITCH_Y_2 0x1888 -#define RADEON_VHA_BACKFRAME0_OFF_U_2 0x188c -#define RADEON_VHA_BACKFRAME1_OFF_PITCH_U_2 0x1890 -#define RADEON_VHA_BACKFRAME0_OFF_V_2 0x1894 -#define RADEON_VHA_BACKFRAME1_OFF_PITCH_V_2 0x1898 +#define RADEON_CRTC_CRNT_FRAME 0x0214 +#define RADEON_CRTC2_CRNT_FRAME 0x0314 #define R500_D1CRTC_STATUS 0x609c #define R500_D2CRTC_STATUS 0x689c @@ -1170,6 +1352,468 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, #define R500_D1_VBLANK_INTERRUPT (1 << 4) #define R500_D2_VBLANK_INTERRUPT (1 << 5) +/* R6xx/R7xx registers */ +#define R600_MC_VM_FB_LOCATION 0x2180 +#define R600_MC_VM_AGP_TOP 0x2184 +#define R600_MC_VM_AGP_BOT 0x2188 +#define R600_MC_VM_AGP_BASE 0x218c +#define R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2190 +#define R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2194 +#define R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x2198 + +#define R700_MC_VM_FB_LOCATION 0x2024 +#define R700_MC_VM_AGP_TOP 0x2028 +#define R700_MC_VM_AGP_BOT 0x202c +#define R700_MC_VM_AGP_BASE 0x2030 +#define R700_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2034 +#define R700_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2038 +#define R700_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x203c + +#define R600_MCD_RD_A_CNTL 0x219c +#define R600_MCD_RD_B_CNTL 0x21a0 + +#define R600_MCD_WR_A_CNTL 0x21a4 +#define R600_MCD_WR_B_CNTL 0x21a8 + +#define R600_MCD_RD_SYS_CNTL 0x2200 +#define R600_MCD_WR_SYS_CNTL 0x2214 + +#define R600_MCD_RD_GFX_CNTL 0x21fc +#define R600_MCD_RD_HDP_CNTL 0x2204 +#define R600_MCD_RD_PDMA_CNTL 0x2208 +#define R600_MCD_RD_SEM_CNTL 0x220c +#define R600_MCD_WR_GFX_CNTL 0x2210 +#define R600_MCD_WR_HDP_CNTL 0x2218 +#define R600_MCD_WR_PDMA_CNTL 0x221c +#define R600_MCD_WR_SEM_CNTL 0x2220 + +# define R600_MCD_L1_TLB (1 << 0) +# define R600_MCD_L1_FRAG_PROC (1 << 1) +# define R600_MCD_L1_STRICT_ORDERING (1 << 2) + +# define R600_MCD_SYSTEM_ACCESS_MODE_MASK (3 << 6) +# define R600_MCD_SYSTEM_ACCESS_MODE_PA_ONLY (0 << 6) +# define R600_MCD_SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 6) +# define R600_MCD_SYSTEM_ACCESS_MODE_IN_SYS (2 << 6) +# define R600_MCD_SYSTEM_ACCESS_MODE_NOT_IN_SYS (3 << 6) + +# define R600_MCD_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU (0 << 8) +# define R600_MCD_SYSTEM_APERTURE_UNMAPPED_ACCESS_DEFAULT_PAGE (1 << 8) + +# define R600_MCD_SEMAPHORE_MODE (1 << 10) +# define R600_MCD_WAIT_L2_QUERY (1 << 11) +# define R600_MCD_EFFECTIVE_L1_TLB_SIZE(x) ((x) << 12) +# define R600_MCD_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 15) + +#define R700_MC_VM_MD_L1_TLB0_CNTL 0x2654 +#define R700_MC_VM_MD_L1_TLB1_CNTL 0x2658 +#define R700_MC_VM_MD_L1_TLB2_CNTL 0x265c + +#define R700_MC_VM_MB_L1_TLB0_CNTL 0x2234 +#define R700_MC_VM_MB_L1_TLB1_CNTL 0x2238 +#define R700_MC_VM_MB_L1_TLB2_CNTL 0x223c +#define R700_MC_VM_MB_L1_TLB3_CNTL 0x2240 + +# define R700_ENABLE_L1_TLB (1 << 0) +# define R700_ENABLE_L1_FRAGMENT_PROCESSING (1 << 1) +# define R700_SYSTEM_ACCESS_MODE_IN_SYS (2 << 3) +# define R700_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU (0 << 5) +# define R700_EFFECTIVE_L1_TLB_SIZE(x) ((x) << 15) +# define R700_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 18) + +#define R700_MC_ARB_RAMCFG 0x2760 +# define R700_NOOFBANK_SHIFT 0 +# define R700_NOOFBANK_MASK 0x3 +# define R700_NOOFRANK_SHIFT 2 +# define R700_NOOFRANK_MASK 0x1 +# define R700_NOOFROWS_SHIFT 3 +# define R700_NOOFROWS_MASK 0x7 +# define R700_NOOFCOLS_SHIFT 6 +# define R700_NOOFCOLS_MASK 0x3 +# define R700_CHANSIZE_SHIFT 8 +# define R700_CHANSIZE_MASK 0x1 +# define R700_BURSTLENGTH_SHIFT 9 +# define R700_BURSTLENGTH_MASK 0x1 +#define R600_RAMCFG 0x2408 +# define R600_NOOFBANK_SHIFT 0 +# define R600_NOOFBANK_MASK 0x1 +# define R600_NOOFRANK_SHIFT 1 +# define R600_NOOFRANK_MASK 0x1 +# define R600_NOOFROWS_SHIFT 2 +# define R600_NOOFROWS_MASK 0x7 +# define R600_NOOFCOLS_SHIFT 5 +# define R600_NOOFCOLS_MASK 0x3 +# define R600_CHANSIZE_SHIFT 7 +# define R600_CHANSIZE_MASK 0x1 +# define R600_BURSTLENGTH_SHIFT 8 +# define R600_BURSTLENGTH_MASK 0x1 + +#define R600_VM_L2_CNTL 0x1400 +# define R600_VM_L2_CACHE_EN (1 << 0) +# define R600_VM_L2_FRAG_PROC (1 << 1) +# define R600_VM_ENABLE_PTE_CACHE_LRU_W (1 << 9) +# define R600_VM_L2_CNTL_QUEUE_SIZE(x) ((x) << 13) +# define R700_VM_L2_CNTL_QUEUE_SIZE(x) ((x) << 14) + +#define R600_VM_L2_CNTL2 0x1404 +# define R600_VM_L2_CNTL2_INVALIDATE_ALL_L1_TLBS (1 << 0) +# define R600_VM_L2_CNTL2_INVALIDATE_L2_CACHE (1 << 1) +#define R600_VM_L2_CNTL3 0x1408 +# define R600_VM_L2_CNTL3_BANK_SELECT_0(x) ((x) << 0) +# define R600_VM_L2_CNTL3_BANK_SELECT_1(x) ((x) << 5) +# define R600_VM_L2_CNTL3_CACHE_UPDATE_MODE(x) ((x) << 10) +# define R700_VM_L2_CNTL3_BANK_SELECT(x) ((x) << 0) +# define R700_VM_L2_CNTL3_CACHE_UPDATE_MODE(x) ((x) << 6) + +#define R600_VM_L2_STATUS 0x140c + +#define R600_VM_CONTEXT0_CNTL 0x1410 +# define R600_VM_ENABLE_CONTEXT (1 << 0) +# define R600_VM_PAGE_TABLE_DEPTH_FLAT (0 << 1) + +#define R600_VM_CONTEXT0_CNTL2 0x1430 +#define R600_VM_CONTEXT0_REQUEST_RESPONSE 0x1470 +#define R600_VM_CONTEXT0_INVALIDATION_LOW_ADDR 0x1490 +#define R600_VM_CONTEXT0_INVALIDATION_HIGH_ADDR 0x14b0 +#define R600_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x1574 +#define R600_VM_CONTEXT0_PAGE_TABLE_START_ADDR 0x1594 +#define R600_VM_CONTEXT0_PAGE_TABLE_END_ADDR 0x15b4 + +#define R700_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x153c +#define R700_VM_CONTEXT0_PAGE_TABLE_START_ADDR 0x155c +#define R700_VM_CONTEXT0_PAGE_TABLE_END_ADDR 0x157c + +#define R600_HDP_HOST_PATH_CNTL 0x2c00 + +#define R600_GRBM_CNTL 0x8000 +# define R600_GRBM_READ_TIMEOUT(x) ((x) << 0) + +#define R600_GRBM_STATUS 0x8010 +# define R600_CMDFIFO_AVAIL_MASK 0x1f +# define R700_CMDFIFO_AVAIL_MASK 0xf +# define R600_GUI_ACTIVE (1 << 31) +#define R600_GRBM_STATUS2 0x8014 +#define R600_GRBM_SOFT_RESET 0x8020 +# define R600_SOFT_RESET_CP (1 << 0) +#define R600_WAIT_UNTIL 0x8040 + +#define R600_CP_SEM_WAIT_TIMER 0x85bc +#define R600_CP_ME_CNTL 0x86d8 +# define R600_CP_ME_HALT (1 << 28) +#define R600_CP_QUEUE_THRESHOLDS 0x8760 +# define R600_ROQ_IB1_START(x) ((x) << 0) +# define R600_ROQ_IB2_START(x) ((x) << 8) +#define R600_CP_MEQ_THRESHOLDS 0x8764 +# define R700_STQ_SPLIT(x) ((x) << 0) +# define R600_MEQ_END(x) ((x) << 16) +# define R600_ROQ_END(x) ((x) << 24) +#define R600_CP_PERFMON_CNTL 0x87fc +#define R600_CP_RB_BASE 0xc100 +#define R600_CP_RB_CNTL 0xc104 +# define R600_RB_BUFSZ(x) ((x) << 0) +# define R600_RB_BLKSZ(x) ((x) << 8) +# define R600_RB_NO_UPDATE (1 << 27) +# define R600_RB_RPTR_WR_ENA (1 << 31) +#define R600_CP_RB_RPTR_WR 0xc108 +#define R600_CP_RB_RPTR_ADDR 0xc10c +#define R600_CP_RB_RPTR_ADDR_HI 0xc110 +#define R600_CP_RB_WPTR 0xc114 +#define R600_CP_RB_WPTR_ADDR 0xc118 +#define R600_CP_RB_WPTR_ADDR_HI 0xc11c +#define R600_CP_RB_RPTR 0x8700 +#define R600_CP_RB_WPTR_DELAY 0x8704 +#define R600_CP_PFP_UCODE_ADDR 0xc150 +#define R600_CP_PFP_UCODE_DATA 0xc154 +#define R600_CP_ME_RAM_RADDR 0xc158 +#define R600_CP_ME_RAM_WADDR 0xc15c +#define R600_CP_ME_RAM_DATA 0xc160 +#define R600_CP_DEBUG 0xc1fc + +#define R600_PA_CL_ENHANCE 0x8a14 +# define R600_CLIP_VTX_REORDER_ENA (1 << 0) +# define R600_NUM_CLIP_SEQ(x) ((x) << 1) +#define R600_PA_SC_LINE_STIPPLE_STATE 0x8b10 +#define R600_PA_SC_MULTI_CHIP_CNTL 0x8b20 +#define R700_PA_SC_FORCE_EOV_MAX_CNTS 0x8b24 +# define R700_FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0) +# define R700_FORCE_EOV_MAX_REZ_CNT(x) ((x) << 16) +#define R600_PA_SC_AA_SAMPLE_LOCS_2S 0x8b40 +#define R600_PA_SC_AA_SAMPLE_LOCS_4S 0x8b44 +#define R600_PA_SC_AA_SAMPLE_LOCS_8S_WD0 0x8b48 +#define R600_PA_SC_AA_SAMPLE_LOCS_8S_WD1 0x8b4c +# define R600_S0_X(x) ((x) << 0) +# define R600_S0_Y(x) ((x) << 4) +# define R600_S1_X(x) ((x) << 8) +# define R600_S1_Y(x) ((x) << 12) +# define R600_S2_X(x) ((x) << 16) +# define R600_S2_Y(x) ((x) << 20) +# define R600_S3_X(x) ((x) << 24) +# define R600_S3_Y(x) ((x) << 28) +# define R600_S4_X(x) ((x) << 0) +# define R600_S4_Y(x) ((x) << 4) +# define R600_S5_X(x) ((x) << 8) +# define R600_S5_Y(x) ((x) << 12) +# define R600_S6_X(x) ((x) << 16) +# define R600_S6_Y(x) ((x) << 20) +# define R600_S7_X(x) ((x) << 24) +# define R600_S7_Y(x) ((x) << 28) +#define R600_PA_SC_FIFO_SIZE 0x8bd0 +# define R600_SC_PRIM_FIFO_SIZE(x) ((x) << 0) +# define R600_SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 8) +# define R600_SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 16) +#define R700_PA_SC_FIFO_SIZE_R7XX 0x8bcc +# define R700_SC_PRIM_FIFO_SIZE(x) ((x) << 0) +# define R700_SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 12) +# define R700_SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 20) +#define R600_PA_SC_ENHANCE 0x8bf0 +# define R600_FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0) +# define R600_FORCE_EOV_MAX_TILE_CNT(x) ((x) << 12) +#define R600_PA_SC_CLIPRECT_RULE 0x2820c +#define R700_PA_SC_EDGERULE 0x28230 +#define R600_PA_SC_LINE_STIPPLE 0x28a0c +#define R600_PA_SC_MODE_CNTL 0x28a4c +#define R600_PA_SC_AA_CONFIG 0x28c04 + +#define R600_SX_EXPORT_BUFFER_SIZES 0x900c +# define R600_COLOR_BUFFER_SIZE(x) ((x) << 0) +# define R600_POSITION_BUFFER_SIZE(x) ((x) << 8) +# define R600_SMX_BUFFER_SIZE(x) ((x) << 16) +#define R600_SX_DEBUG_1 0x9054 +# define R600_SMX_EVENT_RELEASE (1 << 0) +# define R600_ENABLE_NEW_SMX_ADDRESS (1 << 16) +#define R700_SX_DEBUG_1 0x9058 +# define R700_ENABLE_NEW_SMX_ADDRESS (1 << 16) +#define R600_SX_MISC 0x28350 + +#define R600_DB_DEBUG 0x9830 +# define R600_PREZ_MUST_WAIT_FOR_POSTZ_DONE (1 << 31) +#define R600_DB_WATERMARKS 0x9838 +# define R600_DEPTH_FREE(x) ((x) << 0) +# define R600_DEPTH_FLUSH(x) ((x) << 5) +# define R600_DEPTH_PENDING_FREE(x) ((x) << 15) +# define R600_DEPTH_CACHELINE_FREE(x) ((x) << 20) +#define R700_DB_DEBUG3 0x98b0 +# define R700_DB_CLK_OFF_DELAY(x) ((x) << 11) +#define RV700_DB_DEBUG4 0x9b8c +# define RV700_DISABLE_TILE_COVERED_FOR_PS_ITER (1 << 6) + +#define R600_VGT_CACHE_INVALIDATION 0x88c4 +# define R600_CACHE_INVALIDATION(x) ((x) << 0) +# define R600_VC_ONLY 0 +# define R600_TC_ONLY 1 +# define R600_VC_AND_TC 2 +# define R700_AUTO_INVLD_EN(x) ((x) << 6) +# define R700_NO_AUTO 0 +# define R700_ES_AUTO 1 +# define R700_GS_AUTO 2 +# define R700_ES_AND_GS_AUTO 3 +#define R600_VGT_GS_PER_ES 0x88c8 +#define R600_VGT_ES_PER_GS 0x88cc +#define R600_VGT_GS_PER_VS 0x88e8 +#define R600_VGT_GS_VERTEX_REUSE 0x88d4 +#define R600_VGT_NUM_INSTANCES 0x8974 +#define R600_VGT_STRMOUT_EN 0x28ab0 +#define R600_VGT_EVENT_INITIATOR 0x28a90 +# define R600_CACHE_FLUSH_AND_INV_EVENT (0x16 << 0) +#define R600_VGT_VERTEX_REUSE_BLOCK_CNTL 0x28c58 +# define R600_VTX_REUSE_DEPTH_MASK 0xff +#define R600_VGT_OUT_DEALLOC_CNTL 0x28c5c +# define R600_DEALLOC_DIST_MASK 0x7f + +#define R600_CB_COLOR0_BASE 0x28040 +#define R600_CB_COLOR1_BASE 0x28044 +#define R600_CB_COLOR2_BASE 0x28048 +#define R600_CB_COLOR3_BASE 0x2804c +#define R600_CB_COLOR4_BASE 0x28050 +#define R600_CB_COLOR5_BASE 0x28054 +#define R600_CB_COLOR6_BASE 0x28058 +#define R600_CB_COLOR7_BASE 0x2805c +#define R600_CB_COLOR7_FRAG 0x280fc + +#define R600_CB_COLOR0_SIZE 0x28060 +#define R600_CB_COLOR0_VIEW 0x28080 +#define R600_CB_COLOR0_INFO 0x280a0 +#define R600_CB_COLOR0_TILE 0x280c0 +#define R600_CB_COLOR0_FRAG 0x280e0 +#define R600_CB_COLOR0_MASK 0x28100 + +#define AVIVO_D1MODE_VLINE_START_END 0x6538 +#define AVIVO_D2MODE_VLINE_START_END 0x6d38 +#define R600_CP_COHER_BASE 0x85f8 +#define R600_DB_DEPTH_BASE 0x2800c +#define R600_SQ_PGM_START_FS 0x28894 +#define R600_SQ_PGM_START_ES 0x28880 +#define R600_SQ_PGM_START_VS 0x28858 +#define R600_SQ_PGM_RESOURCES_VS 0x28868 +#define R600_SQ_PGM_CF_OFFSET_VS 0x288d0 +#define R600_SQ_PGM_START_GS 0x2886c +#define R600_SQ_PGM_START_PS 0x28840 +#define R600_SQ_PGM_RESOURCES_PS 0x28850 +#define R600_SQ_PGM_EXPORTS_PS 0x28854 +#define R600_SQ_PGM_CF_OFFSET_PS 0x288cc +#define R600_VGT_DMA_BASE 0x287e8 +#define R600_VGT_DMA_BASE_HI 0x287e4 +#define R600_VGT_STRMOUT_BASE_OFFSET_0 0x28b10 +#define R600_VGT_STRMOUT_BASE_OFFSET_1 0x28b14 +#define R600_VGT_STRMOUT_BASE_OFFSET_2 0x28b18 +#define R600_VGT_STRMOUT_BASE_OFFSET_3 0x28b1c +#define R600_VGT_STRMOUT_BASE_OFFSET_HI_0 0x28b44 +#define R600_VGT_STRMOUT_BASE_OFFSET_HI_1 0x28b48 +#define R600_VGT_STRMOUT_BASE_OFFSET_HI_2 0x28b4c +#define R600_VGT_STRMOUT_BASE_OFFSET_HI_3 0x28b50 +#define R600_VGT_STRMOUT_BUFFER_BASE_0 0x28ad8 +#define R600_VGT_STRMOUT_BUFFER_BASE_1 0x28ae8 +#define R600_VGT_STRMOUT_BUFFER_BASE_2 0x28af8 +#define R600_VGT_STRMOUT_BUFFER_BASE_3 0x28b08 +#define R600_VGT_STRMOUT_BUFFER_OFFSET_0 0x28adc +#define R600_VGT_STRMOUT_BUFFER_OFFSET_1 0x28aec +#define R600_VGT_STRMOUT_BUFFER_OFFSET_2 0x28afc +#define R600_VGT_STRMOUT_BUFFER_OFFSET_3 0x28b0c + +#define R600_VGT_PRIMITIVE_TYPE 0x8958 + +#define R600_PA_SC_SCREEN_SCISSOR_TL 0x28030 +#define R600_PA_SC_GENERIC_SCISSOR_TL 0x28240 +#define R600_PA_SC_WINDOW_SCISSOR_TL 0x28204 + +#define R600_TC_CNTL 0x9608 +# define R600_TC_L2_SIZE(x) ((x) << 5) +# define R600_L2_DISABLE_LATE_HIT (1 << 9) + +#define R600_ARB_POP 0x2418 +# define R600_ENABLE_TC128 (1 << 30) +#define R600_ARB_GDEC_RD_CNTL 0x246c + +#define R600_TA_CNTL_AUX 0x9508 +# define R600_DISABLE_CUBE_WRAP (1 << 0) +# define R600_DISABLE_CUBE_ANISO (1 << 1) +# define R700_GETLOD_SELECT(x) ((x) << 2) +# define R600_SYNC_GRADIENT (1 << 24) +# define R600_SYNC_WALKER (1 << 25) +# define R600_SYNC_ALIGNER (1 << 26) +# define R600_BILINEAR_PRECISION_6_BIT (0 << 31) +# define R600_BILINEAR_PRECISION_8_BIT (1 << 31) + +#define R700_TCP_CNTL 0x9610 + +#define R600_SMX_DC_CTL0 0xa020 +# define R700_USE_HASH_FUNCTION (1 << 0) +# define R700_CACHE_DEPTH(x) ((x) << 1) +# define R700_FLUSH_ALL_ON_EVENT (1 << 10) +# define R700_STALL_ON_EVENT (1 << 11) +#define R700_SMX_EVENT_CTL 0xa02c +# define R700_ES_FLUSH_CTL(x) ((x) << 0) +# define R700_GS_FLUSH_CTL(x) ((x) << 3) +# define R700_ACK_FLUSH_CTL(x) ((x) << 6) +# define R700_SYNC_FLUSH_CTL (1 << 8) + +#define R600_SQ_CONFIG 0x8c00 +# define R600_VC_ENABLE (1 << 0) +# define R600_EXPORT_SRC_C (1 << 1) +# define R600_DX9_CONSTS (1 << 2) +# define R600_ALU_INST_PREFER_VECTOR (1 << 3) +# define R600_DX10_CLAMP (1 << 4) +# define R600_CLAUSE_SEQ_PRIO(x) ((x) << 8) +# define R600_PS_PRIO(x) ((x) << 24) +# define R600_VS_PRIO(x) ((x) << 26) +# define R600_GS_PRIO(x) ((x) << 28) +# define R600_ES_PRIO(x) ((x) << 30) +#define R600_SQ_GPR_RESOURCE_MGMT_1 0x8c04 +# define R600_NUM_PS_GPRS(x) ((x) << 0) +# define R600_NUM_VS_GPRS(x) ((x) << 16) +# define R700_DYN_GPR_ENABLE (1 << 27) +# define R600_NUM_CLAUSE_TEMP_GPRS(x) ((x) << 28) +#define R600_SQ_GPR_RESOURCE_MGMT_2 0x8c08 +# define R600_NUM_GS_GPRS(x) ((x) << 0) +# define R600_NUM_ES_GPRS(x) ((x) << 16) +#define R600_SQ_THREAD_RESOURCE_MGMT 0x8c0c +# define R600_NUM_PS_THREADS(x) ((x) << 0) +# define R600_NUM_VS_THREADS(x) ((x) << 8) +# define R600_NUM_GS_THREADS(x) ((x) << 16) +# define R600_NUM_ES_THREADS(x) ((x) << 24) +#define R600_SQ_STACK_RESOURCE_MGMT_1 0x8c10 +# define R600_NUM_PS_STACK_ENTRIES(x) ((x) << 0) +# define R600_NUM_VS_STACK_ENTRIES(x) ((x) << 16) +#define R600_SQ_STACK_RESOURCE_MGMT_2 0x8c14 +# define R600_NUM_GS_STACK_ENTRIES(x) ((x) << 0) +# define R600_NUM_ES_STACK_ENTRIES(x) ((x) << 16) +#define R600_SQ_MS_FIFO_SIZES 0x8cf0 +# define R600_CACHE_FIFO_SIZE(x) ((x) << 0) +# define R600_FETCH_FIFO_HIWATER(x) ((x) << 8) +# define R600_DONE_FIFO_HIWATER(x) ((x) << 16) +# define R600_ALU_UPDATE_FIFO_HIWATER(x) ((x) << 24) +#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_0 0x8db0 +# define R700_SIMDA_RING0(x) ((x) << 0) +# define R700_SIMDA_RING1(x) ((x) << 8) +# define R700_SIMDB_RING0(x) ((x) << 16) +# define R700_SIMDB_RING1(x) ((x) << 24) +#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_1 0x8db4 +#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_2 0x8db8 +#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_3 0x8dbc +#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_4 0x8dc0 +#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_5 0x8dc4 +#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_6 0x8dc8 +#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_7 0x8dcc + +#define R600_SPI_PS_IN_CONTROL_0 0x286cc +# define R600_NUM_INTERP(x) ((x) << 0) +# define R600_POSITION_ENA (1 << 8) +# define R600_POSITION_CENTROID (1 << 9) +# define R600_POSITION_ADDR(x) ((x) << 10) +# define R600_PARAM_GEN(x) ((x) << 15) +# define R600_PARAM_GEN_ADDR(x) ((x) << 19) +# define R600_BARYC_SAMPLE_CNTL(x) ((x) << 26) +# define R600_PERSP_GRADIENT_ENA (1 << 28) +# define R600_LINEAR_GRADIENT_ENA (1 << 29) +# define R600_POSITION_SAMPLE (1 << 30) +# define R600_BARYC_AT_SAMPLE_ENA (1 << 31) +#define R600_SPI_PS_IN_CONTROL_1 0x286d0 +# define R600_GEN_INDEX_PIX (1 << 0) +# define R600_GEN_INDEX_PIX_ADDR(x) ((x) << 1) +# define R600_FRONT_FACE_ENA (1 << 8) +# define R600_FRONT_FACE_CHAN(x) ((x) << 9) +# define R600_FRONT_FACE_ALL_BITS (1 << 11) +# define R600_FRONT_FACE_ADDR(x) ((x) << 12) +# define R600_FOG_ADDR(x) ((x) << 17) +# define R600_FIXED_PT_POSITION_ENA (1 << 24) +# define R600_FIXED_PT_POSITION_ADDR(x) ((x) << 25) +# define R700_POSITION_ULC (1 << 30) +#define R600_SPI_INPUT_Z 0x286d8 + +#define R600_SPI_CONFIG_CNTL 0x9100 +# define R600_GPR_WRITE_PRIORITY(x) ((x) << 0) +# define R600_DISABLE_INTERP_1 (1 << 5) +#define R600_SPI_CONFIG_CNTL_1 0x913c +# define R600_VTX_DONE_DELAY(x) ((x) << 0) +# define R600_INTERP_ONE_PRIM_PER_ROW (1 << 4) + +#define R600_GB_TILING_CONFIG 0x98f0 +# define R600_PIPE_TILING(x) ((x) << 1) +# define R600_BANK_TILING(x) ((x) << 4) +# define R600_GROUP_SIZE(x) ((x) << 6) +# define R600_ROW_TILING(x) ((x) << 8) +# define R600_BANK_SWAPS(x) ((x) << 11) +# define R600_SAMPLE_SPLIT(x) ((x) << 14) +# define R600_BACKEND_MAP(x) ((x) << 16) +#define R600_DCP_TILING_CONFIG 0x6ca0 +#define R600_HDP_TILING_CONFIG 0x2f3c + +#define R600_CC_RB_BACKEND_DISABLE 0x98f4 +#define R700_CC_SYS_RB_BACKEND_DISABLE 0x3f88 +# define R600_BACKEND_DISABLE(x) ((x) << 16) + +#define R600_CC_GC_SHADER_PIPE_CONFIG 0x8950 +#define R600_GC_USER_SHADER_PIPE_CONFIG 0x8954 +# define R600_INACTIVE_QD_PIPES(x) ((x) << 8) +# define R600_INACTIVE_QD_PIPES_MASK (0xff << 8) +# define R600_INACTIVE_SIMDS(x) ((x) << 16) +# define R600_INACTIVE_SIMDS_MASK (0xff << 16) + +#define R700_CGTS_SYS_TCC_DISABLE 0x3f90 +#define R700_CGTS_USER_SYS_TCC_DISABLE 0x3f94 +#define R700_CGTS_TCC_DISABLE 0x9148 +#define R700_CGTS_USER_TCC_DISABLE 0x914c + /* Constants */ #define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */ @@ -1179,6 +1823,11 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, #define RADEON_LAST_SWI_REG RADEON_SCRATCH_REG3 #define RADEON_LAST_DISPATCH 1 +#define R600_LAST_FRAME_REG R600_SCRATCH_REG0 +#define R600_LAST_DISPATCH_REG R600_SCRATCH_REG1 +#define R600_LAST_CLEAR_REG R600_SCRATCH_REG2 +#define R600_LAST_SWI_REG R600_SCRATCH_REG3 + #define RADEON_MAX_VB_AGE 0x7fffffff #define RADEON_MAX_VB_VERTS (0xffff) @@ -1186,55 +1835,74 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, #define RADEON_READ(reg) bus_space_read_4(dev_priv->regs->bst, \ dev_priv->regs->bsh, (reg)) -#define RADEON_WRITE(reg,val) bus_space_write_4(dev_priv->regs->bst, \ - dev_priv->regs->bsh, (reg), (val)) +#define RADEON_WRITE(reg,val) \ + do { \ + if (reg < 0x10000) { \ + bus_space_write_4(dev_priv->regs->bst, \ + dev_priv->regs->bsh, (reg), (val)); \ + } else { \ + bus_space_write_4(dev_priv->regs->bst, \ + dev_priv->regs->bsh, RADEON_MM_INDEX, (reg));\ + bus_space_write_4(dev_priv->regs->bst, \ + dev_priv->regs->bsh, RADEON_MM_DATA, (val));\ + } \ + } while (/* CONSTCOND */ 0) #define RADEON_READ8(reg) bus_space_read_1(dev_priv->regs->bst, \ dev_priv->regs->bsh, (reg)) #define RADEON_WRITE8(reg,val) bus_space_write_1(dev_priv->regs->bst, \ dev_priv->regs->bsh, (reg), (val)) -#define RADEON_WRITE_PLL( addr, val ) \ +#define RADEON_WRITE_PLL(addr, val) \ do { \ - RADEON_WRITE8( RADEON_CLOCK_CNTL_INDEX, \ + RADEON_WRITE8(RADEON_CLOCK_CNTL_INDEX, \ ((addr) & 0x1f) | RADEON_PLL_WR_EN ); \ - RADEON_WRITE( RADEON_CLOCK_CNTL_DATA, (val) ); \ + RADEON_WRITE(RADEON_CLOCK_CNTL_DATA, (val)); \ } while (0) -#define RADEON_WRITE_PCIE( addr, val ) \ +#define RADEON_WRITE_PCIE(addr, val) \ do { \ - RADEON_WRITE8( RADEON_PCIE_INDEX, \ + RADEON_WRITE8(RADEON_PCIE_INDEX, \ ((addr) & 0xff)); \ - RADEON_WRITE( RADEON_PCIE_DATA, (val) ); \ + RADEON_WRITE(RADEON_PCIE_DATA, (val)); \ } while (0) -#define R500_WRITE_MCIND( addr, val ) \ +#define R500_WRITE_MCIND(addr, val) \ do { \ RADEON_WRITE(R520_MC_IND_INDEX, 0xff0000 | ((addr) & 0xff)); \ RADEON_WRITE(R520_MC_IND_DATA, (val)); \ RADEON_WRITE(R520_MC_IND_INDEX, 0); \ } while (0) -#define RS480_WRITE_MCIND( addr, val ) \ +#define RS480_WRITE_MCIND(addr, val) \ do { \ - RADEON_WRITE( RS480_NB_MC_INDEX, \ + RADEON_WRITE(RS480_NB_MC_INDEX, \ ((addr) & 0xff) | RS480_NB_MC_IND_WR_EN); \ - RADEON_WRITE( RS480_NB_MC_DATA, (val) ); \ - RADEON_WRITE( RS480_NB_MC_INDEX, 0xff ); \ + RADEON_WRITE(RS480_NB_MC_DATA, (val)); \ + RADEON_WRITE(RS480_NB_MC_INDEX, 0xff); \ } while (0) -#define RS690_WRITE_MCIND( addr, val ) \ +#define RS690_WRITE_MCIND(addr, val) \ do { \ RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_WR_EN | ((addr) & RS690_MC_INDEX_MASK)); \ RADEON_WRITE(RS690_MC_DATA, val); \ RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK); \ } while (0) -#define IGP_WRITE_MCIND( addr, val ) \ +#define RS600_WRITE_MCIND(addr, val) \ +do { \ + RADEON_WRITE(RS600_MC_INDEX, RS600_MC_IND_WR_EN | RS600_MC_IND_CITF_ARB0 | ((addr) & RS600_MC_ADDR_MASK)); \ + RADEON_WRITE(RS600_MC_DATA, val); \ +} while (0) + +#define IGP_WRITE_MCIND(addr, val) \ do { \ - if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) \ - RS690_WRITE_MCIND( addr, val ); \ - else \ - RS480_WRITE_MCIND( addr, val ); \ + if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || \ + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) \ + RS690_WRITE_MCIND(addr, val); \ + else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) \ + RS600_WRITE_MCIND(addr, val); \ + else \ + RS480_WRITE_MCIND(addr, val); \ } while (0) #define CP_PACKET0( reg, n ) \ @@ -1278,42 +1946,42 @@ do { \ #define RADEON_FLUSH_CACHE() do { \ if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) { \ - OUT_RING(CP_PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0)); \ - OUT_RING(RADEON_RB3D_DC_FLUSH); \ + OUT_RING(CP_PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0)); \ + OUT_RING(RADEON_RB3D_DC_FLUSH); \ } else { \ - OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); \ - OUT_RING(R300_RB3D_DC_FLUSH); \ - } \ + OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); \ + OUT_RING(R300_RB3D_DC_FLUSH); \ + } \ } while (0) #define RADEON_PURGE_CACHE() do { \ if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) { \ - OUT_RING(CP_PACKET0( RADEON_RB3D_DSTCACHE_CTLSTAT, 0)); \ - OUT_RING(RADEON_RB3D_DC_FLUSH | RADEON_RB3D_DC_FREE); \ + OUT_RING(CP_PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0)); \ + OUT_RING(RADEON_RB3D_DC_FLUSH | RADEON_RB3D_DC_FREE); \ } else { \ - OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); \ - OUT_RING(R300_RB3D_DC_FLUSH | R300_RB3D_DC_FREE ); \ - } \ + OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); \ + OUT_RING(R300_RB3D_DC_FLUSH | R300_RB3D_DC_FREE); \ + } \ } while (0) #define RADEON_FLUSH_ZCACHE() do { \ if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) { \ - OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \ - OUT_RING( RADEON_RB3D_ZC_FLUSH ); \ + OUT_RING(CP_PACKET0(RADEON_RB3D_ZCACHE_CTLSTAT, 0)); \ + OUT_RING(RADEON_RB3D_ZC_FLUSH); \ } else { \ - OUT_RING( CP_PACKET0( R300_ZB_ZCACHE_CTLSTAT, 0 ) ); \ - OUT_RING( R300_ZC_FLUSH ); \ - } \ + OUT_RING(CP_PACKET0(R300_ZB_ZCACHE_CTLSTAT, 0)); \ + OUT_RING(R300_ZC_FLUSH); \ + } \ } while (0) #define RADEON_PURGE_ZCACHE() do { \ if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) { \ - OUT_RING(CP_PACKET0(RADEON_RB3D_ZCACHE_CTLSTAT, 0)); \ - OUT_RING(RADEON_RB3D_ZC_FLUSH | RADEON_RB3D_ZC_FREE); \ + OUT_RING(CP_PACKET0(RADEON_RB3D_ZCACHE_CTLSTAT, 0)); \ + OUT_RING(RADEON_RB3D_ZC_FLUSH | RADEON_RB3D_ZC_FREE); \ } else { \ - OUT_RING(CP_PACKET0(R300_ZB_ZCACHE_CTLSTAT, 0)); \ - OUT_RING(R300_ZC_FLUSH | R300_ZC_FREE); \ - } \ + OUT_RING(CP_PACKET0(R300_ZB_ZCACHE_CTLSTAT, 0)); \ + OUT_RING(R300_ZC_FLUSH | R300_ZC_FREE); \ + } \ } while (0) /* ================================================================ @@ -1321,10 +1989,11 @@ do { \ */ #define VB_AGE_TEST_WITH_RETURN( dev_priv ) \ -do { \ - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; \ +do { \ + drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; \ if ( sarea_priv->last_dispatch >= RADEON_MAX_VB_AGE ) { \ - int __ret = radeon_do_cp_idle( dev_priv ); \ + int __ret; \ + __ret = radeon_do_cp_idle(dev_priv); \ if ( __ret ) return __ret; \ sarea_priv->last_dispatch = 0; \ radeon_freelist_reset( dev ); \ @@ -1346,6 +2015,24 @@ do { \ OUT_RING( age ); \ } while (0) +#define R600_DISPATCH_AGE(age) do { \ + OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1)); \ + OUT_RING((R600_LAST_DISPATCH_REG - R600_SET_CONFIG_REG_OFFSET) >> 2); \ + OUT_RING(age); \ +} while (0) + +#define R600_FRAME_AGE(age) do { \ + OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1)); \ + OUT_RING((R600_LAST_FRAME_REG - R600_SET_CONFIG_REG_OFFSET) >> 2); \ + OUT_RING(age); \ +} while (0) + +#define R600_CLEAR_AGE(age) do { \ + OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1)); \ + OUT_RING((R600_LAST_CLEAR_REG - R600_SET_CONFIG_REG_OFFSET) >> 2); \ + OUT_RING(age); \ +} while (0) + /* ================================================================ * Ring control */ @@ -1357,6 +2044,8 @@ do { \ #define RADEON_VPRINTF(fmt, args...) #endif +#define RADEON_RING_ALIGN 16 + #define BEGIN_RING( n ) radeondrm_begin_ring(dev_priv, n) #define ADVANCE_RING() radeondrm_advance_ring(dev_priv) diff --git a/sys/dev/pci/drm/radeon_irq.c b/sys/dev/pci/drm/radeon_irq.c index 675de199612..87ad05a4116 100644 --- a/sys/dev/pci/drm/radeon_irq.c +++ b/sys/dev/pci/drm/radeon_irq.c @@ -71,7 +71,7 @@ int radeon_enable_vblank(struct drm_device *dev, int crtc) { drm_radeon_private_t *dev_priv = dev->dev_private; - if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) { switch (crtc) { case 0: r500_vbl_irq_set_state(dev, R500_D1MODE_INT_MASK, 1); @@ -106,7 +106,7 @@ void radeon_disable_vblank(struct drm_device *dev, int crtc) { drm_radeon_private_t *dev_priv = dev->dev_private; - if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) { switch (crtc) { case 0: r500_vbl_irq_set_state(dev, R500_D1MODE_INT_MASK, 0); @@ -142,7 +142,7 @@ radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv, u32 *r500_disp_int) u32 irq_mask = RADEON_SW_INT_TEST; *r500_disp_int = 0; - if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) { /* vbl interrupts in a different place */ if (irqs & R500_DISPLAY_INT_STATUS) { @@ -196,6 +196,10 @@ radeondrm_intr(void *arg) drm_radeon_private_t *dev_priv = dev->dev_private; u_int32_t stat, r500_disp_int; + /* XXX wtf? */ + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + return (0); + stat = radeon_acknowledge_irqs(dev_priv, &r500_disp_int); if (!stat) return (0); @@ -210,7 +214,7 @@ radeondrm_intr(void *arg) } /* VBLANK interrupt */ - if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) { if (r500_disp_int & R500_D1_VBLANK_INTERRUPT) drm_handle_vblank(dev, 0); if (r500_disp_int & R500_D2_VBLANK_INTERRUPT) @@ -269,7 +273,7 @@ radeon_get_vblank_counter(struct drm_device *dev, int crtc) return (EINVAL); } - if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) { if (crtc == 0) return RADEON_READ(R500_D1CRTC_FRAME_COUNT); else @@ -300,12 +304,7 @@ radeon_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_priv) result = radeon_emit_irq(dev); - if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) { - DRM_ERROR("copy_to_user\n"); - return (EFAULT); - } - - return (0); + return (copyout(&result, emit->irq_seq, sizeof(int))); } /* Doesn't need the hardware lock. @@ -332,8 +331,11 @@ radeon_driver_irq_install(struct drm_device * dev) drm_radeon_private_t *dev_priv = dev->dev_private; u_int32_t dummy; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + return (0); + /* Disable *all* interrupts */ - if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) RADEON_WRITE(R500_DxMODE_INT_MASK, 0); RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); @@ -361,7 +363,10 @@ radeon_driver_irq_uninstall(struct drm_device * dev) if (!dev_priv) return; - if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + return; + + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) RADEON_WRITE(R500_DxMODE_INT_MASK, 0); /* Disable *all* interrupts */ RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); diff --git a/sys/dev/pci/drm/radeon_state.c b/sys/dev/pci/drm/radeon_state.c index dbd1ea6a8dd..7320b3ceecc 100644 --- a/sys/dev/pci/drm/radeon_state.c +++ b/sys/dev/pci/drm/radeon_state.c @@ -44,7 +44,6 @@ void radeon_cp_dispatch_clear(struct drm_device *, drm_radeon_clear_t *, drm_radeon_clear_rect_t *); void radeon_cp_dispatch_swap(struct drm_device *); void radeon_cp_dispatch_flip(struct drm_device *); -void radeon_cp_discard_buffer(struct drm_device *, struct drm_buf *); void radeon_cp_dispatch_indirect(struct drm_device *, struct drm_buf *, int, int); int radeon_cp_dispatch_texture(struct drm_device *, struct drm_file *, @@ -55,7 +54,6 @@ void radeon_apply_surface_regs(int, drm_radeon_private_t *); int alloc_surface(drm_radeon_surface_alloc_t *, drm_radeon_private_t *, struct drm_file *); int free_surface(struct drm_file *, drm_radeon_private_t *, int); -void radeon_surfaces_release(struct drm_file *, drm_radeon_private_t *); int radeon_do_init_pageflip(struct drm_device *); int radeon_emit_packets(drm_radeon_private_t *, struct drm_file *, drm_radeon_cmd_header_t, drm_radeon_kcmd_buffer_t *); @@ -1079,6 +1077,64 @@ radeon_cp_dispatch_clear(struct drm_device * dev, drm_radeon_clear_t * clear, } void +r600_cp_dispatch_swap(struct drm_device *dev, struct drm_file *file_priv) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; + int nbox = sarea_priv->nbox; + struct drm_clip_rect *pbox = sarea_priv->boxes; + int i, cpp, src_pitch, dst_pitch; + uint64_t src, dst; + DRM_DEBUG("\n"); + + if (dev_priv->color_fmt == RADEON_COLOR_FORMAT_ARGB8888) + cpp = 4; + else + cpp = 2; + + if (dev_priv->sarea_priv->pfCurrentPage == 0) { + src_pitch = dev_priv->back_pitch; + dst_pitch = dev_priv->front_pitch; + src = dev_priv->back_offset + dev_priv->fb_location; + dst = dev_priv->front_offset + dev_priv->fb_location; + } else { + src_pitch = dev_priv->front_pitch; + dst_pitch = dev_priv->back_pitch; + src = dev_priv->front_offset + dev_priv->fb_location; + dst = dev_priv->back_offset + dev_priv->fb_location; + } + + if (r600_prepare_blit_copy(dev, file_priv)) { + DRM_ERROR("unable to allocate vertex buffer for swap buffer\n"); + return; + } + for (i = 0; i < nbox; i++) { + int x = pbox[i].x1; + int y = pbox[i].y1; + int w = pbox[i].x2 - x; + int h = pbox[i].y2 - y; + + DRM_DEBUG("%d,%d-%d,%d\n", x, y, w, h); + + r600_blit_swap(dev, + src, dst, + x, y, x, y, w, h, + src_pitch, dst_pitch, cpp); + } + r600_done_blit_copy(dev); + + /* Increment the frame counter. The client-side 3D driver must + * throttle the framerate by waiting for this value before + * performing the swapbuffer ioctl. + */ + dev_priv->sarea_priv->last_frame++; + + BEGIN_RING(3); + R600_FRAME_AGE(dev_priv->sarea_priv->last_frame); + ADVANCE_RING(); +} + +void radeon_cp_dispatch_swap(struct drm_device *dev) { drm_radeon_private_t *dev_priv = dev->dev_private; @@ -1199,14 +1255,57 @@ radeon_cp_discard_buffer(struct drm_device * dev, struct drm_buf * buf) buf_priv->age = ++dev_priv->sarea_priv->last_dispatch; /* Emit the vertex buffer age */ - BEGIN_RING(2); - RADEON_DISPATCH_AGE(buf_priv->age); - ADVANCE_RING(); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + BEGIN_RING(3); + R600_DISPATCH_AGE(buf_priv->age); + ADVANCE_RING(); + } else { + BEGIN_RING(2); + RADEON_DISPATCH_AGE(buf_priv->age); + ADVANCE_RING(); + } buf->pending = 1; buf->used = 0; } +int +r600_cp_dispatch_indirect(struct drm_device *dev, struct drm_buf *buf, + int start, int end) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + + if (start != end) { + unsigned long offset = (dev_priv->gart_buffers_offset + + buf->offset + start); + int dwords = (end - start + 3) / sizeof(u32); + + DRM_DEBUG("dwords:%d\n", dwords); + DRM_DEBUG("offset 0x%lx\n", offset); + + + /* Indirect buffer data must be a multiple of 16 dwords. + * pad the data with a Type-2 CP packet. + */ + while (dwords & 0xf) { + u32 *data = (u32 *) + ((char *)dev->agp_buffer_map->handle + + buf->offset + start); + data[dwords++] = RADEON_CP_PACKET2; + } + + /* Fire off the indirect buffer */ + BEGIN_RING(4); + OUT_RING(CP_PACKET3(R600_IT_INDIRECT_BUFFER, 2)); + OUT_RING((offset & 0xfffffffc)); + OUT_RING((upper_32_bits(offset) & 0xff)); + OUT_RING(dwords); + ADVANCE_RING(); + } + + return 0; +} + void radeon_cp_dispatch_indirect(struct drm_device *dev, struct drm_buf *buf, int start, int end) @@ -1245,6 +1344,79 @@ radeon_cp_dispatch_indirect(struct drm_device *dev, struct drm_buf *buf, #define RADEON_MAX_TEXTURE_SIZE RADEON_BUFFER_SIZE int +r600_cp_dispatch_texture(struct drm_device *dev, struct drm_file *file_priv, + drm_radeon_texture_t *tex, drm_radeon_tex_image_t *image) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + struct drm_buf *buf; + u32 *buffer; + const u8 __user *data; + int size, pass_size; + u64 src_offset, dst_offset; + + if (!radeon_check_offset(dev_priv, tex->offset)) { + DRM_ERROR("Invalid destination offset\n"); + return -EINVAL; + } + + /* this might fail for zero-sized uploads - are those illegal? */ + if (!radeon_check_offset(dev_priv, tex->offset + tex->height * tex->pitch - 1)) { + DRM_ERROR("Invalid final destination offset\n"); + return -EINVAL; + } + + size = tex->height * tex->pitch; + + if (size == 0) + return 0; + + dst_offset = tex->offset; + + r600_prepare_blit_copy(dev, file_priv); + do { + data = (const u8 __user *)image->data; + pass_size = size; + + buf = radeon_freelist_get(dev); + if (!buf) { + DRM_DEBUG("EAGAIN\n"); + if (DRM_COPY_TO_USER(tex->image, image, sizeof(*image))) + return -EFAULT; + return -EAGAIN; + } + + if (pass_size > buf->total) + pass_size = buf->total; + + /* Dispatch the indirect buffer. + */ + buffer = + (u32 *) ((char *)dev->agp_buffer_map->handle + buf->offset); + + if (DRM_COPY_FROM_USER(buffer, data, pass_size)) { + DRM_ERROR("EFAULT on pad, %d bytes\n", pass_size); + return -EFAULT; + } + + buf->file_priv = file_priv; + buf->used = pass_size; + src_offset = dev_priv->gart_buffers_offset + buf->offset; + + r600_blit_copy(dev, src_offset, dst_offset, pass_size); + + radeon_cp_discard_buffer(dev, buf); + + /* Update the input parameters for next time */ + image->data = (const u8 __user *)image->data + pass_size; + dst_offset += pass_size; + size -= pass_size; + } while (size > 0); + r600_done_blit_copy(dev); + + return 0; +} + +int radeon_cp_dispatch_texture(struct drm_device *dev, struct drm_file *file_priv, drm_radeon_texture_t *tex, drm_radeon_tex_image_t *image) { @@ -1795,7 +1967,10 @@ radeon_cp_swap(struct drm_device *dev, void *data, struct drm_file *file_priv) if (sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS) sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS; - radeon_cp_dispatch_swap(dev); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + r600_cp_dispatch_swap(dev, file_priv); + else + radeon_cp_dispatch_swap(dev); dev_priv->sarea_priv->ctx_owner = 0; COMMIT_RING(); @@ -1825,7 +2000,10 @@ radeon_cp_texture(struct drm_device *dev, void *data, VB_AGE_TEST_WITH_RETURN(dev_priv); - ret = radeon_cp_dispatch_texture(dev, file_priv, tex, &image); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + ret = r600_cp_dispatch_texture(dev, file_priv, tex, &image); + else + ret = radeon_cp_dispatch_texture(dev, file_priv, tex, &image); return ret; } @@ -1897,20 +2075,26 @@ radeon_cp_indirect(struct drm_device *dev, void *data, buf->used = indirect->end; - /* Wait for the 3D stream to idle before the indirect buffer - * containing 2D acceleration commands is processed. - */ - BEGIN_RING(2); - - RADEON_WAIT_UNTIL_3D_IDLE(); - - ADVANCE_RING(); - - /* Dispatch the indirect buffer full of commands from the + /* + * Dispatch the indirect buffer full of commands from the * X server. This is insecure and is thus only available to * privileged clients. */ - radeon_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { + r600_cp_dispatch_indirect(dev, buf, indirect->start, + indirect->end); + } else { + /* + * Wait for the 3D stream to idle before the indirect buffer + * containing 2D acceleration commands is processed. + */ + BEGIN_RING(2); + RADEON_WAIT_UNTIL_3D_IDLE(); + ADVANCE_RING(); + + radeon_cp_dispatch_indirect(dev, buf, indirect->start, + indirect->end); + } if (indirect->discard) { radeon_cp_discard_buffer(dev, buf); } @@ -1978,7 +2162,8 @@ int radeon_emit_scalars2(drm_radeon_private_t *dev_priv, drm_radeon_cmd_header_t header, drm_radeon_kcmd_buffer_t *cmdbuf) { - int sz = header.scalars.count; int start = ((unsigned int)header.scalars.offset) + 0x100; + int sz = header.scalars.count; + int start = ((unsigned int)header.scalars.offset) + 0x100; int stride = header.scalars.stride; BEGIN_RING(3 + sz); @@ -2382,7 +2567,10 @@ radeon_cp_getparam(struct drm_device *dev, void *data, case RADEON_PARAM_SCRATCH_OFFSET: if (!dev_priv->writeback_works) return EINVAL; - value = RADEON_SCRATCH_REG_OFFSET; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + value = R600_SCRATCH_REG_OFFSET; + else + value = RADEON_SCRATCH_REG_OFFSET; break; case RADEON_PARAM_CARD_TYPE: @@ -2402,6 +2590,9 @@ radeon_cp_getparam(struct drm_device *dev, void *data, case RADEON_PARAM_NUM_GB_PIPES: value = dev_priv->num_gb_pipes; break; + case RADEON_PARAM_NUM_Z_PIPES: + value = dev_priv->num_z_pipes; + break; default: DRM_DEBUG( "Invalid parameter %d\n", param->param ); return EINVAL; |