By popular demand and peer pressure, check-in work in progress work to support

the Yeelong Lemote mips-based netbook. Kernel bits only for now, needs
polishing; most of this work done during h2k9 last month, although the
porting effort started earlier this year.

2 files changed, 240 insertions, 0 deletions

diff --git a/sys/arch/loongson/loongson/locore.S b/sys/arch/loongson/loongson/locore.S
new file mode 100644
index 00000000000..8c19e302084
--- /dev/null
+++ b/sys/arch/loongson/loongson/locore.S
@@ -0,0 +1,75 @@
+/*	$OpenBSD: locore.S,v 1.1 2009/12/11 05:14:52 miod Exp $ */
+
+/*
+ * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+#include <sys/errno.h>
+#include <sys/syscall.h>
+
+#include <machine/param.h>
+#include <machine/asm.h>
+#include <machine/cpu.h>
+#include <machine/regnum.h>
+#include <machine/cpustate.h>
+
+#include "assym.h"
+
+	.set	noreorder		# Noreorder is default style!
+
+	.globl	start
+	.globl	kernel_text
+kernel_text = start
+start:
+	mfc0    v0, COP_0_STATUS_REG
+	li	v1, ~SR_INT_ENAB
+	and	v0, v1
+	mtc0    v0, COP_0_STATUS_REG    # disable all interrupts
+
+	mtc0	zero, COP_0_CAUSE_REG	# Clear soft interrupts
+
+	/*
+	 * Initialize stack and call machine startup.
+	 */
+	LA	t0, start - FRAMESZ(CF_SZ)
+	LA	gp, _gp
+	PTR_S	ra, CF_RA_OFFS(t0)		# save pmon return address
+	PTR_S	sp, 0(t0)			# and stack
+	move	sp, t0
+	jal	mips_init			# mips_init(argc, argv, envp, callvec)
+	nop
+
+	beqz	v0, 1f				# upon failure, return to pmon
+	nop
+
+	PTR_S	zero, CF_RA_OFFS(sp)		# Zero out old ra for debugger
+	move	sp, v0				# switch to new stack
+	jal	main				# main(regs)
+	move	a0, zero
+	PANIC("Startup failed!")
+
+1:	PTR_L	ra, CF_RA_OFFS(sp)
+	PTR_L	sp, 0(sp)
+	jr	ra
+	nop
diff --git a/sys/arch/loongson/loongson/pmon32.S b/sys/arch/loongson/loongson/pmon32.S
new file mode 100644
index 00000000000..999191f8cf1
--- /dev/null
+++ b/sys/arch/loongson/loongson/pmon32.S
@@ -0,0 +1,165 @@
+/*	$OpenBSD: pmon32.S,v 1.1 2009/12/11 05:15:14 miod Exp $	*/
+
+/*
+ * Copyright (c) 2009 Miodrag Vallat.
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Wrapper routines to invoke PMON2000 functions from 64-bit code.
+ *
+ * Since the PMON code is compiled as 32 bit code, the upper part of the
+ * registers may be destroyed.
+ *
+ * As a result, we need to explicitely save all caller-saved registers,
+ * prior to invoking any PMON function.
+ *
+ * Moreover, O32 calling convention only allows up to four arguments to
+ * be passed through registers.  It's up to the caller to never invoke
+ * pmon_printf() with more than four arguments; other functions are not
+ * affected.
+ *
+ * 64-bit (off_t) return values are preserved (by merging v1 and v0) on a
+ * case-by-case basis.
+ */
+
+#include <machine/param.h>
+#include <machine/asm.h>
+
+#include "assym.h"
+
+	.set	mips3
+
+	.data
+	.globl	pmon_callvec
+pmon_callvec:
+	.word	0
+
+	.text
+
+	.set	noat
+
+/*
+ * Note that we need to provide a 32-bit CF_SZ untouched area above sp, or
+ * we'll get our stack corrupted upon return.
+ */
+
+#define	PMON_WRAP(name) \
+	NNON_LEAF(name, FRAMESZ(CF_SZ + 9 * REGSZ),  ra); \
+	PTR_SUBU sp, sp, FRAMESZ(CF_SZ + 9 * REGSZ); \
+	REG_S	ra, CF_RA_OFFS(sp); \
+	.mask	0xc0ff0000, (CF_RA_OFFS - FRAMESZ(CF_SZ + 9 * REGSZ)); \
+	REG_S	s0, (0 * REGSZ + CF_SZ)(sp); \
+	REG_S	s1, (1 * REGSZ + CF_SZ)(sp); \
+	REG_S	s2, (2 * REGSZ + CF_SZ)(sp); \
+	REG_S	s3, (3 * REGSZ + CF_SZ)(sp); \
+	REG_S	s4, (4 * REGSZ + CF_SZ)(sp); \
+	REG_S	s5, (5 * REGSZ + CF_SZ)(sp); \
+	REG_S	s6, (6 * REGSZ + CF_SZ)(sp); \
+	REG_S	s7, (7 * REGSZ + CF_SZ)(sp); \
+	REG_S	s8, (8 * REGSZ + CF_SZ)(sp)
+
+#define	PMON_END(name) \
+	REG_L	s8, (8 * REGSZ + CF_SZ)(sp); \
+	REG_L	s7, (7 * REGSZ + CF_SZ)(sp); \
+	REG_L	s6, (6 * REGSZ + CF_SZ)(sp); \
+	REG_L	s5, (5 * REGSZ + CF_SZ)(sp); \
+	REG_L	s4, (4 * REGSZ + CF_SZ)(sp); \
+	REG_L	s3, (3 * REGSZ + CF_SZ)(sp); \
+	REG_L	s2, (2 * REGSZ + CF_SZ)(sp); \
+	REG_L	s1, (1 * REGSZ + CF_SZ)(sp); \
+	REG_L	s0, (0 * REGSZ + CF_SZ)(sp); \
+	REG_L	ra, CF_RA_OFFS(sp); \
+	PTR_ADDU sp, sp, FRAMESZ(CF_SZ + 9 * REGSZ); \
+	jr	ra; \
+	nop; \
+	END(name)
+
+PMON_WRAP(pmon_printf)
+	lw	t0, pmon_callvec
+	lw	t0, 5 * 4 (t0)
+	jalr	t0
+	nop
+PMON_END(pmon_printf)
+
+PMON_WRAP(pmon_gets)
+	lw	t0, pmon_callvec
+	lw	t0, 7 * 4 (t0)
+	jalr	t0
+	nop
+	/* make sure the return value is sign extended */
+	dsll32	v0, 0
+	dsra32	v0, 0
+PMON_END(pmon_gets)
+
+#if 0
+
+PMON_WRAP(pmon_cacheflush)
+	lw	t0, pmon_callvec
+	lw	t0, 6 * 4 (t0)
+	jalr	t0
+	nop
+PMON_END(pmon_cacheflush)
+
+/*
+ * The following routines are untested.
+ */
+
+PMON_WRAP(pmon_open)
+	lw	t0, pmon_callvec
+	lw	t0, 0 * 4 (t0)
+	jalr	t0
+	nop
+PMON_END(pmon_open)
+
+PMON_WRAP(pmon_close)
+	lw	t0, pmon_callvec
+	lw	t0, 1 * 4 (t0)
+	jalr	t0
+	nop
+PMON_END(pmon_close)
+
+PMON_WRAP(pmon_read)
+	lw	t0, pmon_callvec
+	lw	t0, 2 * 4 (t0)
+	jalr	t0
+	nop
+PMON_END(pmon_read)
+
+PMON_WRAP(pmon_write)
+	lw	t0, pmon_callvec
+	lw	t0, 3 * 4 (t0)
+	jalr	t0
+	nop
+PMON_END(pmon_write)
+
+PMON_WRAP(pmon_lseek)
+	lw	t0, pmon_callvec
+	lw	t0, 4 * 4 (t0)
+	jalr	t0
+	nop
+	/* rebuild the 64 bit return value */
+	dsll32	v0, 0
+	dsll32	v1, 0
+#ifdef __MIPSEB__
+	/* v1 = lo << 32, v0 = hi << 32 */
+	dsrl32	v1, 0
+#else
+	/* v1 = hi << 32, v0 = lo << 32 */
+	dsrl32	v0, 0
+#endif
+	or	v0, v1, v0
+PMON_END(pmon_lseek)
+
+#endif