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authorSteve Murphree <smurph@cvs.openbsd.org>2001-07-06 05:14:32 +0000
committerSteve Murphree <smurph@cvs.openbsd.org>2001-07-06 05:14:32 +0000
commit34b13757881b59c5e4f76de2bb383bc8e0227a87 (patch)
tree68cf12894df9152c7bccc03f5ca6c1885bb2245f /sys
parent69b8f9e7beeddd85a5c5c83ce2f81f9c619d1b0f (diff)
resolve compile problems
Diffstat (limited to 'sys')
-rw-r--r--sys/arch/mvmeppc/conf/Makefile.mvmeppc5
-rw-r--r--sys/arch/mvmeppc/dev/clock.c18
-rw-r--r--sys/arch/mvmeppc/dev/openpic.c463
-rw-r--r--sys/arch/mvmeppc/include/intr.h8
-rw-r--r--sys/arch/mvmeppc/include/trap.h3
-rw-r--r--sys/arch/mvmeppc/isa/isa_machdep.c4
-rw-r--r--sys/arch/mvmeppc/mvmeppc/bus_space.c8
-rw-r--r--sys/arch/mvmeppc/mvmeppc/conf.c5
-rw-r--r--sys/arch/mvmeppc/mvmeppc/machdep.c86
-rw-r--r--sys/arch/mvmeppc/mvmeppc/pmap.c12
-rw-r--r--sys/arch/mvmeppc/mvmeppc/trap.c15
-rw-r--r--sys/arch/mvmeppc/pci/mpcpcibr.c672
12 files changed, 652 insertions, 647 deletions
diff --git a/sys/arch/mvmeppc/conf/Makefile.mvmeppc b/sys/arch/mvmeppc/conf/Makefile.mvmeppc
index 0379f2bf6ec..e6590ca4016 100644
--- a/sys/arch/mvmeppc/conf/Makefile.mvmeppc
+++ b/sys/arch/mvmeppc/conf/Makefile.mvmeppc
@@ -1,4 +1,4 @@
-# $OpenBSD: Makefile.mvmeppc,v 1.2 2001/07/06 00:38:19 smurph Exp $
+# $OpenBSD: Makefile.mvmeppc,v 1.3 2001/07/06 05:14:29 smurph Exp $
#
# Makefile for OpenBSD PowerPC
#
@@ -113,9 +113,6 @@ SYSTEM_LD_TAIL+=; \
LINKFLAGS+= -S
.endif
-bsd.rd: bsd
- echo cp $@ $@.rd; ./rdsetroot bsd.rd < mr.fs;
-
%LOAD
assym.h: $S/kern/genassym.sh ${PPC}/mvmeppc/genassym.cf
diff --git a/sys/arch/mvmeppc/dev/clock.c b/sys/arch/mvmeppc/dev/clock.c
index a5e7af5d53b..1d3434d0ed9 100644
--- a/sys/arch/mvmeppc/dev/clock.c
+++ b/sys/arch/mvmeppc/dev/clock.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: clock.c,v 1.1 2001/06/26 21:57:40 smurph Exp $ */
+/* $OpenBSD: clock.c,v 1.2 2001/07/06 05:14:29 smurph Exp $ */
/* $NetBSD: clock.c,v 1.1 1996/09/30 16:34:40 ws Exp $ */
/*
@@ -245,6 +245,7 @@ resettodr()
}
}
+static unsigned cnt = 1001;
void
decr_intr(frame)
struct clockframe *frame;
@@ -260,9 +261,15 @@ struct clockframe *frame;
*/
if (!ticks_per_intr)
return;
-
+#if 0
+ cnt++;
+ if (cnt > 1000) {
+ printf("derc int\n");
+ cnt = 0;
+ }
+#endif
intrcnt[PPC_CLK_IRQ]++;
-
+
/*
* Based on the actual time delay since the last decrementer reload,
* we arrange for earlier interrupt next time.
@@ -301,6 +308,11 @@ struct clockframe *frame;
hardclock(frame);
}
splx(pri);
+#if 0
+ if (cnt == 0)
+ printf("derc int done.\n");
+#endif
+
}
void
diff --git a/sys/arch/mvmeppc/dev/openpic.c b/sys/arch/mvmeppc/dev/openpic.c
index df41a7cf6d2..7a9145a88e0 100644
--- a/sys/arch/mvmeppc/dev/openpic.c
+++ b/sys/arch/mvmeppc/dev/openpic.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: openpic.c,v 1.2 2001/06/27 04:32:45 art Exp $ */
+/* $OpenBSD: openpic.c,v 1.3 2001/07/06 05:14:29 smurph Exp $ */
/*-
* Copyright (c) 1995 Per Fogelstrom
@@ -66,17 +66,23 @@
#define LEGAL_IRQ(x) ((x >= 0) && (x < ICU_LEN))
#define IO_ICU1 (RAVEN_P_ISA_IO_SPACE + 0x20)
#define IO_ICU2 (RAVEN_P_ISA_IO_SPACE + 0xA0)
+#define IO_ELCR1 (RAVEN_P_ISA_IO_SPACE + 0x4D0)
+#define IO_ELCR2 (RAVEN_P_ISA_IO_SPACE + 0x4D1)
#define IRQ_SLAVE 2
-#define ICU_OFFSET 16
+#define ICU_OFFSET 0
+#define PIC_OFFSET 16
+
unsigned char icu1_val = 0xff;
unsigned char icu2_val = 0xff;
+unsigned char elcr1_val = 0x00;
+unsigned char elcr2_val = 0x00;
#define SET_ICUS() (outb(IO_ICU1 + 1, imen), outb(IO_ICU2 + 1, imen >> 8))
static int intrtype[ICU_LEN], intrmask[ICU_LEN], intrlevel[ICU_LEN];
-static struct intrhand *intrhand[ICU_LEN] = { 0 };
+static struct intrhand *intrhand[ICU_LEN] = { 0};
static int hwirq[ICU_LEN], virq[ICU_LEN];
-unsigned int imen /* = 0xffffffff */; /* XXX */
+unsigned int imen /* = 0xffffffff */; /* XXX */
static int virq_max = 0;
struct evcnt evirq[ICU_LEN];
@@ -94,32 +100,31 @@ static struct raven_reg *ravenp = (struct raven_reg *)NULL;
#define HWIRQ_MAX 27
#define HWIRQ_MASK 0x0fffffff
-
-static __inline u_int openpic_read __P((int));
-static __inline void openpic_write __P((int, u_int));
-void openpic_enable_irq __P((int, int));
-void openpic_disable_irq __P((int));
-void openpic_init();
-void openpic_set_priority __P((int, int));
-void openpic_set_vec_pri __P((int, int));
-static __inline int openpic_read_irq __P((int));
-static __inline void openpic_eoi __P((int));
-
-void i8259_init __P((void));
-int i8259_intr __P((void));
-void i8259_enable_irq __P((int));
-void i8259_disable_irq __P((int));
-void *i8259_intr_establish( void * lcv, int irq, int type, int level,
- int (*ih_fun) __P((void *)), void *ih_arg, char *name);
+static __inline u_int openpic_read __P((int));
+static __inline void openpic_write __P((int, u_int));
+void openpic_enable_irq __P((int, int));
+void openpic_disable_irq __P((int));
+void openpic_init();
+void openpic_set_priority __P((int, int));
+void openpic_set_vec_pri __P((int, int));
+static __inline int openpic_read_irq __P((int));
+static __inline void openpic_eoi __P((int));
+
+void i8259_init __P((void));
+int i8259_intr __P((void));
+void i8259_enable_irq __P((int, int));
+void i8259_disable_irq __P((int));
+void *i8259_intr_establish( void * lcv, int irq, int type, int level,
+ int (*ih_fun) __P((void *)), void *ih_arg, char *name);
struct openpic_softc {
struct device sc_dev;
};
-int openpic_match __P((struct device *parent, void *cf, void *aux));
-void openpic_attach __P((struct device *, struct device *, void *));
-void openpic_do_pending_int();
-void ext_intr_openpic();
+int openpic_match __P((struct device *parent, void *cf, void *aux));
+void openpic_attach __P((struct device *, struct device *, void *));
+void openpic_do_pending_int();
+void ext_intr_openpic();
struct cfattach openpic_ca = {
sizeof(struct openpic_softc),
@@ -146,9 +151,9 @@ static int isaintrs = 0;
int
openpic_match(parent, cf, aux)
- struct device *parent;
- void *cf;
- void *aux;
+struct device *parent;
+void *cf;
+void *aux;
{
struct confargs *ca = aux;
@@ -156,11 +161,11 @@ openpic_match(parent, cf, aux)
if (strcmp(parent->dv_cfdata->cf_driver->cd_name, "raven") != 0)
return (0);
/* don't attach more than once. */
- if (ravenp != (struct raven_reg *)NULL){
+ if (ravenp != (struct raven_reg *)NULL) {
#ifdef DIAGNOSTIC
printf("openpic: trying to attach more than once!");
#endif
- return(0);
+ return (0);
}
/* If there is a raven, then there is a mpic! */
return 1;
@@ -175,19 +180,19 @@ static int i8259_dummy (void *arg);
typedef int mac_intr_handle_t;
typedef void *(intr_establish_t) __P((void *, mac_intr_handle_t,
- int, int, int (*func)(void *), void *, char *));
+ int, int, int (*func)(void *), void *, char *));
typedef void (intr_disestablish_t) __P((void *, void *));
-vaddr_t openpic_base;
+static vaddr_t openpic_base;
void * openpic_intr_establish( void * lcv, int irq, int type, int level,
- int (*ih_fun) __P((void *)), void *ih_arg, char *name);
+ int (*ih_fun) __P((void *)), void *ih_arg, char *name);
void openpic_intr_disestablish( void *lcp, void *arg);
void openpic_collect_preconf_intr();
void
openpic_attach(parent, self, aux)
- struct device *parent, *self;
- void *aux;
+struct device *parent, *self;
+void *aux;
{
struct confargs *ca = aux;
struct openpic_softc *sc = (void *)self;
@@ -197,7 +202,7 @@ openpic_attach(parent, self, aux)
extern intr_establish_t *mac_intr_establish_func;
extern intr_disestablish_t *mac_intr_disestablish_func;
#endif
- openpic_base = (vaddr_t)MPCIC_REG/* mapiodev (MPCIC_REG, 0x22000)*/;
+ openpic_base = (vaddr_t)mapiodev(MPCIC_REG, 0x22000);
printf(": version 0x%x", openpic_read(OPENPIC_FEATURE) & 0xFF);
@@ -205,28 +210,26 @@ openpic_attach(parent, self, aux)
openpic_init();
pending_int_f = openpic_do_pending_int;
- intr_establish_func = openpic_intr_establish;
+ intr_establish_func = i8259_intr_establish;
intr_disestablish_func = openpic_intr_disestablish;
#if 0
mac_intr_establish_func = openpic_intr_establish;
mac_intr_disestablish_func = openpic_intr_disestablish;
#endif
install_extint(ext_intr_openpic);
-
+
#if 1
openpic_collect_preconf_intr();
#endif
-#if 1
- intr_establish_func(parent, 0x00, IST_LEVEL, IPL_HIGH,
- i8259_dummy, (void *)0x00, "8259 Interrupt");
+#if 1
+ openpic_intr_establish(parent, 0x00, IST_LEVEL, IPL_HIGH,
+ i8259_dummy, (void *)0x00, "8259 Interrupt");
i8259_intr_establish(parent, 0x08, IST_EDGE, IPL_HIGH,
- abort_switch, (void *)0x08, "abort button");
+ abort_switch, (void *)0x08, "abort button");
#endif
-/*
- ppc_intr_enable(1);
-*/
+
printf("\n");
}
@@ -237,14 +240,14 @@ openpic_collect_preconf_intr()
for (i = 0; i < ppc_configed_intr_cnt; i++) {
#ifdef DEBUG
printf("\n\t%s irq %d level %d fun %x arg %x",
- ppc_configed_intr[i].ih_what, ppc_configed_intr[i].ih_irq,
- ppc_configed_intr[i].ih_level, ppc_configed_intr[i].ih_fun,
- ppc_configed_intr[i].ih_arg);
+ ppc_configed_intr[i].ih_what, ppc_configed_intr[i].ih_irq,
+ ppc_configed_intr[i].ih_level, ppc_configed_intr[i].ih_fun,
+ ppc_configed_intr[i].ih_arg);
#endif
openpic_intr_establish(NULL, ppc_configed_intr[i].ih_irq,
- IST_LEVEL, ppc_configed_intr[i].ih_level,
- ppc_configed_intr[i].ih_fun, ppc_configed_intr[i].ih_arg,
- ppc_configed_intr[i].ih_what);
+ IST_LEVEL, ppc_configed_intr[i].ih_level,
+ ppc_configed_intr[i].ih_fun, ppc_configed_intr[i].ih_arg,
+ ppc_configed_intr[i].ih_what);
}
}
@@ -268,7 +271,7 @@ i8259_dummy (void *arg)
static int
fakeintr(arg)
- void *arg;
+void *arg;
{
return 0;
@@ -279,13 +282,13 @@ fakeintr(arg)
*/
void *
i8259_intr_establish(lcv, irq, type, level, ih_fun, ih_arg, name)
- void * lcv;
- int irq;
- int type;
- int level;
- int (*ih_fun) __P((void *));
- void *ih_arg;
- char *name;
+void * lcv;
+int irq;
+int type;
+int level;
+int (*ih_fun) __P((void *));
+void *ih_arg;
+char *name;
{
struct intrhand **p, *q, *ih;
static struct intrhand fakehand;
@@ -295,12 +298,12 @@ i8259_intr_establish(lcv, irq, type, level, ih_fun, ih_arg, name)
fakehand.ih_fun = fakeintr;
#if 0
-printf("i8259_intr_establish, hI %d L %d ", irq, type);
+ printf("i8259_intr_establish, %d, %s", irq, (type == IST_EDGE) ? "EDGE":"LEVEL"));
#endif
isaintrs++;
irq = mapirq(irq + ICU_OFFSET);
#if 0
-printf("vI %d ", irq);
+ printf("vI %d ", irq);
#endif
/* no point in sleeping unless someone can free memory. */
@@ -322,8 +325,8 @@ printf("vI %d ", irq);
case IST_PULSE:
if (type != IST_NONE)
panic("intr_establish: can't share %s with %s",
- intr_typename(intrtype[irq]),
- intr_typename(type));
+ intr_typename(intrtype[irq]),
+ intr_typename(type));
break;
}
@@ -365,24 +368,24 @@ printf("vI %d ", irq);
*/
void *
openpic_intr_establish(lcv, irq, type, level, ih_fun, ih_arg, name)
- void * lcv;
- int irq;
- int type;
- int level;
- int (*ih_fun) __P((void *));
- void *ih_arg;
- char *name;
+void * lcv;
+int irq;
+int type;
+int level;
+int (*ih_fun) __P((void *));
+void *ih_arg;
+char *name;
{
struct intrhand **p, *q, *ih;
static struct intrhand fakehand;
- struct pci_route *pr;
+ struct pci_route *pr;
extern int cold;
fakehand.ih_next = NULL;
fakehand.ih_fun = fakeintr;
#if 0
-printf("mac_intr_establish, hI %d L %d ", irq, type);
+ printf("mac_intr_establish, hI %d L %d ", irq, type);
#endif
pr = pci_routes;
@@ -391,9 +394,9 @@ printf("mac_intr_establish, hI %d L %d ", irq, type);
pr++;
}
- irq = mapirq(irq);
+ irq = mapirq(irq + PIC_OFFSET);
#if 0
-printf("vI %d ", irq);
+ printf("vI %d ", irq);
#endif
/* no point in sleeping unless someone can free memory. */
@@ -415,8 +418,8 @@ printf("vI %d ", irq);
case IST_PULSE:
if (type != IST_NONE)
panic("intr_establish: can't share %s with %s",
- intr_typename(intrtype[irq]),
- intr_typename(type));
+ intr_typename(intrtype[irq]),
+ intr_typename(type));
break;
}
@@ -457,8 +460,8 @@ printf("vI %d ", irq);
*/
void
openpic_intr_disestablish(lcp, arg)
- void *lcp;
- void *arg;
+void *lcp;
+void *arg;
{
struct intrhand *ih = arg;
int irq = ih->ih_irq;
@@ -488,17 +491,17 @@ openpic_intr_disestablish(lcp, arg)
static char *
intr_typename(type)
- int type;
+int type;
{
switch (type) {
- case IST_NONE :
+ case IST_NONE :
return ("none");
- case IST_PULSE:
+ case IST_PULSE:
return ("pulsed");
- case IST_EDGE:
+ case IST_EDGE:
return ("edge-triggered");
- case IST_LEVEL:
+ case IST_LEVEL:
return ("level-triggered");
default:
panic("intr_typename: invalid type %d", type);
@@ -572,20 +575,20 @@ intr_calculatemasks()
for (irq = 0; irq < ICU_LEN; irq++) {
if (intrhand[irq]) {
irqs |= 1 << irq;
- if (hwirq[irq] >= ICU_OFFSET)
- i8259_enable_irq(hwirq[irq]);
- else
+ if (hwirq[irq] < PIC_OFFSET)
+ i8259_enable_irq(hwirq[irq], intrtype[irq]);
+ else
openpic_enable_irq(hwirq[irq], intrtype[irq]);
} else {
- if (hwirq[irq] >= ICU_OFFSET)
- i8259_disable_irq(hwirq[irq]);
- else
+ if (hwirq[irq] >= PIC_OFFSET)
openpic_disable_irq(hwirq[irq]);
+ else
+ i8259_disable_irq(hwirq[irq]);
}
}
}
#if 0
- i8259_enable_irq(2);
+ i8259_enable_irq(2, IST_EDGE);
#endif
}
/*
@@ -593,7 +596,7 @@ intr_calculatemasks()
*/
static int
mapirq(irq)
- int irq;
+int irq;
{
int v;
@@ -607,7 +610,7 @@ mapirq(irq)
hwirq[v] = irq;
virq[irq] = v;
#if 0
-printf("\nmapirq %x to %x\n", irq, v);
+ printf("\nmapirq %x to %x\n", irq, v);
#endif
return v;
@@ -618,7 +621,7 @@ printf("\nmapirq %x to %x\n", irq, v);
*/
static __inline int
cntlzw(x)
- int x;
+int x;
{
int a;
@@ -659,7 +662,7 @@ openpic_do_pending_int()
irq = 31 - cntlzw(hwpend);
hwpend &= ~(1L << irq);
ih = intrhand[irq];
- while(ih) {
+ while (ih) {
(*ih->ih_fun)(ih->ih_arg);
ih = ih->ih_next;
}
@@ -670,11 +673,11 @@ openpic_do_pending_int()
/*out32rb(INT_ENABLE_REG, ~imen);*/
do {
- if((ipending & SINT_CLOCK) & ~pcpl) {
+ if ((ipending & SINT_CLOCK) & ~pcpl) {
ipending &= ~SINT_CLOCK;
softclock();
}
- if((ipending & SINT_NET) & ~pcpl) {
+ if ((ipending & SINT_NET) & ~pcpl) {
extern int netisr;
int pisr = netisr;
netisr = 0;
@@ -690,17 +693,17 @@ openpic_do_pending_int()
u_int
openpic_read(reg)
- int reg;
+int reg;
{
char *addr = (void *)(openpic_base + reg);
-
+
return in32rb(addr);
}
void
openpic_write(reg, val)
- int reg;
- u_int val;
+int reg;
+u_int val;
{
char *addr = (void *)(openpic_base + reg);
@@ -717,38 +720,56 @@ int irq_mask;
#endif
for ( irq = 0; irq <= virq_max; irq++) {
if (irq_mask & (1 << irq)) {
- if (hwirq[irq] >= ICU_OFFSET)
- i8259_enable_irq(hwirq[irq]);
- else
+ if (hwirq[irq] >= PIC_OFFSET)
openpic_enable_irq(hwirq[irq], intrtype[irq]);
+ else
+ i8259_enable_irq(hwirq[irq], intrtype[irq]);
} else {
- if (hwirq[irq] >= ICU_OFFSET)
- i8259_disable_irq(hwirq[irq]);
- else
+ if (hwirq[irq] >= PIC_OFFSET)
openpic_disable_irq(hwirq[irq]);
+ else
+ i8259_disable_irq(hwirq[irq]);
}
}
}
void
openpic_enable_irq(irq, type)
- int irq;
- int type;
+int irq;
+int type;
{
u_int x;
/* skip invalid irqs */
- if (irq == -1)
+ if (irq == -1)
return;
+ if (irq >= PIC_OFFSET)
+ irq -= PIC_OFFSET;
+#ifdef OP_DEBUG
+ printf("enabeling irq %d, %s, val = 0x%x\n", irq, (type == IST_EDGE) ? "EDGE":"LEVEL", openpic_read(OPENPIC_SRC_VECTOR(irq)));
+#endif
+
+ while((x = openpic_read(OPENPIC_SRC_VECTOR(irq))) & OPENPIC_ACTIVITY){
+ x = openpic_read_irq(0);
+ openpic_eoi(0);
+#ifdef OP_DEBUG
+ printf("x=0x%x\n", x);
+#endif
+ }
- x = openpic_read(OPENPIC_SRC_VECTOR(irq));
- x &= ~(OPENPIC_IMASK|OPENPIC_SENSE_LEVEL|OPENPIC_SENSE_EDGE);
+ x &= ~(OPENPIC_IMASK|OPENPIC_SENSE_LEVEL|OPENPIC_SENSE_EDGE|
+ OPENPIC_POLARITY_POSITIVE);
+#if 1
+ if (irq == 0) {
+ x |= OPENPIC_POLARITY_POSITIVE;
+ }
+#endif
if (type == IST_LEVEL) {
x |= OPENPIC_SENSE_LEVEL;
} else {
x |= OPENPIC_SENSE_EDGE;
}
#ifdef OP_DEBUG
- printf("enabeling irq %d, type %d, val 0x%08x\n", irq, type, x);
+ printf("enabeling irq %d, %s, %s, val 0x%08x\n", irq, (type == IST_EDGE) ? "EDGE":"LEVEL", (x & OPENPIC_POLARITY_POSITIVE) ? "H":"L", x);
#endif
openpic_write(OPENPIC_SRC_VECTOR(irq), x);
@@ -756,73 +777,93 @@ openpic_enable_irq(irq, type)
void
openpic_disable_irq(irq)
- int irq;
+int irq;
{
u_int x;
/* skip invalid irqs */
- if (irq == -1)
- return;
-
+ if (irq >= PIC_OFFSET)
+ irq -= PIC_OFFSET;
+
x = openpic_read(OPENPIC_SRC_VECTOR(irq));
x |= OPENPIC_IMASK;
#ifdef OP_DEBUG
printf("disabeling irq %d, val 0x%08x\n", irq, x);
#endif
-
+
openpic_write(OPENPIC_SRC_VECTOR(irq), x);
}
void
i8259_set_irq_mask(void)
{
- if (icu2_val != 0xFF) {
+ if (icu2_val != 0xFF) {
/* Turn on the second IC */
- icu1_val &= ~(1 << 2);
+#ifdef OP_DEBUG
+ printf("turning on ICU2\n");
+#endif
+ icu1_val &= ~(1 << 2);
} else {
- icu1_val |= (1 << 2);
+ icu1_val |= (1 << 2);
}
outb(IO_ICU1 + 1, icu1_val);
- outb(IO_ICU2 + 1, icu2_val);
+ outb(IO_ICU2 + 1, icu2_val);
+ outb(IO_ELCR1, elcr1_val);
+ outb(IO_ELCR2, elcr2_val);
+#ifdef OP_DEBUG
+ printf("ICU %x-%x\n", icu2_val, icu1_val);
+ printf("ELCR %x-%x\n", elcr2_val, elcr1_val);
+#endif
}
void
i8259_disable_irq(irq)
int irq;
{
- if (irq >= ICU_OFFSET)
- irq -= ICU_OFFSET;
- if (irq < 8)
- icu1_val |= 1 << irq;
- else
- icu2_val |= 1 << (irq - 8);
- i8259_set_irq_mask();
+ if (irq == -1)
+ return;
+ if (irq < 8)
+ icu1_val |= 1 << irq;
+ else
+ icu2_val |= 1 << (irq - 8);
+ i8259_set_irq_mask();
#ifdef OP_DEBUG
printf("disabeling isa irq %d\n", irq);
#endif
}
void
-i8259_enable_irq(irq)
-int irq;
+i8259_enable_irq(irq, type)
+int irq, type;
{
-
- if (irq >= ICU_OFFSET)
- irq -= ICU_OFFSET;
- if ( irq < 8 )
- icu1_val &= ~(1 << irq);
- else
- icu2_val &= ~(1 << (irq - 8));
- i8259_set_irq_mask();
+ /* skip invalid irqs */
+ if (irq == -1)
+ return;
+ if ( irq < 8 ){
+ icu1_val &= ~(1 << irq);
+ if (type == IST_LEVEL) {
+ elcr1_val |= (1 << irq);
+ } else {
+ elcr1_val &= ~(1 << irq);
+ }
+ } else {
+ icu2_val &= ~(1 << (irq - 8));
+ if (type == IST_LEVEL) {
+ elcr2_val |= (1 << irq - 8);
+ } else {
+ elcr2_val &= ~(1 << irq - 8);
+ }
+ }
+ i8259_set_irq_mask();
#ifdef OP_DEBUG
- printf("enabeling isa irq %d\n", irq);
+ printf("enabeling isa irq %d, %s\n", irq, (type == IST_EDGE) ? "EDGE":"LEVEL");
#endif
}
void
openpic_set_priority(cpu, pri)
- int cpu, pri;
+int cpu, pri;
{
u_int x;
@@ -834,67 +875,66 @@ openpic_set_priority(cpu, pri)
int
openpic_read_irq(cpu)
- int cpu;
+int cpu;
{
return openpic_read(OPENPIC_IACK(cpu)) & OPENPIC_VECTOR_MASK;
}
void
openpic_eoi(cpu)
- int cpu;
+int cpu;
{
- openpic_write(OPENPIC_EOI(cpu), 0);
- openpic_read(OPENPIC_EOI(cpu));
+ openpic_write(OPENPIC_EOI(cpu), 0);
+ openpic_read(OPENPIC_EOI(cpu));
}
void i8259_init(void)
{
+#if 0
/* initialize 8259's */
outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
outb(IO_ICU1+1, ICU_OFFSET); /* starting at this vector index */
- outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */
+ outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */
outb(IO_ICU1+1, 1); /* 8086 mode */
outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
- /* init interrupt controller 2 */
+ /* init interrupt controller 2 */
outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
outb(IO_ICU2+1, ICU_OFFSET+8); /* staring at this vector index */
outb(IO_ICU2+1, IRQ_SLAVE);
outb(IO_ICU2+1, 1); /* 8086 mode */
outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
+#endif
}
int i8259_intr(void)
{
int irq;
- /*
- * Perform an interrupt acknowledge cycle on controller 1
- */
- outb(IO_ICU1, 0x0C);
- irq = inb(IO_ICU1) & 7;
+ /*
+ * Perform an interrupt acknowledge cycle on controller 1
+ */
+ outb(IO_ICU1, 0x0C);
+ irq = inb(IO_ICU1) & 7;
#ifdef OP_DEBUG
printf("isa intr = %d\n", irq);
#endif
- if (irq == 2)
- {
- /*
- * Interrupt is cascaded so perform interrupt
- * acknowledge on controller 2
- */
- outb(IO_ICU2, 0x0C);
- irq = (inb(IO_ICU2) & 7) + 8;
- }
- else if (irq==7)
- {
- /*
- * This may be a spurious interrupt
- *
- * Read the interrupt status register. If the most
- * significant bit is not set then there is no valid
- * interrupt
+ if (irq == 2) {
+ /*
+ * Interrupt is cascaded so perform interrupt
+ * acknowledge on controller 2
*/
+ outb(IO_ICU2, 0x0C);
+ irq = (inb(IO_ICU2) & 7) + 8;
+ } else if (irq==7) {
+ /*
+ * This may be a spurious interrupt
+ *
+ * Read the interrupt status register. If the most
+ * significant bit is not set then there is no valid
+* interrupt
+*/
outb(IO_ICU1, 0x0B);
- if(~inb(IO_ICU1)&0x80)
+ if (~inb(IO_ICU1)&0x80)
return 0xFF;
}
return (ICU_OFFSET + irq);
@@ -911,24 +951,24 @@ ext_intr_openpic()
#ifdef OP_DEBUG
printf("Interrupt!\n");
#endif
- pcpl = splhigh(); /* Turn off all */
+ pcpl = splhigh(); /* Turn off all */
realirq = openpic_read_irq(0);
#ifdef OP_DEBUG
printf("irq %d\n", realirq);
#endif
- while ((realirq != 0xFF) && (realirq != 0xAA)) {
- if (realirq == 0x00){
+ while (realirq != 0xFF) {
+ if (realirq == 0x00) {
realirq = i8259_intr();
#ifdef OP_DEBUG
printf("irq2 %d\n", realirq);
#endif
- openpic_eoi(0);
+ openpic_eoi(0);
if (realirq == 0xFF)
continue;
}
-
+
irq = virq[realirq];
intrcnt[realirq]++;
@@ -937,10 +977,10 @@ ext_intr_openpic()
r_imen = 1 << irq;
if ((pcpl & r_imen) != 0) {
- ipending |= r_imen; /* Masked! Mark this as pending */
+ ipending |= r_imen; /* Masked! Mark this as pending */
if (realirq >= ICU_OFFSET)
i8259_disable_irq(realirq);
- else
+ else
openpic_disable_irq(realirq);
} else {
ih = intrhand[irq];
@@ -957,12 +997,12 @@ ext_intr_openpic()
realirq = openpic_read_irq(0);
}
- splx(pcpl); /* Process pendings. */
+ splx(pcpl); /* Process pendings. */
}
void openpic_set_vec_pri(int irq, int pri)
{
- u_int x;
+ u_int x;
x = openpic_read(OPENPIC_SRC_VECTOR(irq));
x &= ~OPENPIC_PRIORITY_MASK;
x |= pri << OPENPIC_PRIORITY_SHIFT;
@@ -971,7 +1011,7 @@ void openpic_set_vec_pri(int irq, int pri)
void openpic_initirq(int irq, int pri, int vec, int pol, int sense)
{
- u_int x;
+ u_int x;
x = (vec & OPENPIC_VECTOR_MASK);
x |= OPENPIC_IMASK;
x |= (pol ? OPENPIC_POLARITY_POSITIVE : OPENPIC_POLARITY_NEGATIVE);
@@ -983,48 +1023,53 @@ void openpic_initirq(int irq, int pri, int vec, int pol, int sense)
void
openpic_init()
{
- int irq;
- u_int x;
-
+ int irq;
+ u_int x;
+
/* disable all interrupts and init hwirq[] */
- for (irq = 0; irq < ICU_LEN; irq++){
- hwirq[irq] = -1;
- openpic_write(OPENPIC_SRC_VECTOR(irq), OPENPIC_IMASK);
+ for (irq = 0; irq < ICU_LEN; irq++) {
+ hwirq[irq] = -1;
+ intrtype[irq] = IST_NONE;
+ intrmask[irq] = 0;
+ intrlevel[irq] = 0;
+ intrhand[irq] = NULL;
+ openpic_write(OPENPIC_SRC_VECTOR(irq), OPENPIC_IMASK);
}
- openpic_set_priority(0, 15);
+
+ openpic_set_priority(0, 15);
+
+ /* we don't need 8259 pass through mode */
+ x = openpic_read(OPENPIC_CONFIG);
+ x |= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE;
+ openpic_write(OPENPIC_CONFIG, x);
- /* we don't need 8259 pass through mode */
- x = openpic_read(OPENPIC_CONFIG);
- x |= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE;
- openpic_write(OPENPIC_CONFIG, x);
+ /* send all interrupts to cpu 0 */
+ for (irq = 0; irq < ICU_LEN; irq++)
+ openpic_write(OPENPIC_SRC_DEST(irq), CPU(0));
- /* send all interrupts to cpu 0 */
- for (irq = 0; irq < ICU_LEN; irq++)
- openpic_write(OPENPIC_SRC_DEST(irq), CPU(0));
-
/* special case for intr src 0 */
openpic_initirq(0, 8, 0, 1, 0);
-
+
for (irq = 1; irq < ICU_LEN; irq++) {
- openpic_initirq(irq, 8, irq, 0, 1);
- }
+ openpic_initirq(irq, 8, irq, 0, 1);
+ }
+
+ /* XXX set spurious intr vector */
+ openpic_write(OPENPIC_SPURIOUS_VECTOR, 0xFF);
- /* XXX set spurious intr vector */
- openpic_write(OPENPIC_SPURIOUS_VECTOR, 0xFF);
-
- /* unmask interrupts for cpu 0 */
+ /* unmask interrupts for cpu 0 */
openpic_set_priority(0, 0);
- /* clear all pending interrunts */
- for (irq = 0; irq < ICU_OFFSET; irq++) {
- openpic_read_irq(0);
- openpic_eoi(0);
- }
+ /* clear all pending interrunts */
+ for (irq = 0; irq < PIC_OFFSET; irq++) {
+ openpic_read_irq(0);
+ openpic_eoi(0);
+ }
- for (irq = 0; irq < ICU_OFFSET; irq++){
+ for (irq = 0; irq < PIC_OFFSET; irq++) {
i8259_disable_irq(irq);
- openpic_disable_irq(irq);
+ openpic_disable_irq(irq);
}
-
+
install_extint(ext_intr_openpic);
}
diff --git a/sys/arch/mvmeppc/include/intr.h b/sys/arch/mvmeppc/include/intr.h
index 0093a81410a..00ded9826a9 100644
--- a/sys/arch/mvmeppc/include/intr.h
+++ b/sys/arch/mvmeppc/include/intr.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: intr.h,v 1.1 2001/06/26 21:57:46 smurph Exp $ */
+/* $OpenBSD: intr.h,v 1.2 2001/07/06 05:14:30 smurph Exp $ */
/*
* Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
@@ -64,8 +64,8 @@ int splsoftnet __P((void));
void do_pending_int __P((void));
-volatile int cpl, ipending, astpending, tickspending;
-int imask[7];
+volatile extern int cpl, ipending, astpending, tickspending;
+extern int imask[7];
/*
* Reorder protection in the following inline functions is
@@ -136,6 +136,7 @@ set_sint(pending)
#define spltty() splraise(imask[IPL_TTY])
#define splclock() splraise(SPL_CLOCK|SINT_MASK)
#define splimp() splraise(imask[IPL_IMP])
+#define splvm() splraise(imask[IPL_IMP])
#define splstatclock() splhigh()
#define spllowersoftclock() spllower(SINT_CLOCK)
#define splsoftclock() splraise(SINT_CLOCK)
@@ -165,6 +166,7 @@ struct intrhand {
extern int ppc_configed_intr_cnt;
#define MAX_PRECONF_INTR 16
extern struct intrhand ppc_configed_intr[MAX_PRECONF_INTR];
+void softnet(int isr);
#endif /* _LOCORE */
diff --git a/sys/arch/mvmeppc/include/trap.h b/sys/arch/mvmeppc/include/trap.h
index e396bd84963..9b66f42c4ec 100644
--- a/sys/arch/mvmeppc/include/trap.h
+++ b/sys/arch/mvmeppc/include/trap.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: trap.h,v 1.2 2001/07/04 08:31:32 niklas Exp $ */
+/* $OpenBSD: trap.h,v 1.3 2001/07/06 05:14:30 smurph Exp $ */
/* $NetBSD: trap.h,v 1.1 1996/09/30 16:34:35 ws Exp $ */
/*
@@ -77,6 +77,7 @@
#define EXC_ALI_OPCODE_INDICATOR(dsisr) ((dsisr >> 10) & 0x7f)
#define EXC_ALI_LFD 0x09
#define EXC_ALI_STFD 0x0b
+#define EXC_ALI_DCBZ 0x5f
/* Macros to extract register information */
#define EXC_ALI_RST(dsisr) ((dsisr >> 5) & 0x1f) /* source or target */
diff --git a/sys/arch/mvmeppc/isa/isa_machdep.c b/sys/arch/mvmeppc/isa/isa_machdep.c
index 15aa605bfc3..b3c8e52bbaf 100644
--- a/sys/arch/mvmeppc/isa/isa_machdep.c
+++ b/sys/arch/mvmeppc/isa/isa_machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: isa_machdep.c,v 1.1 2001/06/26 21:57:51 smurph Exp $ */
+/* $OpenBSD: isa_machdep.c,v 1.2 2001/07/06 05:14:30 smurph Exp $ */
/* $NetBSD: isa_machdep.c,v 1.22 1997/06/12 23:57:32 thorpej Exp $ */
#define ISA_DMA_STATS
@@ -133,7 +133,7 @@
#include <dev/isa/isareg.h>
#include <dev/isa/isavar.h>
#include <dev/isa/isadmavar.h>
-#include <powerpc/isa/isa_machdep.h>
+#include <mvmeppc/isa/isa_machdep.h>
void *i8259_intr_establish( void * lcv, int irq, int type, int level,
int (*ih_fun) __P((void *)), void *ih_arg, char *name);
diff --git a/sys/arch/mvmeppc/mvmeppc/bus_space.c b/sys/arch/mvmeppc/mvmeppc/bus_space.c
index d088d2c624a..560b1c9798f 100644
--- a/sys/arch/mvmeppc/mvmeppc/bus_space.c
+++ b/sys/arch/mvmeppc/mvmeppc/bus_space.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: bus_space.c,v 1.3 2001/07/05 10:00:36 art Exp $ */
+/* $OpenBSD: bus_space.c,v 1.4 2001/07/06 05:14:30 smurph Exp $ */
/* $NetBSD: bus_space.c,v 1.4 2001/06/15 15:50:05 nonaka Exp $ */
/*-
@@ -199,12 +199,12 @@ prep_memio_alloc(t, rstart, rend, size, alignment, boundary, flags,
if (rstart < ex->ex_start || rend > ex->ex_end)
panic("prep_memio_alloc: bad region start/end");
- error = extent_alloc_subregion(ex, rstart, rend, size, alignment, 0,
+ error = extent_alloc_subregion(ex, rstart, rend, size, alignment, 0,
boundary,
EX_FAST | EX_NOWAIT | (ioport_malloc_safe ? EX_MALLOCOK : 0),
&bpa);
-
- if (error)
+
+ if (error)
return (error);
*bpap = bpa;
diff --git a/sys/arch/mvmeppc/mvmeppc/conf.c b/sys/arch/mvmeppc/mvmeppc/conf.c
index 61a956b03f6..1752d46d270 100644
--- a/sys/arch/mvmeppc/mvmeppc/conf.c
+++ b/sys/arch/mvmeppc/mvmeppc/conf.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: conf.c,v 1.5 2001/07/01 20:14:18 angelos Exp $ */
+/* $OpenBSD: conf.c,v 1.6 2001/07/06 05:14:30 smurph Exp $ */
/*
* Copyright (c) 1997 Per Fogelstrom
@@ -149,6 +149,9 @@ cdev_decl(lkm);
#include "ksyms.h"
cdev_decl(ksyms);
+#include "pf.h"
+cdev_decl(pf);
+
#include <altq/altqconf.h>
struct cdevsw cdevsw[] = {
diff --git a/sys/arch/mvmeppc/mvmeppc/machdep.c b/sys/arch/mvmeppc/mvmeppc/machdep.c
index b8773e77d50..dbb9ab1f969 100644
--- a/sys/arch/mvmeppc/mvmeppc/machdep.c
+++ b/sys/arch/mvmeppc/mvmeppc/machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: machdep.c,v 1.2 2001/06/27 04:32:46 art Exp $ */
+/* $OpenBSD: machdep.c,v 1.3 2001/07/06 05:14:30 smurph Exp $ */
/* $NetBSD: machdep.c,v 1.4 1996/10/16 19:33:11 ws Exp $ */
/*
@@ -169,7 +169,6 @@ static int devio_malloc_safe = 0;
int segment8_mapped = 0;
int segment0_mapped = 0;
int segmentC_mapped = 0;
-unsigned char fw_vectors[0x3000];
extern int where;
@@ -203,7 +202,6 @@ initppc(startkernel, endkernel, args)
proc0.p_addr = proc0paddr;
bzero(proc0.p_addr, sizeof *proc0.p_addr);
- bcopy((void *)0, &fw_vectors[0], 0x3000);
fw = &ppc1_firmware; /* Just PPC1-Bug for now... */
/*
* XXX We use the page just above the interrupt vector as
@@ -218,9 +216,7 @@ initppc(startkernel, endkernel, args)
/* startup fake console driver. It will be replaced by consinit() */
cn_tab = &bootcons;
-#ifdef STEVE_DEBUG
- printf("initmsgbuf() done.\n");
-#endif
+
/*
* Initialize BAT registers to unmapped to not generate
* overlapping mappings below.
@@ -306,10 +302,6 @@ initppc(startkernel, endkernel, args)
__asm__ volatile ("mtdbatl 3,%0; mtdbatu 3,%1"
:: "r"(battable[0x3].batl), "r"(battable[0x3].batu));
#endif
-#ifdef STEVE_DEBUG
- printf("bats mapped.\n");
-#endif
-#if 1
/*
* Set up trap vectors
*/
@@ -323,7 +315,6 @@ initppc(startkernel, endkernel, args)
* This one is (potentially) installed during autoconf
*/
break;
-#if 1
case EXC_DSI:
bcopy(&dsitrap, (void *)EXC_DSI, (size_t)&dsisize);
break;
@@ -333,7 +324,6 @@ initppc(startkernel, endkernel, args)
case EXC_ALI:
bcopy(&alitrap, (void *)EXC_ALI, (size_t)&alisize);
break;
-#endif
case EXC_DECR:
bcopy(&decrint, (void *)EXC_DECR, (size_t)&decrsize);
break;
@@ -360,39 +350,17 @@ initppc(startkernel, endkernel, args)
}
syncicache((void *)EXC_RST, EXC_LAST - EXC_RST + 0x100);
-#endif
-#ifdef STEVE_DEBUG
- printf("vectors set.\n");
-#endif
uvmexp.pagesize = 4096;
uvm_setpagesize();
-#ifdef STEVE_DEBUG
- printf("page size set.\n");
-#endif
/*
* Initialize pmap module.
*/
pmap_bootstrap(startkernel, endkernel);
- /*(fw->vmon)();*/
ppc_vmon();
-#ifdef STEVE_DEBUG
- printf("pmap_bootstrap() done.\n");
- /* mvmeprom_return(); */
-#endif
- msr = ppc_get_msr();
- msr &= ~PSL_IP;
- ppc_set_msr(msr);
-#ifdef STEVE_DEBUG
- printf("msr == 0x%08x\n", msr);
- printf("bit == %032b\n", msr);
- printf("made it!\n");
- /* mvmeprom_return(); */
-#endif
-
/*
* Now enable translation (and machine checks/recoverable interrupts).
* This will also start using the exception vector prefix of 0x000.
@@ -401,9 +369,6 @@ initppc(startkernel, endkernel, args)
__asm__ volatile ("eieio; mfmsr %0; ori %0,%0,%1; mtmsr %0; sync;isync"
: "=r"(scratch) : "K"(PSL_IR|PSL_DR|PSL_ME|PSL_RI));
-#if 1 /*def STEVE_DEBUG*/
- printf("translation enabled.\n");
-#endif
/*
* Look at arguments passed to us and compute boothowto.
* Default to SINGLE and ASKNAME if no args or
@@ -443,12 +408,7 @@ initppc(startkernel, endkernel, args)
}
}
}
-#if 0
- ddb_init((int)(esym - (&_end)), &_end, esym);
-#endif
-#ifdef STEVE_DEBUG
- printf("boothowto == %d\n", boothowto);
-#endif
+
/*
* Set up extents for pci mappings
* Is this too late?
@@ -467,28 +427,16 @@ initppc(startkernel, endkernel, args)
* 0xf0000000 - kernel map segment (user space mapped here)
*/
-#ifdef STEVE_DEBUG
- printf("before extent_create()\n");
-#endif
prep_bus_space_init();
devio_ex = extent_create("devio", 0x80000000, 0xffffffff, M_DEVBUF,
(caddr_t)devio_ex_storage, sizeof(devio_ex_storage),
EX_NOCOALESCE|EX_NOWAIT);
-#ifdef STEVE_DEBUG
- printf("extent_create() done.\n");
-#endif
/*
* Now we can set up the console as mapping is enabled.
- */
-#ifdef STEVE_DEBUG
- printf("before consinit()\n");
-#endif
+ */
consinit();
-#ifdef STEVE_DEBUG
- printf("consinit() done.\n");
-#endif
- /* while using openfirmware, run userconfig */
+
if (boothowto & RB_CONFIG) {
#ifdef BOOT_CONFIG
user_config();
@@ -500,9 +448,6 @@ initppc(startkernel, endkernel, args)
* Replace with real console.
*/
cninit();
-#ifdef STEVE_DEBUG
- printf("cninit() done.\n");
-#endif
#ifdef OWF
ofwconprobe();
#endif
@@ -522,15 +467,6 @@ initppc(startkernel, endkernel, args)
#endif
#endif
- /*
- * Figure out ethernet address.
- */
-#if 0
- (void)power4e_get_eth_addr();
-#endif
-#ifdef STEVE_DEBUG
- printf("return to locore.\n");
-#endif
}
void
@@ -969,10 +905,7 @@ boot(howto)
if (!cold && !(howto & RB_NOSYNC) && !syncing) {
syncing = 1;
vfs_shutdown(); /* sync */
-#if 0
- /* resettodr does not currently do anything, address
- * this later
- */
+
/*
* If we've been adjusting the clock, the todr
* will be out of synch; adjust it now unless
@@ -983,25 +916,18 @@ boot(howto)
} else {
printf("WARNING: not updating battery clock\n");
}
-#endif
}
splhigh();
if (howto & RB_HALT) {
doshutdownhooks();
printf("halted\n\n");
ppc_exit();
- /*
- (fw->exit)();
- */
}
if (!cold && (howto & RB_DUMP))
dumpsys();
doshutdownhooks();
printf("rebooting\n\n");
ppc_boot(str);
- /*
- (fw->boot)();
- */
while(1) /* forever */;
}
diff --git a/sys/arch/mvmeppc/mvmeppc/pmap.c b/sys/arch/mvmeppc/mvmeppc/pmap.c
index 3c3109f582d..fd04d8590c8 100644
--- a/sys/arch/mvmeppc/mvmeppc/pmap.c
+++ b/sys/arch/mvmeppc/mvmeppc/pmap.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pmap.c,v 1.3 2001/06/27 06:19:52 art Exp $ */
+/* $OpenBSD: pmap.c,v 1.4 2001/07/06 05:14:30 smurph Exp $ */
/* $NetBSD: pmap.c,v 1.1 1996/09/30 16:34:52 ws Exp $ */
/*
@@ -943,16 +943,26 @@ void
pmap_zero_page(pa)
vm_offset_t pa;
{
+#ifdef SDEBUG
+ int s = splimp();
+#endif
#if 0
bzero((caddr_t)pa, NBPG);
#else
int i;
for (i = NBPG/CACHELINESIZE; i > 0; i--) {
+#ifdef SDEBUG
+ printf("pmap_zero_page() pa = %p\n", pa);
+#endif
__asm __volatile ("dcbz 0,%0" :: "r"(pa));
pa += CACHELINESIZE;
}
#endif
+#ifdef SDEBUG
+ splx(s);
+ printf("pmap_zero_page() done.\n");
+#endif
}
/*
diff --git a/sys/arch/mvmeppc/mvmeppc/trap.c b/sys/arch/mvmeppc/mvmeppc/trap.c
index 782722795b7..bbfb99325b6 100644
--- a/sys/arch/mvmeppc/mvmeppc/trap.c
+++ b/sys/arch/mvmeppc/mvmeppc/trap.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: trap.c,v 1.2 2001/06/27 04:32:46 art Exp $ */
+/* $OpenBSD: trap.c,v 1.3 2001/07/06 05:14:30 smurph Exp $ */
/* $NetBSD: trap.c,v 1.3 1996/10/13 03:31:37 christos Exp $ */
/*
@@ -153,7 +153,7 @@ trap(frame)
}
map = kernel_map;
}
-printf("kern dsi on addr %x iar %x\n", frame->dar, frame->srr0);
+ printf("kern dsi on addr %x iar %x\n", frame->dar, frame->srr0);
goto brain_damage;
case EXC_DSI|EXC_USER:
{
@@ -170,7 +170,7 @@ printf("kern dsi on addr %x iar %x\n", frame->dar, frame->srr0);
break;
}
#if 0
-printf("dsi on addr %x iar %x lr %x\n", frame->dar, frame->srr0,frame->lr);
+ printf("dsi on addr %x iar %x lr %x\n", frame->dar, frame->srr0,frame->lr);
#endif
/*
* keep this for later in case we want it later.
@@ -314,6 +314,14 @@ syscall_bad:
enable_fpu(p);
break;
+ case EXC_ALI:
+ if (EXC_ALI_OPCODE_INDICATOR(frame->dsisr) == EXC_ALI_DCBZ) {
+ bzero((void*)frame->dar, CACHELINESIZE);
+ frame->srr0 += 4;
+ } else
+ goto brain_damage;
+ break;
+
case EXC_ALI|EXC_USER:
/* alignment exception
* we check to see if this can be fixed up
@@ -348,7 +356,6 @@ mpc_print_pci_stat();
{
char *errstr[8];
int errnum = 0;
- int i;
if (frame->srr1 & (1<<(31-11))) {
/* floating point enabled program exception */
diff --git a/sys/arch/mvmeppc/pci/mpcpcibr.c b/sys/arch/mvmeppc/pci/mpcpcibr.c
index 65166225d51..a268f777d5c 100644
--- a/sys/arch/mvmeppc/pci/mpcpcibr.c
+++ b/sys/arch/mvmeppc/pci/mpcpcibr.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: mpcpcibr.c,v 1.1 2001/06/26 21:57:56 smurph Exp $ */
+/* $OpenBSD: mpcpcibr.c,v 1.2 2001/07/06 05:14:31 smurph Exp $ */
/*
* Copyright (c) 2001 Steve Murphree, Jr.
@@ -61,7 +61,7 @@ int mpcpcibrmatch __P((struct device *, void *, void *));
void mpcpcibrattach __P((struct device *, struct device *, void *));
void mpc_attach_hook __P((struct device *, struct device *,
- struct pcibus_attach_args *));
+ struct pcibus_attach_args *));
int mpc_bus_maxdevs __P((void *, int));
pcitag_t mpc_make_tag __P((void *, int, int, int));
void mpc_decompose_tag __P((void *, pcitag_t, int *, int *, int *));
@@ -71,7 +71,7 @@ void mpc_conf_write __P((void *, pcitag_t, int, pcireg_t));
int mpc_intr_map __P((void *, pcitag_t, int, int, pci_intr_handle_t *));
const char *mpc_intr_string __P((void *, pci_intr_handle_t));
void *mpc_intr_establish __P((void *, pci_intr_handle_t,
- int, int (*func)(void *), void *, char *));
+ int, int (*func)(void *), void *, char *));
void mpc_intr_disestablish __P((void *, void *));
int mpc_ether_hw_addr __P((struct ppc_pci_chipset *, u_int8_t *));
@@ -92,11 +92,11 @@ u_int32_t
mpc_cfg_read_4( struct pcibr_config *cp, u_int32_t reg);
struct cfattach mpcpcibr_ca = {
- sizeof(struct pcibr_softc), mpcpcibrmatch, mpcpcibrattach,
+ sizeof(struct pcibr_softc), mpcpcibrmatch, mpcpcibrattach,
};
struct cfdriver mpcpcibr_cd = {
- NULL, "mpcpcibr", DV_DULL,
+ NULL, "mpcpcibr", DV_DULL,
};
static int mpcpcibrprint __P((void *, const char *pnp));
@@ -114,20 +114,20 @@ struct pcibr_config mpc_config;
*/
struct powerpc_bus_dma_tag pci_bus_dma_tag = {
- NULL,
- _bus_dmamap_create,
- _bus_dmamap_destroy,
- _bus_dmamap_load,
- _bus_dmamap_load_mbuf,
- _bus_dmamap_load_uio,
- _bus_dmamap_load_raw,
- _bus_dmamap_unload,
- _bus_dmamap_sync,
- _bus_dmamem_alloc,
- _bus_dmamem_free,
- _bus_dmamem_map,
- _bus_dmamem_unmap,
- _bus_dmamem_mmap
+ NULL,
+ _bus_dmamap_create,
+ _bus_dmamap_destroy,
+ _bus_dmamap_load,
+ _bus_dmamap_load_mbuf,
+ _bus_dmamap_load_uio,
+ _bus_dmamap_load_raw,
+ _bus_dmamap_unload,
+ _bus_dmamap_sync,
+ _bus_dmamem_alloc,
+ _bus_dmamem_free,
+ _bus_dmamem_map,
+ _bus_dmamem_unmap,
+ _bus_dmamem_mmap
};
int
@@ -135,17 +135,17 @@ mpcpcibrmatch(parent, match, aux)
struct device *parent;
void *match, *aux;
{
- struct confargs *ca = aux;
- int found = 0;
+ struct confargs *ca = aux;
+ int found = 0;
- /* We must be a child of the raven device */
- if (strcmp(parent->dv_cfdata->cf_driver->cd_name, "raven") != 0)
- return (0);
+ /* We must be a child of the raven device */
+ if (strcmp(parent->dv_cfdata->cf_driver->cd_name, "raven") != 0)
+ return (0);
#if 0
- if (strcmp(ca->ca_name, mpcpcibr_cd.cd_name) != 0)
- return (0);
+ if (strcmp(ca->ca_name, mpcpcibr_cd.cd_name) != 0)
+ return (0);
#endif
- return 1;
+ return 1;
}
int pci_map_a = 0;
@@ -154,95 +154,95 @@ mpcpcibrattach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
- struct pcibr_softc *sc = (struct pcibr_softc *)self;
- struct confargs *ca = aux;
- struct pcibr_config *lcp;
- struct pcibus_attach_args pba;
- int map, node;
- char *bridge;
- int of_node = 0;
-
- lcp = sc->sc_pcibr = &mpc_config;
-
- /*
- addbatmap(RAVEN_V_PCI_MEM_SPACE, RAVEN_P_PCI_MEM_SPACE, BAT_I);
- */
- sc->sc_membus_space = prep_mem_space_tag;
- sc->sc_iobus_space = prep_io_space_tag;
-
- lcp->lc_pc.pc_conf_v = lcp;
- lcp->lc_pc.pc_attach_hook = mpc_attach_hook;
- lcp->lc_pc.pc_bus_maxdevs = mpc_bus_maxdevs;
- lcp->lc_pc.pc_make_tag = mpc_make_tag;
- lcp->lc_pc.pc_decompose_tag = mpc_decompose_tag;
- lcp->lc_pc.pc_conf_read = mpc_conf_read;
- lcp->lc_pc.pc_conf_write = mpc_conf_write;
- lcp->lc_pc.pc_ether_hw_addr = mpc_ether_hw_addr;
- lcp->lc_iot = &sc->sc_iobus_space;
- lcp->lc_memt = &sc->sc_membus_space;
-
- lcp->ioh_cf8 = PREP_CONFIG_ADD;
- lcp->ioh_cfc = PREP_CONFIG_DAT;
-
- lcp->config_type = 0;
-
- lcp->lc_pc.pc_intr_v = lcp;
- lcp->lc_pc.pc_intr_map = mpc_intr_map;
- lcp->lc_pc.pc_intr_string = mpc_intr_string;
- lcp->lc_pc.pc_intr_establish = mpc_intr_establish;
- lcp->lc_pc.pc_intr_disestablish = mpc_intr_disestablish;
-
- printf(": Raven, Revision 0x%x.\n",
- mpc_cfg_read_1(lcp, RAVEN_PCI_REVID));
- bridge = "RAVEN";
- pba.pba_dmat = &pci_bus_dma_tag;
-
- pba.pba_busname = "pci";
- pba.pba_iot = &sc->sc_iobus_space;
- pba.pba_memt = &sc->sc_membus_space;
- pba.pba_pc = &lcp->lc_pc;
- pba.pba_bus = 0;
+ struct pcibr_softc *sc = (struct pcibr_softc *)self;
+ struct confargs *ca = aux;
+ struct pcibr_config *lcp;
+ struct pcibus_attach_args pba;
+ int map, node;
+ char *bridge;
+ int of_node = 0;
+
+ lcp = sc->sc_pcibr = &mpc_config;
+
+ /*
+addbatmap(RAVEN_V_PCI_MEM_SPACE, RAVEN_P_PCI_MEM_SPACE, BAT_I);
+*/
+ sc->sc_membus_space = prep_mem_space_tag;
+ sc->sc_iobus_space = prep_io_space_tag;
+
+ lcp->lc_pc.pc_conf_v = lcp;
+ lcp->lc_pc.pc_attach_hook = mpc_attach_hook;
+ lcp->lc_pc.pc_bus_maxdevs = mpc_bus_maxdevs;
+ lcp->lc_pc.pc_make_tag = mpc_make_tag;
+ lcp->lc_pc.pc_decompose_tag = mpc_decompose_tag;
+ lcp->lc_pc.pc_conf_read = mpc_conf_read;
+ lcp->lc_pc.pc_conf_write = mpc_conf_write;
+ lcp->lc_pc.pc_ether_hw_addr = mpc_ether_hw_addr;
+ lcp->lc_iot = &sc->sc_iobus_space;
+ lcp->lc_memt = &sc->sc_membus_space;
+
+ lcp->ioh_cf8 = PREP_CONFIG_ADD;
+ lcp->ioh_cfc = PREP_CONFIG_DAT;
+
+ lcp->config_type = 0;
+
+ lcp->lc_pc.pc_intr_v = lcp;
+ lcp->lc_pc.pc_intr_map = mpc_intr_map;
+ lcp->lc_pc.pc_intr_string = mpc_intr_string;
+ lcp->lc_pc.pc_intr_establish = mpc_intr_establish;
+ lcp->lc_pc.pc_intr_disestablish = mpc_intr_disestablish;
+
+ printf(": Raven, Revision 0x%x.\n",
+ mpc_cfg_read_1(lcp, RAVEN_PCI_REVID));
+ bridge = "RAVEN";
+ pba.pba_dmat = &pci_bus_dma_tag;
+
+ pba.pba_busname = "pci";
+ pba.pba_iot = &sc->sc_iobus_space;
+ pba.pba_memt = &sc->sc_membus_space;
+ pba.pba_pc = &lcp->lc_pc;
+ pba.pba_bus = 0;
/*
- pba.pba_flags = PCI_FLAGS_MEM_ENABLED | PCI_FLAGS_IO_ENABLED;
+ pba.pba_flags = PCI_FLAGS_MEM_ENABLED | PCI_FLAGS_IO_ENABLED;
*/
-#if 1
- /* set up prep environment */
- *(unsigned int *)RAVEN_MSADD0 = RAVEN_MSADD0_PREP;
- *(unsigned int *)RAVEN_MSOFF0 = RAVEN_MSOFF0_PREP;
- *(unsigned int *)RAVEN_MSADD1 = RAVEN_MSADD1_PREP;
- *(unsigned int *)RAVEN_MSOFF1 = RAVEN_MSOFF1_PREP;
- *(unsigned int *)RAVEN_MSADD2 = RAVEN_MSADD2_PREP;
- *(unsigned int *)RAVEN_MSOFF2 = RAVEN_MSOFF2_PREP;
- *(unsigned int *)RAVEN_MSADD3 = RAVEN_MSADD3_PREP;
- *(unsigned int *)RAVEN_MSOFF3 = RAVEN_MSOFF3_PREP;
-
- /* set up PCI local bus */
- mpc_cfg_write_4(lcp, RAVEN_PCI_PSADD0, RAVEN_PCI_PSADD0_VAL);
- mpc_cfg_write_4(lcp, RAVEN_PCI_PSOFF0, RAVEN_PCI_PSOFF0_VAL);
- mpc_cfg_write_4(lcp, RAVEN_PCI_PSADD1, RAVEN_PCI_PSADD1_VAL);
- mpc_cfg_write_4(lcp, RAVEN_PCI_PSOFF1, RAVEN_PCI_PSOFF1_VAL);
- mpc_cfg_write_4(lcp, RAVEN_PCI_PSADD2, RAVEN_PCI_PSADD2_VAL);
- mpc_cfg_write_4(lcp, RAVEN_PCI_PSOFF2, RAVEN_PCI_PSOFF2_VAL);
- mpc_cfg_write_4(lcp, RAVEN_PCI_PSADD3, RAVEN_PCI_PSADD3_VAL);
- mpc_cfg_write_4(lcp, RAVEN_PCI_PSOFF3, RAVEN_PCI_PSOFF3_VAL);
-
- /* set up VME -> PCI local bus */
-
- mpc_cfg_write_4(lcp, 0x100, 0x0);
- mpc_cfg_write_4(lcp, 0x114, 0x0);
- mpc_cfg_write_4(lcp, 0x128, 0x0);
- mpc_cfg_write_4(lcp, 0x13C, 0x0);
-
- mpc_cfg_write_4(lcp, 0xF00, 0x0);
- mpc_cfg_write_4(lcp, 0xF14, 0x0);
- mpc_cfg_write_4(lcp, 0xF28, 0x0);
- mpc_cfg_write_4(lcp, 0xF3C, 0x0);
+#if 0
+ /* set up prep environment */
+ *(unsigned int *)RAVEN_MSADD0 = RAVEN_MSADD0_PREP;
+ *(unsigned int *)RAVEN_MSOFF0 = RAVEN_MSOFF0_PREP;
+ *(unsigned int *)RAVEN_MSADD1 = RAVEN_MSADD1_PREP;
+ *(unsigned int *)RAVEN_MSOFF1 = RAVEN_MSOFF1_PREP;
+ *(unsigned int *)RAVEN_MSADD2 = RAVEN_MSADD2_PREP;
+ *(unsigned int *)RAVEN_MSOFF2 = RAVEN_MSOFF2_PREP;
+ *(unsigned int *)RAVEN_MSADD3 = RAVEN_MSADD3_PREP;
+ *(unsigned int *)RAVEN_MSOFF3 = RAVEN_MSOFF3_PREP;
+
+ /* set up PCI local bus */
+ mpc_cfg_write_4(lcp, RAVEN_PCI_PSADD0, RAVEN_PCI_PSADD0_VAL);
+ mpc_cfg_write_4(lcp, RAVEN_PCI_PSOFF0, RAVEN_PCI_PSOFF0_VAL);
+ mpc_cfg_write_4(lcp, RAVEN_PCI_PSADD1, RAVEN_PCI_PSADD1_VAL);
+ mpc_cfg_write_4(lcp, RAVEN_PCI_PSOFF1, RAVEN_PCI_PSOFF1_VAL);
+ mpc_cfg_write_4(lcp, RAVEN_PCI_PSADD2, RAVEN_PCI_PSADD2_VAL);
+ mpc_cfg_write_4(lcp, RAVEN_PCI_PSOFF2, RAVEN_PCI_PSOFF2_VAL);
+ mpc_cfg_write_4(lcp, RAVEN_PCI_PSADD3, RAVEN_PCI_PSADD3_VAL);
+ mpc_cfg_write_4(lcp, RAVEN_PCI_PSOFF3, RAVEN_PCI_PSOFF3_VAL);
+
+ /* set up VME -> PCI local bus */
+
+ mpc_cfg_write_4(lcp, 0x100, 0x0);
+ mpc_cfg_write_4(lcp, 0x114, 0x0);
+ mpc_cfg_write_4(lcp, 0x128, 0x0);
+ mpc_cfg_write_4(lcp, 0x13C, 0x0);
+
+ mpc_cfg_write_4(lcp, 0xF00, 0x0);
+ mpc_cfg_write_4(lcp, 0xF14, 0x0);
+ mpc_cfg_write_4(lcp, 0xF28, 0x0);
+ mpc_cfg_write_4(lcp, 0xF3C, 0x0);
#endif
- /* enable mem and io mapping, and bus master */
- mpc_cfg_write_2(lcp, RAVEN_PCI_CMD,
- RAVEN_CMD_IOSP|RAVEN_CMD_MEMSP|RAVEN_CMD_MASTR);
+ /* enable mem and io mapping, and bus master */
+ mpc_cfg_write_2(lcp, RAVEN_PCI_CMD,
+ RAVEN_CMD_IOSP|RAVEN_CMD_MEMSP|RAVEN_CMD_MASTR);
- config_found(self, &pba, mpcpcibrprint);
+ config_found(self, &pba, mpcpcibrprint);
}
static int
@@ -250,12 +250,12 @@ mpcpcibrprint(aux, pnp)
void *aux;
const char *pnp;
{
- struct pcibus_attach_args *pba = aux;
+ struct pcibus_attach_args *pba = aux;
- if (pnp)
- printf("%s at %s", pba->pba_busname, pnp);
- printf(" bus %d", pba->pba_bus);
- return (UNCONF);
+ if (pnp)
+ printf("%s at %s", pba->pba_busname, pnp);
+ printf(" bus %d", pba->pba_bus);
+ return (UNCONF);
}
/*
@@ -267,39 +267,41 @@ vm_offset_t
vtophys(p)
void *p;
{
- vm_offset_t pa;
- vm_offset_t va;
-
- va = (vm_offset_t)p;
- if ((vm_offset_t)va < VM_MIN_KERNEL_ADDRESS) {
- pa = va;
- } else {
- pmap_extract(vm_map_pmap(phys_map), va, (paddr_t *)&pa);
- }
- return (pa | ((pci_map_a == 1) ? RAVEN_PCI_CPUMEM : 0 ));
+ vm_offset_t pa;
+ vm_offset_t va;
+
+ va = (vm_offset_t)p;
+ if ((vm_offset_t)va < VM_MIN_KERNEL_ADDRESS) {
+ pa = va;
+ } else {
+ pmap_extract(vm_map_pmap(phys_map), va, (paddr_t *)&pa);
+ }
+ return (pa | ((pci_map_a == 1) ? RAVEN_PCI_CPUMEM : 0 ));
}
#else
vm_offset_t
vtophys(p)
- void *p;
+void *p;
{
- vm_offset_t pa;
- vm_offset_t va;
+ vm_offset_t pa;
+ vm_offset_t va;
extern int segment8_mapped;
extern int segmentC_mapped;
- va = (vm_offset_t)p;
- /* This crap gets maped by bats 1:1 */
- if ((vm_offset_t)va < VM_MIN_KERNEL_ADDRESS) {
- pa = va;
- } else if (segment8_mapped && (va >= 0x80000000 && va < 0x90000000)) {
- pa = va;
+ va = (vm_offset_t)p;
+ /* This crap gets maped by bats 1:1 */
+ if (segment8_mapped && (va >= 0x80000000 && va < 0x90000000)) {
+ pa = va;
} else if (segmentC_mapped && (va >= 0xC0000000 && va < 0xD0000000)) {
- pa = va;
+ pa = va;
+ } else if (va >= 0xF0000000) {
+ pa = va;
+ } else if ((vm_offset_t)va < VM_MIN_KERNEL_ADDRESS) {
+ pa = va;
} else if (pmap_extract(pmap_kernel(), va, &pa))
- return pa;
- return va;
+ return pa;
+ return va;
}
#endif
@@ -315,8 +317,8 @@ mpc_ether_hw_addr(p, ethaddr)
struct ppc_pci_chipset *p;
u_int8_t *ethaddr;
{
- printf("mpc_ether_hw_addr not supported\n");
- return (0);
+ printf("mpc_ether_hw_addr not supported\n");
+ return (0);
}
int
@@ -324,7 +326,7 @@ mpc_bus_maxdevs(cpv, busno)
void *cpv;
int busno;
{
- return (32);
+ return (32);
}
#define BUS_SHIFT 16
@@ -336,7 +338,7 @@ mpc_make_tag(cpv, bus, dev, fnc)
void *cpv;
int bus, dev, fnc;
{
- return (bus << BUS_SHIFT) | (dev << DEVICE_SHIFT) | (fnc << FNC_SHIFT);
+ return (bus << BUS_SHIFT) | (dev << DEVICE_SHIFT) | (fnc << FNC_SHIFT);
}
void
@@ -345,12 +347,12 @@ void *cpv;
pcitag_t tag;
int *busp, *devp, *fncp;
{
- if (busp != NULL)
- *busp = (tag >> BUS_SHIFT) & 0xff;
- if (devp != NULL)
- *devp = (tag >> DEVICE_SHIFT) & 0x1f;
- if (fncp != NULL)
- *fncp = (tag >> FNC_SHIFT) & 0x7;
+ if (busp != NULL)
+ *busp = (tag >> BUS_SHIFT) & 0xff;
+ if (devp != NULL)
+ *devp = (tag >> DEVICE_SHIFT) & 0x1f;
+ if (fncp != NULL)
+ *fncp = (tag >> FNC_SHIFT) & 0x7;
}
static u_int32_t
@@ -359,48 +361,48 @@ void *cpv;
pcitag_t tag;
int offset;
{
- struct pcibr_config *cp = cpv;
- unsigned int bus, dev, fcn;
- u_int32_t reg;
- /*
- static int spin = 0;
- while (spin > 85);
- spin++;
- */
-
- mpc_decompose_tag(cpv, tag, &bus, &dev, &fcn);
-
- if (cp->config_type & 1) {
- /* Config Mechanism #2 */
- if (bus == 0) {
- if (dev < 11) {
- return 0xffffffff;
- }
- /*
- * Need to do config type 0 operation
- * 1 << (11?+dev) | fcn << 8 | reg
- * 11? is because pci spec states
- * that 11-15 is reserved.
- */
- reg = 1 << (dev) | fcn << 8 | offset;
-
- } else {
- if (dev > 15) {
- return 0xffffffff;
- }
- /*
- * config type 1
- */
- reg = tag | offset | 1;
-
- }
- } else {
- /* config mechanism #2, type 0
- /* standard cf8/cfc config */
- reg = 0x80000000 | tag | offset;
-
- }
- return reg;
+ struct pcibr_config *cp = cpv;
+ unsigned int bus, dev, fcn;
+ u_int32_t reg;
+ /*
+ static int spin = 0;
+ while (spin > 85);
+ spin++;
+ */
+
+ mpc_decompose_tag(cpv, tag, &bus, &dev, &fcn);
+
+ if (cp->config_type & 1) {
+ /* Config Mechanism #2 */
+ if (bus == 0) {
+ if (dev < 11) {
+ return 0xffffffff;
+ }
+ /*
+ * Need to do config type 0 operation
+ * 1 << (11?+dev) | fcn << 8 | reg
+ * 11? is because pci spec states
+ * that 11-15 is reserved.
+ */
+ reg = 1 << (dev) | fcn << 8 | offset;
+
+ } else {
+ if (dev > 15) {
+ return 0xffffffff;
+ }
+ /*
+ * config type 1
+ */
+ reg = tag | offset | 1;
+
+ }
+ } else {
+ /* config mechanism #2, type 0
+ /* standard cf8/cfc config */
+ reg = 0x80000000 | tag | offset;
+
+ }
+ return reg;
}
/*#define DEBUG_CONFIG */
@@ -410,51 +412,51 @@ void *cpv;
pcitag_t tag;
int offset;
{
- struct pcibr_config *cp = cpv;
-
- pcireg_t data;
- u_int32_t reg;
- int device;
- int s;
- int handle;
- int daddr = 0;
-
- if (offset & 3 || offset < 0 || offset >= 0x100) {
- printf ("pci_conf_read: bad reg %x\n", offset);
- return (~0);
- }
-
- reg = mpc_gen_config_reg(cpv, tag, offset);
- /* if invalid tag, return -1 */
- if (reg == 0xffffffff) {
- return 0xffffffff;
- }
-
- if ((cp->config_type & 2) && (offset & 0x04)) {
- daddr += 4;
- }
-
- s = splhigh();
-
- bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, reg);
- bus_space_read_4(cp->lc_iot, cp->ioh_cf8, 0); /* XXX */
- data = bus_space_read_4(cp->lc_iot, cp->ioh_cfc, daddr);
- bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, 0); /* disable */
- bus_space_read_4(cp->lc_iot, cp->ioh_cf8, 0); /* XXX */
-
- splx(s);
+ struct pcibr_config *cp = cpv;
+
+ pcireg_t data;
+ u_int32_t reg;
+ int device;
+ int s;
+ int handle;
+ int daddr = 0;
+
+ if (offset & 3 || offset < 0 || offset >= 0x100) {
+ printf ("pci_conf_read: bad reg %x\n", offset);
+ return (~0);
+ }
+
+ reg = mpc_gen_config_reg(cpv, tag, offset);
+ /* if invalid tag, return -1 */
+ if (reg == 0xffffffff) {
+ return 0xffffffff;
+ }
+
+ if ((cp->config_type & 2) && (offset & 0x04)) {
+ daddr += 4;
+ }
+
+ s = splhigh();
+
+ bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, reg);
+ bus_space_read_4(cp->lc_iot, cp->ioh_cf8, 0); /* XXX */
+ data = bus_space_read_4(cp->lc_iot, cp->ioh_cfc, daddr);
+ bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, 0); /* disable */
+ bus_space_read_4(cp->lc_iot, cp->ioh_cf8, 0); /* XXX */
+
+ splx(s);
#ifdef DEBUG_CONFIG
- if (!((offset == 0) && (data == 0xffffffff))) {
- unsigned int bus, dev, fcn;
- mpc_decompose_tag(cpv, tag, &bus, &dev, &fcn);
- printf("mpc_conf_read bus %x dev %x fcn %x offset %x", bus, dev, fcn,
- offset);
- printf(" daddr %x reg %x",daddr, reg);
- printf(" data %x\n", data);
- }
+ if (!((offset == 0) && (data == 0xffffffff))) {
+ unsigned int bus, dev, fcn;
+ mpc_decompose_tag(cpv, tag, &bus, &dev, &fcn);
+ printf("mpc_conf_read bus %x dev %x fcn %x offset %x", bus, dev, fcn,
+ offset);
+ printf(" daddr %x reg %x",daddr, reg);
+ printf(" data %x\n", data);
+ }
#endif
- return (data);
+ return (data);
}
void
@@ -464,41 +466,41 @@ pcitag_t tag;
int offset;
pcireg_t data;
{
- struct pcibr_config *cp = cpv;
- u_int32_t reg;
- int s;
- int handle;
- int daddr = 0;
-
- reg = mpc_gen_config_reg(cpv, tag, offset);
-
- /* if invalid tag, return ??? */
- if (reg == 0xffffffff) {
- return;
- }
- if ((cp->config_type & 2) && (offset & 0x04)) {
- daddr += 4;
- }
+ struct pcibr_config *cp = cpv;
+ u_int32_t reg;
+ int s;
+ int handle;
+ int daddr = 0;
+
+ reg = mpc_gen_config_reg(cpv, tag, offset);
+
+ /* if invalid tag, return ??? */
+ if (reg == 0xffffffff) {
+ return;
+ }
+ if ((cp->config_type & 2) && (offset & 0x04)) {
+ daddr += 4;
+ }
#ifdef DEBUG_CONFIG
- {
- unsigned int bus, dev, fcn;
- mpc_decompose_tag(cpv, tag, &bus, &dev, &fcn);
- printf("mpc_conf_write bus %x dev %x fcn %x offset %x", bus,
- dev, fcn, offset);
- printf(" daddr %x reg %x",daddr, reg);
- printf(" data %x\n", data);
- }
+ {
+ unsigned int bus, dev, fcn;
+ mpc_decompose_tag(cpv, tag, &bus, &dev, &fcn);
+ printf("mpc_conf_write bus %x dev %x fcn %x offset %x", bus,
+ dev, fcn, offset);
+ printf(" daddr %x reg %x",daddr, reg);
+ printf(" data %x\n", data);
+ }
#endif
- s = splhigh();
+ s = splhigh();
- bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, reg);
- bus_space_read_4(cp->lc_iot, cp->ioh_cf8, 0); /* XXX */
- bus_space_write_4(cp->lc_iot, cp->ioh_cfc, daddr, data);
- bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, 0); /* disable */
- bus_space_read_4(cp->lc_iot, cp->ioh_cf8, 0); /* XXX */
+ bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, reg);
+ bus_space_read_4(cp->lc_iot, cp->ioh_cf8, 0); /* XXX */
+ bus_space_write_4(cp->lc_iot, cp->ioh_cfc, daddr, data);
+ bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, 0); /* disable */
+ bus_space_read_4(cp->lc_iot, cp->ioh_cf8, 0); /* XXX */
- splx(s);
+ splx(s);
}
@@ -509,25 +511,25 @@ pcitag_t bustag;
int buspin, line;
pci_intr_handle_t *ihp;
{
- struct pcibr_config *lcp = lcv;
- pci_chipset_tag_t pc = &lcp->lc_pc;
- int error = 0;
- int route;
- int lvl;
- int device;
-
- *ihp = -1;
- if (buspin == 0) {
- /* No IRQ used. */
- error = 1;
- } else if (buspin > 4) {
- printf("mpc_intr_map: bad interrupt pin %d\n", buspin);
- error = 1;
- }
-
- if (!error)
- *ihp = line;
- return error;
+ struct pcibr_config *lcp = lcv;
+ pci_chipset_tag_t pc = &lcp->lc_pc;
+ int error = 0;
+ int route;
+ int lvl;
+ int device;
+
+ *ihp = -1;
+ if (buspin == 0) {
+ /* No IRQ used. */
+ error = 1;
+ } else if (buspin > 4) {
+ printf("mpc_intr_map: bad interrupt pin %d\n", buspin);
+ error = 1;
+ }
+
+ if (!error)
+ *ihp = line;
+ return error;
}
const char *
@@ -535,14 +537,14 @@ mpc_intr_string(lcv, ih)
void *lcv;
pci_intr_handle_t ih;
{
- static char str[16];
+ static char str[16];
- sprintf(str, "irq %d", ih);
- return (str);
+ sprintf(str, "irq %d", ih);
+ return (str);
}
typedef void *(intr_establish_t) __P((void *, pci_intr_handle_t,
- int, int, int (*func)(void *), void *, char *));
+ int, int, int (*func)(void *), void *, char *));
typedef void (intr_disestablish_t) __P((void *, void *));
extern intr_establish_t *intr_establish_func;
extern intr_disestablish_t *intr_disestablish_func;
@@ -556,27 +558,27 @@ int (*func) __P((void *));
void *arg;
char *name;
{
- return (*intr_establish_func)(lcv, ih, IST_LEVEL, level, func, arg,
- name);
+ return (*intr_establish_func)(lcv, ih, IST_LEVEL, level, func, arg,
+ name);
}
void
mpc_intr_disestablish(lcv, cookie)
void *lcv, *cookie;
{
- /* XXX We should probably do something clever here.... later */
+ /* XXX We should probably do something clever here.... later */
}
u_int32_t
pci_iack()
{
- /* do pci IACK cycle */
- /* this should be bus allocated. */
- volatile u_int8_t *iack = (u_int8_t *)RAVEN_PIACK;
- u_int8_t val;
+ /* do pci IACK cycle */
+ /* this should be bus allocated. */
+ volatile u_int8_t *iack = (u_int8_t *)RAVEN_PIACK;
+ u_int8_t val;
- val = *iack;
- return val;
+ val = *iack;
+ return val;
}
void
@@ -585,12 +587,12 @@ struct pcibr_config *cp;
u_int32_t reg;
u_int8_t val;
{
- int s;
- s = splhigh();
- bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0,
- RAVEN_REGOFFS(reg));
- bus_space_write_1(cp->lc_iot, cp->ioh_cfc, 0, val);
- splx(s);
+ int s;
+ s = splhigh();
+ bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0,
+ RAVEN_REGOFFS(reg));
+ bus_space_write_1(cp->lc_iot, cp->ioh_cfc, 0, val);
+ splx(s);
}
void
@@ -599,11 +601,11 @@ struct pcibr_config *cp;
u_int32_t reg;
u_int16_t val;
{
- int s;
- s = splhigh();
- bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
- bus_space_write_2(cp->lc_iot, cp->ioh_cfc, 0, val);
- splx(s);
+ int s;
+ s = splhigh();
+ bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
+ bus_space_write_2(cp->lc_iot, cp->ioh_cfc, 0, val);
+ splx(s);
}
void
@@ -613,11 +615,11 @@ u_int32_t reg;
u_int32_t val;
{
- int s;
- s = splhigh();
- bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
- bus_space_write_4(cp->lc_iot, cp->ioh_cfc, 0, val);
- splx(s);
+ int s;
+ s = splhigh();
+ bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
+ bus_space_write_4(cp->lc_iot, cp->ioh_cfc, 0, val);
+ splx(s);
}
u_int8_t
@@ -625,14 +627,14 @@ mpc_cfg_read_1(cp, reg)
struct pcibr_config *cp;
u_int32_t reg;
{
- u_int8_t _v_;
-
- int s;
- s = splhigh();
- bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
- _v_ = bus_space_read_1(cp->lc_iot, cp->ioh_cfc, 0);
- splx(s);
- return (_v_);
+ u_int8_t _v_;
+
+ int s;
+ s = splhigh();
+ bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
+ _v_ = bus_space_read_1(cp->lc_iot, cp->ioh_cfc, 0);
+ splx(s);
+ return (_v_);
}
u_int16_t
@@ -640,14 +642,14 @@ mpc_cfg_read_2(cp, reg)
struct pcibr_config *cp;
u_int32_t reg;
{
- u_int16_t _v_;
-
- int s;
- s = splhigh();
- bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
- _v_ = bus_space_read_2(cp->lc_iot, cp->ioh_cfc, 0);
- splx(s);
- return (_v_);
+ u_int16_t _v_;
+
+ int s;
+ s = splhigh();
+ bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
+ _v_ = bus_space_read_2(cp->lc_iot, cp->ioh_cfc, 0);
+ splx(s);
+ return (_v_);
}
u_int32_t
@@ -655,12 +657,12 @@ mpc_cfg_read_4(cp, reg)
struct pcibr_config *cp;
u_int32_t reg;
{
- u_int32_t _v_;
-
- int s;
- s = splhigh();
- bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
- _v_ = bus_space_read_4(cp->lc_iot, cp->ioh_cfc, 0);
- splx(s);
- return (_v_);
+ u_int32_t _v_;
+
+ int s;
+ s = splhigh();
+ bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
+ _v_ = bus_space_read_4(cp->lc_iot, cp->ioh_cfc, 0);
+ splx(s);
+ return (_v_);
}