reload the itmr as soon as we get the intr to avoid lagging on slower machines

4 files changed, 31 insertions, 17 deletions

diff --git a/sys/arch/hppa/dev/clock.c b/sys/arch/hppa/dev/clock.c
index e9b6ec902ec..e11c945c1b1 100644
--- a/sys/arch/hppa/dev/clock.c
+++ b/sys/arch/hppa/dev/clock.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: clock.c,v 1.17 2002/11/27 21:47:14 mickey Exp $	*/
+/*	$OpenBSD: clock.c,v 1.18 2003/10/05 14:13:28 mickey Exp $	*/
 
 /*
  * Copyright (c) 1998,1999 Michael Shalayeff
@@ -55,7 +55,11 @@
 void
 cpu_initclocks()
 {
-	CPU_CLOCKUPDATE();
+	register_t __itmr;
+	__asm __volatile("mfctl %%cr16, %0" : "=r" (__itmr));
+	cpu_itmr = __itmr;
+	__itmr += cpu_hzticks;
+	__asm __volatile("mtctl %0, %%cr16" :: "r" (__itmr));
 }
 
 /*
diff --git a/sys/arch/hppa/hppa/locore.S b/sys/arch/hppa/hppa/locore.S
index b8c309019a9..62c03b75f64 100644
--- a/sys/arch/hppa/hppa/locore.S
+++ b/sys/arch/hppa/hppa/locore.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: locore.S,v 1.114 2003/09/29 19:23:02 mickey Exp $	*/
+/*	$OpenBSD: locore.S,v 1.115 2003/10/05 14:13:28 mickey Exp $	*/
 
 /*
  * Copyright (c) 1998-2003 Michael Shalayeff
@@ -144,6 +144,9 @@ netisr
 	.word	0
 	.align	16
 
+	BSS(cpu_hzticks, 4)	/* itmr ticks in one hz */
+	BSS(cpu_itmr, 4)	/* itmr value at the most recent clk int */
+
 	BSS(pdc_stack, 4)	/* temp stack for PDC call */
 	BSS(emrg_stack, 4)	/* stack for HPMC/TOC/PWRF */
 	BSS(fpemu_stack, 4)	/* stack for FPU emulation */
@@ -958,6 +961,9 @@ LDILDO(tlbd_l)
 	depi	0,31,PGSHIFT,r9	/* align offset to page */
 	/* CR28XXX according to a popular belief cr28 should be read here */
 #define	HPMCPRE	nop
+#define	INTRPRE	\
+	mfctl	eirr, r8 ! \
+	mtctl	r8, eirr
 
 	.align NBPG
 	.export $ivaaddr, entry
@@ -968,7 +974,7 @@ hpmc_v
 	CTRAP(hpmc,T_HPMC,HPMCPRE)	/*  1. high priority machine check */
 	ATRAP(power,T_POWERFAIL)	/*  2. power failure */
 	ATRAP(recnt,T_RECOVERY)		/*  3. recovery counter trap */
-	CTRAP(intr,T_INTERRUPT,)	/*  4. external interrupt */
+	CTRAP(intr,T_INTERRUPT,INTRPRE)	/*  4. external interrupt */
 	ATRAP(lpmc,T_LPMC)		/*  5. low-priority machine check */
 	STRAP(itlb,T_ITLBMISS,ITLBPRE)	/*  6. instruction TLB miss fault */
 	ATRAP(iprot,T_IPROT)		/*  7. instruction protection trap */
@@ -1906,10 +1912,21 @@ EXIT(hppa_pfr)
 	.import	imask, data
 	.import	intr_table, data
 ENTRY(TLABEL(intr),0)
+	/* r8 set to eirr in the INTRPRE */
+
+	bb,>=,n	r8, 0, $intr_noclock
+	nop
 
-	mfctl	eirr, r8
-	mtctl	r8, eirr	/* ack now */
+	/* reload the itmr */
+	ldil	L%cpu_hzticks, r25	/* those both are aligned properly */
+	ldw	R%cpu_hzticks(r25), r16
+	ldw	R%cpu_itmr(r25), r9
+	sh1add	r16, r9, r17
+	add	r16, r9, r16
+	mtctl	r17, cr16
+	stw	r16, R%cpu_itmr(r25)
 
+$intr_noclock
 	ldil	L%ipending, r17
 	ldw	R%ipending(r17), r24
 	ldil	L%intr_table, r1
diff --git a/sys/arch/hppa/hppa/machdep.c b/sys/arch/hppa/hppa/machdep.c
index 2f62215ba8b..7d8b5d331ca 100644
--- a/sys/arch/hppa/hppa/machdep.c
+++ b/sys/arch/hppa/hppa/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.114 2003/09/25 22:20:44 mickey Exp $	*/
+/*	$OpenBSD: machdep.c,v 1.115 2003/10/05 14:13:28 mickey Exp $	*/
 
 /*
  * Copyright (c) 1999-2002 Michael Shalayeff
@@ -134,7 +134,7 @@ struct pdc_btlb pdc_btlb PDC_ALIGNMENT;
 struct pdc_model pdc_model PDC_ALIGNMENT;
 
 	/* w/ a little deviation should be the same for all installed cpus */
-u_int	cpu_itmr, cpu_ticksnum, cpu_ticksdenom, cpu_hzticks;
+u_int	cpu_ticksnum, cpu_ticksdenom;
 
 	/* exported info */
 char	machine[] = MACHINE_ARCH;
@@ -279,6 +279,7 @@ void
 hppa_init(start)
 	paddr_t start;
 {
+	extern u_int cpu_hzticks;
 	extern int kernel_text;
 	vaddr_t v, v1;
 	int error;
diff --git a/sys/arch/hppa/include/cpu.h b/sys/arch/hppa/include/cpu.h
index 02727c8315c..94c75959e34 100644
--- a/sys/arch/hppa/include/cpu.h
+++ b/sys/arch/hppa/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.37 2003/07/30 21:24:19 mickey Exp $	*/
+/*	$OpenBSD: cpu.h,v 1.38 2003/10/05 14:13:28 mickey Exp $	*/
 
 /*
  * Copyright (c) 2000-2002 Michael Shalayeff
@@ -121,14 +121,6 @@ extern int cpu_hvers;
 #define	HPPA_SPA_ENABLE	0x00000020
 #define	HPPA_NMODSPBUS	64
 
-#define	CPU_CLOCKUPDATE() do {					\
-	register_t __itmr;					\
-	__asm __volatile("mfctl	%%cr16, %0" : "=r" (__itmr));	\
-	cpu_itmr = __itmr;					\
-	__itmr += cpu_hzticks;					\
-	__asm __volatile("mtctl	%0, %%cr16" :: "r" (__itmr));	\
-} while (0)
-
 #define	clockframe		trapframe
 #define	CLKF_PC(framep)		((framep)->tf_iioq_head)
 #define	CLKF_INTR(framep)	((framep)->tf_flags & TFF_INTR)