remove:

-entry for ix nic in files.isa, not even in tree
-ep nic driver, replaced by ne ages ago
-hp nic driver, broken for ages
from brad, ok matthieu krw theo miod

4 files changed, 1 insertions, 4402 deletions

diff --git a/sys/dev/isa/files.isa b/sys/dev/isa/files.isa
index 2e874f2b60f..9227e31e24a 100644
--- a/sys/dev/isa/files.isa
+++ b/sys/dev/isa/files.isa
@@ -1,4 +1,4 @@
-#	$OpenBSD: files.isa,v 1.97 2007/05/29 18:25:13 krw Exp $
+#	$OpenBSD: files.isa,v 1.98 2007/06/08 17:48:04 henning Exp $
 #	$NetBSD: files.isa,v 1.21 1996/05/16 03:45:55 mycroft Exp $
 #
 # Config file and device description for machine-independent ISA code.
@@ -165,14 +165,6 @@ device	ec: ether, ifnet, dp8390nic, ifmedia
 attach	ec at isa
 file	dev/isa/if_ec.c			ec
 
-# National Semiconductor DS8390/WD83C690-based boards
-# (WD/SMC 80x3 family, SMC Ultra [8216], 3Com 3C503, NE[12]000, and clones)
-# XXX conflicts with amiga if_ed.c
-#device	ed: ether, ifnet
-#attach	ed at isa with ed_isa
-#attach	ed at pcmcia with ed_pcmcia
-#file	dev/isa/if_ed.c			ed & (ed_isa | ed_pcmcia) needs-flag
-
 # 3Com 3C505
 device	eg: ether, ifnet
 attach	eg at isa
@@ -193,12 +185,6 @@ device	fe: ether, ifnet
 attach	fe at isa
 file	dev/isa/if_fe.c			fe
 
-# HP Lan Ethernet controllers
-# XXX currently broken
-#device hp: ether, ifnet
-#attach	hp at isa
-#file	dev/isa/if_hp.c			hp
-
 # Intel i82586-based boards
 # (AT&T StarLAN 10, AT&T EN100, AT&T StarLAN Fiber, 3Com 3C507)
 attach	ie at isa with ie_isa: elink
@@ -215,12 +201,6 @@ device	ex: ether, ifnet
 attach	ex at isa
 file	dev/isa/if_ex.c			ex needs-flag
 
-# XXX ???
-# XXX NOT IN TREE?
-#device	ix: ether, ifnet
-#attach	ix at isa
-#file	dev/isa/if_ix.c			ix
-
 # AMD am7990 (Lance) -based boards
 # (BICC Isolan, NE2100, DEPCA)
 # device declaration in sys/conf/files
diff --git a/sys/dev/isa/if_ed.c b/sys/dev/isa/if_ed.c
deleted file mode 100644
index 420be6706d6..00000000000
--- a/sys/dev/isa/if_ed.c
+++ /dev/null
@@ -1,2989 +0,0 @@
-/*	$OpenBSD: if_ed.c,v 1.58 2007/04/10 17:47:55 miod Exp $	*/
-/*	$NetBSD: if_ed.c,v 1.105 1996/10/21 22:40:45 thorpej Exp $	*/
-
-/*
- * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
- * adapters.
- *
- * Copyright (c) 1994, 1995 Charles M. Hannum.  All rights reserved.
- *
- * Copyright (C) 1993, David Greenman.  This software may be used, modified,
- * copied, distributed, and sold, in both source and binary form provided that
- * the above copyright and these terms are retained.  Under no circumstances is
- * the author responsible for the proper functioning of this software, nor does
- * the author assume any responsibility for damages incurred with its use.
- *
- * Currently supports the Western Digital/SMC 8003 and 8013 series, the SMC
- * Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000, and a variety of
- * similar clones.
- */
-
-#include "bpfilter.h"
-#include "ed.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/errno.h>
-#include <sys/ioctl.h>
-#include <sys/mbuf.h>
-#include <sys/socket.h>
-#include <sys/syslog.h>
-#include <sys/device.h>
-
-#include <net/if.h>
-#include <net/if_dl.h>
-#include <net/if_types.h>
-#include <net/netisr.h>
-
-#ifdef INET
-#include <netinet/in.h>
-#include <netinet/in_systm.h>
-#include <netinet/in_var.h>
-#include <netinet/ip.h>
-#include <netinet/if_ether.h>
-#endif
-
-#if NBPFILTER > 0
-#include <net/bpf.h>
-#endif
-
-#include <machine/cpu.h>
-#include <machine/bus.h>
-#include <machine/intr.h>
-
-#include <dev/isa/isareg.h>
-#include <dev/isa/isavar.h>
-#include <dev/ic/dp8390reg.h>
-#include <dev/isa/if_edreg.h>
-
-/*
- * ed_softc: per line info and status
- */
-struct ed_softc {
-	struct	device sc_dev;
-	void	*sc_ih;
-
-	struct	arpcom sc_arpcom;	/* ethernet common */
-	void	*sc_sh;			/* shutdown hook */
-
-	char	*type_str;	/* pointer to type string */
-	u_char	vendor;		/* interface vendor */
-	u_char	type;		/* interface type code */
-	u_int16_t	spec_flags;
-#define ED_REATTACH	0x0001	/* Reattach */
-#define ED_NOTPRESENT 	0x0002	/* card not present; do not allow
-				   reconfiguration */
-
-	bus_space_tag_t sc_iot; /* bus identifier */
-	bus_space_tag_t sc_memt;
-	bus_space_handle_t sc_ioh;   /* io handle */
-	bus_space_handle_t sc_delaybah; /* io handle for `delay port' */
-	bus_space_handle_t sc_memh; /* bus memory handle */
-	isa_chipset_tag_t sc_ic;
-
-	bus_size_t	asic_base;	/* offset of ASIC I/O port */
-	bus_size_t	nic_base;	/* offset of NIC (DS8390) I/O port */
-
-/*
- * The following 'proto' variable is part of a work-around for 8013EBT asics
- * being write-only.  It's sort of a prototype/shadow of the real thing.
- */
-	u_char	wd_laar_proto;
-/*
- * This `proto' variable is so we can turn MENB on and off without reading
- * the value back from the card all the time.
- */
-	u_char	wd_msr_proto;
-	u_char	cr_proto;	/* values always set in CR */
-	u_char	isa16bit;	/* width of access to card 0=8 or 1=16 */
-	u_char	is790;		/* set by probe if NIC is a 790 */
-
-	int	mem_start;	/* offset of NIC memory */
-	int	mem_end;	/* offset of NIC memory end */
-	int	mem_size;	/* total NIC memory size */
-	int	mem_ring;	/* offset of RX ring-buffer (in NIC mem) */
-
-	u_char	mem_shared;	/* NIC memory is shared with host */
-	u_char	txb_cnt;	/* number of transmit buffers */
-	u_char	txb_inuse;	/* number of transmit buffers active */
-
-	u_char 	txb_new;	/* pointer to where new buffer will be added */
-	u_char	txb_next_tx;	/* pointer to next buffer ready to xmit */
-	u_int16_t	txb_len[8];	/* buffered xmit buffer lengths */
-	u_char	tx_page_start;	/* first page of TX buffer area */
-	u_char	rec_page_start;	/* first page of RX ring-buffer */
-	u_char	rec_page_stop;	/* last page of RX ring-buffer */
-	u_char	next_packet;	/* pointer to next unread RX packet */
-};
-
-int edprobe(struct device *, void *, void *);
-void edattach(struct device *, struct device *, void *);
-int ed_find(struct ed_softc *, struct cfdata *,
-    struct isa_attach_args *ia);
-int ed_probe_generic8390(bus_space_tag_t, bus_space_handle_t, int);
-int ed_find_WD80x3(struct ed_softc *, struct cfdata *,
-    struct isa_attach_args *ia);
-int ed_find_3Com(struct ed_softc *, struct cfdata *,
-    struct isa_attach_args *ia);
-int ed_find_Novell(struct ed_softc *, struct cfdata *,
-    struct isa_attach_args *ia);
-int edintr(void *);
-int edioctl(struct ifnet *, u_long, caddr_t);
-void edstart(struct ifnet *);
-void edwatchdog(struct ifnet *);
-void edreset(struct ed_softc *);
-void edinit(struct ed_softc *);
-void edstop(struct ed_softc *);
-
-void ed_shared_writemem(struct ed_softc *, caddr_t, int, int);
-void ed_shared_readmem(struct ed_softc *, int, caddr_t, int);
-
-#define inline	/* XXX for debugging porpoises */
-
-void ed_getmcaf(struct arpcom *, u_int32_t *);
-void edread(struct ed_softc *, int, int);
-struct mbuf *edget(struct ed_softc *, int, int);
-static __inline void ed_rint(struct ed_softc *);
-static __inline void ed_xmit(struct ed_softc *);
-static __inline int ed_ring_copy(struct ed_softc *, int, caddr_t,
-					u_int16_t);
-
-void ed_pio_readmem(struct ed_softc *, u_int16_t, caddr_t, u_int16_t);
-void ed_pio_writemem(struct ed_softc *, caddr_t, u_int16_t, u_int16_t);
-u_int16_t ed_pio_write_mbufs(struct ed_softc *, struct mbuf *, u_int16_t);
-
-#if NED_ISA > 0
-struct cfattach ed_isa_ca = {
-	sizeof(struct ed_softc), edprobe, edattach
-};
-#endif
-
-struct cfdriver ed_cd = {
-	NULL, "ed", DV_IFNET
-};
-
-#define	NIC_PUT(t, bah, nic, reg, val)	\
-	bus_space_write_1((t), (bah), ((nic) + (reg)), (val))
-#define	NIC_GET(t, bah, nic, reg)	\
-	bus_space_read_1((t), (bah), ((nic) + (reg)))
-
-#if NED_PCMCIA > 0 
-#include <dev/pcmcia/pcmciavar.h>
-
-int ed_pcmcia_match(struct device *, void *, void *);
-void ed_pcmcia_attach(struct device *, struct device *, void *);
-int ed_pcmcia_detach(struct device *);
-
-struct cfattach ed_pcmcia_ca = {
-	sizeof(struct ed_softc), ed_pcmcia_match, edattach, ed_pcmcia_detach
-};
-
-int ed_pcmcia_isa_attach(struct device *, void *, void *,
-    struct pcmcia_link *);
-int edmod(struct pcmcia_link *, struct device *, struct pcmcia_conf *,
-    struct cfdata *cf);
-int ed_remove(struct pcmcia_link *, struct device *);
-
-/* additional setup needed for pcmcia devices */
-int
-ed_pcmcia_isa_attach(parent, match, aux, pc_link)
-	struct device *parent;
-	void *match;
-	void *aux;
-	struct pcmcia_link *pc_link;
-{
-	struct ed_softc *sc = match;
-	struct cfdata *cf = sc->sc_dev.dv_cfdata;
-	struct isa_attach_args *ia = aux;
-	struct pcmciadevs *dev=pc_link->device;
-	int err;
-	u_char enaddr[ETHER_ADDR_LEN];
-
-	if ((int)dev->param != -1)
-		err = pcmcia_read_cis(pc_link, enaddr, 
-				      (int) dev->param, ETHER_ADDR_LEN);
-	else
-		err = 0;
-	if (err)
-		printf("%s: attaching ed: cannot read cis info %d\n",
-		       parent->dv_xname, err);
-
-	if (ed_find_Novell(sc, cf, ia)) {
-		delay(100);
-		if ((int)dev->param != -1) {
-		    err = pcmcia_read_cis(pc_link, sc->sc_arpcom.ac_enaddr,
-				      (int) dev->param, ETHER_ADDR_LEN);
-		    if (err) {
-			    printf("Cannot read cis info %d\n", err);
-			    return 0;
-		    }
-		    if (bcmp(enaddr, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN)) {
-			    printf("ENADDR MISMATCH %s ",
-				   ether_sprintf(sc->sc_arpcom.ac_enaddr));
-			    printf("- %s\n", ether_sprintf(enaddr));
-			    bcopy(enaddr,sc->sc_arpcom.ac_enaddr,
-					    ETHER_ADDR_LEN);
-		    }
-		}
-		/* clear ED_NOTPRESENT, set ED_REATTACH if needed */
-		sc->spec_flags=pc_link->flags&PCMCIA_REATTACH?ED_REATTACH:0;
-		sc->type_str = dev->model;
-		sc->sc_ic = ia->ia_ic;
-		return 1;
-	} else
-	    return 0;
-}
-
-/* modify config entry */
-int
-edmod(pc_link, self, pc_cf, cf) 
-	struct pcmcia_link *pc_link;
-	struct device *self;
-	struct pcmcia_conf *pc_cf;
-	struct cfdata *cf;
-{
-	int err;
-/*	struct pcmciadevs *dev=pc_link->device;*/
-/*	struct ed_softc *sc = (void *)self;*/
-	int svec_card =  pc_cf->memwin  == 5;
-	int de650_0 = (pc_cf->memwin != 0) && !svec_card;
-	err = PCMCIA_BUS_CONFIG(pc_link->adapter, pc_link, self, pc_cf, cf);
-	if (err)
-		return err;
-
-	if (svec_card) {
-		pc_cf->memwin = 0;
-#if 0
-		pc_cf->cfgid = 32;  /* Try this if it still doesn't work */
-		pc_cf->cfgid |= 32;  /* or Try this if it still doesn't work */
-#endif
-	}
-	if (de650_0) {
-		pc_cf->io[0].flags =
-		    (pc_cf->io[0].flags&~PCMCIA_MAP_16)|PCMCIA_MAP_8;
-		pc_cf->memwin = 0;
-		pc_cf->cfgtype = DOSRESET|1;
-	}
-	else {
-		/* still wrong in CIS; fix it here */
-		pc_cf->io[0].flags = PCMCIA_MAP_8|PCMCIA_MAP_16;
-		pc_cf->cfgtype = 1;
-	}
-
-	return err;
-}
-
-int
-ed_remove(pc_link,self) 
-	struct pcmcia_link *pc_link;
-	struct device *self;
-{
-	struct ed_softc *sc = (void *)self;
-	struct ifnet *ifp = &sc->sc_arpcom.ac_if;
-	if_down(ifp);
-	edstop(sc);
-	if (sc->sc_sh != NULL)
-		shutdownhook_disestablish(sc->sc_sh);
-	ifp->if_flags &= ~(IFF_RUNNING|IFF_UP);
-	sc->spec_flags |= ED_NOTPRESENT;
-	isa_intr_disestablish(sc->sc_ic, sc->sc_ih);
-	return PCMCIA_BUS_UNCONFIG(pc_link->adapter, pc_link);
-}
-
-static struct pcmcia_dlink {
-	struct pcmcia_device pcd;
-} pcmcia_dlink = {
-	{"PCMCIA Novell compatible", edmod, ed_pcmcia_isa_attach,
-	 NULL, ed_remove}
-};
-
-struct pcmciadevs pcmcia_ed_devs[]={
-      { "ed", 0, "D-Link", "DE-650", "Ver 01.00", NULL, (void *) -1,
-	(void *)&pcmcia_dlink },
-      { "ed", 0, "D-Link", "DE-650", "", NULL, (void *) 0x40,
-	(void *)&pcmcia_dlink },
-      { "ed", 0, "LINKSYS", "E-CARD", "Ver 01.00", NULL, (void *)-1,
-        (void *)&pcmcia_dlink },
-      { "ed", 0, "IBM Corp.", "Ethernet", "0933495", NULL, (void *) 0xff0,
-	(void *)&pcmcia_dlink },
-      { "ed", 0, "Socket Communications Inc",
-	"Socket EA PCMCIA LAN Adapter Revision D", "Ethernet ID 000000000000",
-	NULL, (void *) -1,
-	(void *)&pcmcia_dlink },
-      /* something screwed up in ports requested */
-      { "ed", 0, "SVEC", "FD605 PCMCIA EtherNet Card", "V1-1", NULL,
-	(void *)-1, (void *)&pcmcia_dlink },
-      { "ed", 0, "Ethernet", "Adapter", "2.0", NULL, (void *) -1,
-	(void *)&pcmcia_dlink },
-#if 0
-      /* not quite right for ethernet address */
-      { "ed", 0, "PMX   ", "PE-200", "ETHERNET", "R01", (void *)-1,
-        (void *)&pcmcia_dlink },
-#endif
-      { NULL }
-};
-
-#define ned_pcmcia_devs sizeof(pcmcia_ed_devs)/sizeof(pcmcia_ed_devs[0])
-
-int
-ed_pcmcia_match(parent, match, aux)
-	struct device *parent;
-	void *match, *aux;
-{
-	return pcmcia_slave_match(parent, match, aux, pcmcia_ed_devs,
-				  ned_pcmcia_devs);
-}
-
-void
-ed_pcmcia_attach(parent, self, aux)
-	struct device *parent, *self;
-	void *aux;
-{
-	struct pcmcia_attach_args *paa = aux;
-	
-	printf("ed_pcmcia_attach %p %p %p\n", parent, self, aux);
-	delay(2000000);
-	if (!pcmcia_configure(parent, self, paa->paa_link)) {
-		struct ed_softc *sc = (void *)self;
-		sc->spec_flags |= ED_NOTPRESENT;
-		printf(": not attached\n");
-	}
-}
-
-/*
- * No detach; network devices are too well linked into the rest of the
- * kernel.
- */
-int
-ed_pcmcia_detach(self)
-	struct device *self;
-{
-	return EBUSY;
-}
-
-#endif
-
-#if NED_PCI > 0 
-
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcidevs.h>
-
-#define PCI_CBIO		0x10	/* Configuration Base IO Address */
-
-int	ed_pci_match(struct device *, void *, void *);
-void	ed_pci_attach(struct device *, struct device *, void *);
-
-struct cfattach ed_pci_ca = {
-	sizeof(struct ed_softc), ed_pci_match, ed_pci_attach
-};
-
-static struct ed_pci_devs {
-	pci_vendor_id_t vendor;
-	pci_product_id_t product;
-} ed_pci_devs[] = {
-	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8029 },
-	{ PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C940F },
-	{ PCI_VENDOR_WINBOND2, PCI_PRODUCT_WINBOND2_W89C940 },
-	{ PCI_VENDOR_NETVIN, PCI_PRODUCT_NETVIN_NV5000 },
-	{ PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_COMPEXE },
-	{ PCI_VENDOR_KTI, PCI_PRODUCT_KTI_KTIE },
-	{ PCI_VENDOR_SURECOM, PCI_PRODUCT_SURECOM_NE34 },
-	{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT86C926 },
-};
-
-int
-ed_pci_match(parent, match, aux)
-	struct device *parent;
-	void *match, *aux;
-{
-	struct pci_attach_args *pa = aux;
-	int i;
-	
-	for (i = 0; i < sizeof(ed_pci_devs)/sizeof(ed_pci_devs[0]); i++)
-		if (ed_pci_devs[i].vendor == PCI_VENDOR(pa->pa_id) &&
-		    ed_pci_devs[i].product == PCI_PRODUCT(pa->pa_id))
-			return (1);
-	return (0);
-}
-
-/*
- * XXX - Note that we pretend this is a 16bit card until the rest
- * of the driver can deal with a 32bit bus (isa16bit -> bus_width)
- */
-void
-ed_pci_attach(parent, self, aux)
-	struct device *parent, *self;
-	void *aux;
-{
-	struct ed_softc *sc = (void *)self;
-	struct pci_attach_args *pa = aux;
-	pci_chipset_tag_t pc = pa->pa_pc;
-	pci_intr_handle_t ih;
-	bus_space_tag_t iot;
-	bus_space_handle_t ioh;
-	bus_addr_t iobase;
-	bus_size_t iosize, asicbase, nicbase;
-	struct ifnet *ifp = &sc->sc_arpcom.ac_if;
-	u_char romdata[32], tmp;
-	const char *intrstr;
-	int i;
-
-	iot = pa->pa_iot;
-
-	if (pci_io_find(pc, pa->pa_tag, PCI_CBIO, &iobase, &iosize)) {
-		printf("%s: can't find I/O base\n", sc->sc_dev.dv_xname);
-		return;
-	}
-
-	if (bus_space_map(iot, iobase, iosize, 0, &ioh)) {
-		printf("%s: can't map I/O space\n", sc->sc_dev.dv_xname);
-		return;
-	}
-
-	sc->asic_base = asicbase = ED_NOVELL_ASIC_OFFSET;
-	sc->nic_base = nicbase = ED_NOVELL_NIC_OFFSET;
-	sc->vendor = ED_VENDOR_NOVELL;
-	sc->mem_shared = 0;
-	sc->cr_proto = ED_CR_RD2;
-	sc->type = ED_TYPE_NE2000;
-	sc->type_str = "NE2000";
-
-	/* Reset the board. */
-	tmp = bus_space_read_1(iot, ioh, asicbase + ED_NOVELL_RESET);
-
-	/* Put the board into 16-bit mode (XXX - someday do 32-bit) */
-	sc->isa16bit = 1;
-	NIC_PUT(iot, ioh, nicbase, ED_P0_DCR,
-	    ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
-	NIC_PUT(iot, ioh, nicbase, ED_P0_PSTART, 16384 >> ED_PAGE_SHIFT);
-	NIC_PUT(iot, ioh, nicbase, ED_P0_PSTOP, 32768 >> ED_PAGE_SHIFT);
-
-	/*
-	 * NIC memory doesn't start at zero on an NE board.
-	 * The start address (and size) is tied to the bus width.
-	 * XXX - these should be 32K but the driver doesn't grok > 16bit
-	 */
-	sc->mem_size = 16384;		/* XXX - should be 8K x bus width */
-	sc->mem_start = 16384;		/*     - and this as well */
-	sc->mem_end = sc->mem_start + sc->mem_size;
-	sc->tx_page_start = sc->mem_size >> ED_PAGE_SHIFT;
-	sc->txb_cnt = sc->mem_size / 8192;
-	sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
-	sc->rec_page_stop = sc->tx_page_start + (sc->mem_size >> ED_PAGE_SHIFT);
-	sc->mem_ring =
-	    sc->mem_start + ((sc->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT);
-	sc->sc_delaybah = 0;			/* unused */
-	sc->sc_iot = iot;
-	sc->sc_ioh = ioh;
-
-	/* Get ethernet address (XXX - size field should be "8 * buswidth") */
-	ed_pio_readmem(sc, 0, romdata, sizeof(romdata));
-	/* XXX - change to (i * buswidth) when driver does 32bit */
-	for (i = 0; i < ETHER_ADDR_LEN; i++)
-		sc->sc_arpcom.ac_enaddr[i] = romdata[i * 2];
-
-	/* Clear any pending interrupts that might have occurred above. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_ISR, 0xff);
-
-	/* Set interface to stopped condition (reset). */
-	edstop(sc);
-
-	/* Initialize ifnet structure. */
-	bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
-	ifp->if_softc = sc;
-	ifp->if_start = edstart;
-	ifp->if_ioctl = edioctl;
-	ifp->if_watchdog = edwatchdog;
-	ifp->if_flags =
-	    IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
-	IFQ_SET_READY(&ifp->if_snd);
-
-	/* Attach the interface. */
-	if ((sc->spec_flags & ED_REATTACH) == 0)
-		if_attach(ifp);
-	ether_ifattach(ifp);
-
-	/* Print additional info when attached. */
-	printf(": address %s, ", ether_sprintf(sc->sc_arpcom.ac_enaddr));
-
-	if (sc->type_str)
-		printf("type %s ", sc->type_str);
-	else
-		printf("type unknown (0x%x) ", sc->type);
-	printf("%s", sc->isa16bit ? "(16-bit)" : "(8-bit)");	/* XXX */
-
-	/* Map and establish the interrupt. */
-	if (pci_intr_map(pa, &ih)) {
-		printf("\n%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
-		return;
-	}
-	intrstr = pci_intr_string(pc, ih);
-	sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, edintr,
-	    sc, sc->sc_dev.dv_xname);
-	if (sc->sc_ih == NULL) {
-		printf("\n%s: couldn't establish interrupt",
-		    sc->sc_dev.dv_xname);
-		if (intrstr != NULL)
-			printf(" at %s", intrstr);
-		printf("\n");
-		return;
-	}
-	printf(", %s\n", intrstr);
-}
-
-#endif
-
-/*
- * Determine if the device is present.
- */
-int
-edprobe(parent, match, aux)
-	struct device *parent;
-	void *match, *aux;
-{
-	struct ed_softc *sc = match;
-
-	return (ed_find(match, sc->sc_dev.dv_cfdata, aux));
-}
-
-/*
- * Fill in softc (if given), based on device type, cfdata and attach args.
- * Return 1 if successful, 0 otherwise.
- */
-int
-ed_find(sc, cf, ia)
-	struct ed_softc *sc;
-	struct cfdata *cf;
-	struct isa_attach_args *ia;
-{
-
-	if (ed_find_WD80x3(sc, cf, ia))
-		return (1);
-	if (ed_find_3Com(sc, cf, ia))
-		return (1);
-	if (ed_find_Novell(sc, cf, ia))
-		return (1);
-	return (0);
-}
-
-/*
- * Generic probe routine for testing for the existance of a DS8390.  Must be
- * called after the NIC has just been reset.  This routine works by looking at
- * certain register values that are guaranteed to be initialized a certain way
- * after power-up or reset.  Seems not to currently work on the 83C690.
- *
- * Specifically:
- *
- *	Register			reset bits	set bits
- *	Command Register (CR)		TXP, STA	RD2, STP
- *	Interrupt Status (ISR)				RST
- *	Interrupt Mask (IMR)		All bits
- *	Data Control (DCR)				LAS
- *	Transmit Config. (TCR)		LB1, LB0
- *
- * We only look at the CR and ISR registers, however, because looking at the
- * others would require changing register pages (which would be intrusive if
- * this isn't an 8390).
- *
- * Return 1 if 8390 was found, 0 if not.
- */
-int
-ed_probe_generic8390(t, bah, nicbase)
-	bus_space_tag_t t;
-	bus_space_handle_t bah;
-	int nicbase;
-{
-
-	if ((NIC_GET(t, bah, nicbase, ED_P0_CR) &
-	     (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
-	    (ED_CR_RD2 | ED_CR_STP))
-		return (0);
-	if ((NIC_GET(t, bah, nicbase, ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST)
-		return (0);
-
-	return (1);
-}
-
-int ed_wd584_irq[] = { 9, 3, 5, 7, 10, 11, 15, 4 };
-int ed_wd790_irq[] = { IRQUNK, 9, 3, 5, 7, 10, 11, 15 };
-
-/*
- * Probe and vendor-specific initialization routine for SMC/WD80x3 boards.
- */
-int
-ed_find_WD80x3(sc, cf, ia)
-	struct ed_softc *sc;
-	struct cfdata *cf;
-	struct isa_attach_args *ia;
-{
-	bus_space_tag_t iot;
-	bus_space_tag_t memt;
-	bus_space_handle_t ioh;
-	bus_space_handle_t delaybah = ia->ia_delaybah;
-	bus_space_handle_t memh;
-	u_int memsize;
-	u_char iptr, isa16bit, sum, wd790rev;
-	int i, rv, memfail, mapped_mem = 0;
-	int asicbase, nicbase;
-
-	iot = ia->ia_iot;
-	memt = ia->ia_memt;
-	rv = 0;
-
-	/* Set initial values for width/size. */
-	memsize = 8192;
-	isa16bit = 0;
-
-	if (bus_space_map(iot, ia->ia_iobase, ED_WD_IO_PORTS, 0, &ioh))
-		return (0);
-
-	sc->asic_base = asicbase = 0;
-	sc->nic_base = nicbase = asicbase + ED_WD_NIC_OFFSET;
-	sc->is790 = 0;
-
-#ifdef TOSH_ETHER
-	bus_space_write_1(iot, ioh, asicbase + ED_WD_MSR, ED_WD_MSR_POW);
-	delay(10000);
-#endif
-
-	/*
-	 * Attempt to do a checksum over the station address PROM.  If it
-	 * fails, it's probably not a SMC/WD board.  There is a problem with
-	 * this, though: some clone WD boards don't pass the checksum test.
-	 * Danpex boards for one.
-	 */
-	for (sum = 0, i = 0; i < 8; ++i)
-		sum += bus_space_read_1(iot, ioh, asicbase + ED_WD_PROM + i);
-
-	if (sum != ED_WD_ROM_CHECKSUM_TOTAL) {
-		/*
-		 * Checksum is invalid.  This often happens with cheap WD8003E
-		 * clones.  In this case, the checksum byte (the eighth byte)
-		 * seems to always be zero.
-		 */
-		if (bus_space_read_1(iot, ioh, asicbase + ED_WD_CARD_ID) !=
-		    ED_TYPE_WD8003E ||
-		    bus_space_read_1(iot, ioh, asicbase + ED_WD_PROM + 7) != 0)
-			goto out;
-	}
-
-	/* Reset card to force it into a known state. */
-#ifdef TOSH_ETHER
-	bus_space_write_1(iot, ioh, asicbase + ED_WD_MSR,
-	    ED_WD_MSR_RST | ED_WD_MSR_POW);
-#else
-	bus_space_write_1(iot, ioh, asicbase + ED_WD_MSR, ED_WD_MSR_RST);
-#endif
-	delay(100);
-	bus_space_write_1(iot, ioh, asicbase + ED_WD_MSR,
-	    bus_space_read_1(iot, ioh, asicbase + ED_WD_MSR) & ~ED_WD_MSR_RST);
-	/* Wait in the case this card is reading its EEROM. */
-	delay(5000);
-
-	sc->vendor = ED_VENDOR_WD_SMC;
-	sc->type = bus_space_read_1(iot, ioh, asicbase + ED_WD_CARD_ID);
-
-	switch (sc->type) {
-	case ED_TYPE_WD8003S:
-		sc->type_str = "WD8003S";
-		break;
-	case ED_TYPE_WD8003E:
-		sc->type_str = "WD8003E";
-		break;
-	case ED_TYPE_WD8003EB:
-		sc->type_str = "WD8003EB";
-		break;
-	case ED_TYPE_WD8003W:
-		sc->type_str = "WD8003W";
-		break;
-	case ED_TYPE_WD8013EBT:
-		sc->type_str = "WD8013EBT";
-		memsize = 16384;
-		isa16bit = 1;
-		break;
-	case ED_TYPE_WD8013W:
-		sc->type_str = "WD8013W";
-		memsize = 16384;
-		isa16bit = 1;
-		break;
-	case ED_TYPE_WD8013EP:		/* also WD8003EP */
-		if (bus_space_read_1(iot, ioh, asicbase + ED_WD_ICR)
-		    & ED_WD_ICR_16BIT) {
-			isa16bit = 1;
-			memsize = 16384;
-			sc->type_str = "WD8013EP";
-		} else
-			sc->type_str = "WD8003EP";
-		break;
-	case ED_TYPE_WD8013WC:
-		sc->type_str = "WD8013WC";
-		memsize = 16384;
-		isa16bit = 1;
-		break;
-	case ED_TYPE_WD8013EBP:
-		sc->type_str = "WD8013EBP";
-		memsize = 16384;
-		isa16bit = 1;
-		break;
-	case ED_TYPE_WD8013EPC:
-		sc->type_str = "WD8013EPC";
-		memsize = 16384;
-		isa16bit = 1;
-		break;
-	case ED_TYPE_SMC8216C:
-	case ED_TYPE_SMC8216T:
-		wd790rev = bus_space_read_1(iot, ioh, asicbase + ED_WD790_REV);
-		if (wd790rev < ED_WD795)
-			sc->type_str = (sc->type == ED_TYPE_SMC8216C) ?
-			    "SMC8216/SMC8216C" : "SMC8216T";
-		else {
-			sc->type_str = "SMC8416C/SMC8416BT";
-			if (bus_space_read_1(iot, ioh,
-					     asicbase + ED_WD795_PIO)) {
-				printf ("%s: detected SMC8416 in PIO mode, unsupported hardware configuration.\n", sc->sc_dev.dv_xname);
-				goto out;
-			}
-		}
-
-		bus_space_write_1(iot, ioh, asicbase + ED_WD790_HWR,
-		    bus_space_read_1(iot, ioh, asicbase + ED_WD790_HWR)
-		    | ED_WD790_HWR_SWH);
-		switch (bus_space_read_1(iot, ioh, asicbase + ED_WD790_RAR) &
-		    ED_WD790_RAR_SZ64) {
-		case ED_WD790_RAR_SZ64:
-			memsize = 65536;
-			break;
-		case ED_WD790_RAR_SZ32:
-			memsize = 32768;
-			break;
-		case ED_WD790_RAR_SZ16:
-			memsize = 16384;
-			break;
-		case ED_WD790_RAR_SZ8:
-			memsize = 8192;
-			break;
-		}
-		bus_space_write_1(iot, ioh, asicbase + ED_WD790_HWR,
-		    bus_space_read_1(iot, ioh, asicbase + ED_WD790_HWR) &
-		    ~ED_WD790_HWR_SWH);
-
-		isa16bit = 1;
-		sc->is790 = 1;
-		break;
-#ifdef TOSH_ETHER
-	case ED_TYPE_TOSHIBA1:
-		sc->type_str = "Toshiba1";
-		memsize = 32768;
-		isa16bit = 1;
-		break;
-	case ED_TYPE_TOSHIBA4:
-		sc->type_str = "Toshiba4";
-		memsize = 32768;
-		isa16bit = 1;
-		break;
-#endif
-	default:
-		sc->type_str = NULL;
-		break;
-	}
-	/*
-	 * Make some adjustments to initial values depending on what is found
-	 * in the ICR.
-	 */
-	if (isa16bit && (sc->type != ED_TYPE_WD8013EBT) &&
-#ifdef TOSH_ETHER
-	    (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4) &&
-#endif
-	    ((bus_space_read_1(iot, ioh, asicbase + ED_WD_ICR) &
-	    ED_WD_ICR_16BIT) == 0)) {
-		isa16bit = 0;
-		memsize = 8192;
-	}
-
-#ifdef ED_DEBUG
-	printf("type=%x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n",
-	    sc->type, sc->type_str ?: "unknown", isa16bit, memsize,
-	    ia->ia_msize);
-	for (i = 0; i < 8; i++)
-		printf("%x -> %x\n", i, bus_space_read_1(iot, ioh,
-		    asicbase + i));
-#endif
-	/* Allow the user to override the autoconfiguration. */
-	if (ia->ia_msize)
-		memsize = ia->ia_msize;
-	/*
-	 * (Note that if the user specifies both of the following flags that
-	 * '8-bit' mode intentionally has precedence.)
-	 */
-	if (cf->cf_flags & ED_FLAGS_FORCE_16BIT_MODE)
-		isa16bit = 1;
-	if (cf->cf_flags & ED_FLAGS_FORCE_8BIT_MODE)
-		isa16bit = 0;
-
-	/*
-	 * If possible, get the assigned interrupt number from the card and
-	 * use it.
-	 */
-	if (sc->is790) {
-		u_char x;
-
-		/* Assemble together the encoded interrupt number. */
-		bus_space_write_1(iot, ioh, ED_WD790_HWR,
-		    bus_space_read_1(iot, ioh, ED_WD790_HWR) |
-		    ED_WD790_HWR_SWH);
-		x = bus_space_read_1(iot, ioh, ED_WD790_GCR);
-		iptr = ((x & ED_WD790_GCR_IR2) >> 4) |
-		    ((x & (ED_WD790_GCR_IR1|ED_WD790_GCR_IR0)) >> 2);
-		bus_space_write_1(iot, ioh, ED_WD790_HWR,
-		    bus_space_read_1(iot, ioh, ED_WD790_HWR) &
-		    ~ED_WD790_HWR_SWH);
-		/*
-		 * Translate it using translation table, and check for
-		 * correctness.
-		 */
-		if (ia->ia_irq != IRQUNK) {
-			if (ia->ia_irq != ed_wd790_irq[iptr]) {
-				printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
-				    sc->sc_dev.dv_xname, ia->ia_irq,
-				    ed_wd790_irq[iptr]);
-				goto out;
-			}
-		} else
-			ia->ia_irq = ed_wd790_irq[iptr];
-		/* Enable the interrupt. */
-		bus_space_write_1(iot, ioh, ED_WD790_ICR,
-		    bus_space_read_1(iot, ioh, ED_WD790_ICR) |
-		    ED_WD790_ICR_EIL);
-	} else if (sc->type & ED_WD_SOFTCONFIG) {
-		/* Assemble together the encoded interrupt number. */
-		iptr = (bus_space_read_1(iot, ioh, ED_WD_ICR) &
-		    ED_WD_ICR_IR2) |
-		    ((bus_space_read_1(iot, ioh, ED_WD_IRR) &
-		      (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5);
-		/*
-		 * Translate it using translation table, and check for
-		 * correctness.
-		 */
-		if (ia->ia_irq != IRQUNK) {
-			if (ia->ia_irq != ed_wd584_irq[iptr]) {
-				printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
-				    sc->sc_dev.dv_xname, ia->ia_irq,
-				    ed_wd584_irq[iptr]);
-				goto out;
-			}
-		} else
-			ia->ia_irq = ed_wd584_irq[iptr];
-		/* Enable the interrupt. */
-		bus_space_write_1(iot, ioh, ED_WD_IRR,
-		    bus_space_read_1(iot, ioh, ED_WD_IRR) | ED_WD_IRR_IEN);
-	} else {
-		if (ia->ia_irq == IRQUNK) {
-			printf("%s: %s does not have soft configuration\n",
-			    sc->sc_dev.dv_xname, sc->type_str);
-			goto out;
-		}
-	}
-
-	/* XXX Figure out the shared memory address. */
-
-	if (ia->ia_maddr == MADDRUNK)
-		goto out;
-	sc->isa16bit = isa16bit;
-	sc->mem_shared = 1;
-	ia->ia_msize = memsize;
-	if (bus_space_map(memt, ia->ia_maddr, memsize, 0, &memh))
-		goto out;
-	mapped_mem = 1;
-	sc->mem_start = 0;	/* offset */
-
-	/* Allocate one xmit buffer if < 16k, two buffers otherwise. */
-	if ((memsize < 16384) || (cf->cf_flags & ED_FLAGS_NO_MULTI_BUFFERING))
-		sc->txb_cnt = 1;
-	else
-		sc->txb_cnt = 2;
-
-	sc->tx_page_start = ED_WD_PAGE_OFFSET;
-	sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
-	sc->rec_page_stop = sc->tx_page_start + (memsize >> ED_PAGE_SHIFT);
-	sc->mem_ring = sc->mem_start + (sc->rec_page_start << ED_PAGE_SHIFT);
-	sc->mem_size = memsize;
-	sc->mem_end = sc->mem_start + memsize;
-
-	/* Get station address from on-board ROM. */
-	for (i = 0; i < ETHER_ADDR_LEN; ++i)
-		sc->sc_arpcom.ac_enaddr[i] =
-		    bus_space_read_1(iot, ioh, asicbase + ED_WD_PROM + i);
-
-	/*
-	 * Set upper address bits and 8/16 bit access to shared memory.
-	 */
-	if (isa16bit) {
-		if (sc->is790) {
-			sc->wd_laar_proto =
-			    bus_space_read_1(iot, ioh, asicbase + ED_WD_LAAR) &
-			    ~ED_WD_LAAR_M16EN;
-		} else {
-			sc->wd_laar_proto = ED_WD_LAAR_L16EN |
-			    ((ia->ia_maddr >> 19) & ED_WD_LAAR_ADDRHI);
-		}
-		bus_space_write_1(iot, ioh, asicbase + ED_WD_LAAR,
-		    sc->wd_laar_proto | ED_WD_LAAR_M16EN);
-	} else  {
-		if ((sc->type & ED_WD_SOFTCONFIG) ||
-#ifdef TOSH_ETHER
-		    (sc->type == ED_TYPE_TOSHIBA1) ||
-		    (sc->type == ED_TYPE_TOSHIBA4) ||
-#endif
-		    ((sc->type == ED_TYPE_WD8013EBT) && !sc->is790)) {
-			sc->wd_laar_proto =
-			    ((ia->ia_maddr >> 19) &
-			    ED_WD_LAAR_ADDRHI);
-			bus_space_write_1(iot, ioh, asicbase + ED_WD_LAAR,
-			    sc->wd_laar_proto);
-		}
-	}
-
-	/*
-	 * Set address and enable interface shared memory.
-	 */
-	if (!sc->is790) {
-#ifdef TOSH_ETHER
-		bus_space_write_1(iot, ioh, asicbase + ED_WD_MSR + 1,
-		    ((ia->ia_maddr >> 8) & 0xe0) | 4);
-		bus_space_write_1(iot, ioh, asicbase + ED_WD_MSR + 2,
-		    ((ia->ia_maddr >> 16) & 0x0f));
-		sc->wd_msr_proto = ED_WD_MSR_POW;
-#else
-		sc->wd_msr_proto =
-		    (ia->ia_maddr >> 13) & ED_WD_MSR_ADDR;
-#endif
-		sc->cr_proto = ED_CR_RD2;
-	} else {
-		bus_space_write_1(iot, ioh, asicbase + 0x04,
-		    bus_space_read_1(iot, ioh, asicbase + 0x04) | 0x80);
-		bus_space_write_1(iot, ioh, asicbase + 0x0b,
-		    ((ia->ia_maddr >> 13) & 0x0f) |
-		    ((ia->ia_maddr >> 11) & 0x40) |
-		    (bus_space_read_1(iot, ioh, asicbase + 0x0b) & 0xb0));
-		bus_space_write_1(iot, ioh, asicbase + 0x04,
-		    bus_space_read_1(iot, ioh, asicbase + 0x04) & ~0x80);
-		sc->wd_msr_proto = 0x00;
-		sc->cr_proto = 0;
-	}
-	bus_space_write_1(iot, ioh, asicbase + ED_WD_MSR,
-	    sc->wd_msr_proto | ED_WD_MSR_MENB);
-
-	(void) bus_space_read_1(iot, delaybah, 0);
-	(void) bus_space_read_1(iot, delaybah, 0);
-
-	/* Now zero memory and verify that it is clear. */
-	if (isa16bit) {
-		for (i = 0; i < memsize; i += 2)
-			bus_space_write_2(memt, memh, sc->mem_start + i, 0);
-	} else {
-		for (i = 0; i < memsize; ++i)
-			bus_space_write_1(memt, memh, sc->mem_start + i, 0);
-	}
-
-	memfail = 0;
-	if (isa16bit) {
-		for (i = 0; i < memsize; i += 2) {
-			if (bus_space_read_2(memt, memh, sc->mem_start + i)) {
-				memfail = 1;
-				break;
-			}
-		}
-	} else {
-		for (i = 0; i < memsize; ++i) {
-			if (bus_space_read_1(memt, memh, sc->mem_start + i)) {
-				memfail = 1;
-				break;
-			}
-		}
-	}
-
-	if (memfail) {
-		printf("%s: failed to clear shared memory at %x - "
-		    "check configuration\n",
-		    sc->sc_dev.dv_xname,
-		    (ia->ia_maddr + sc->mem_start + i));
-
-		/* Disable 16 bit access to shared memory. */
-		bus_space_write_1(iot, ioh, asicbase + ED_WD_MSR,
-		    sc->wd_msr_proto);
-		if (isa16bit)
-			bus_space_write_1(iot, ioh, asicbase + ED_WD_LAAR,
-			    sc->wd_laar_proto);
-		(void) bus_space_read_1(iot, delaybah, 0);
-		(void) bus_space_read_1(iot, delaybah, 0);
-		goto out;
-	}
-
-	/*
-	 * Disable 16bit access to shared memory - we leave it disabled
-	 * so that 1) machines reboot properly when the board is set 16
-	 * 16 bit mode and there are conflicting 8bit devices/ROMS in
-	 * the same 128k address space as this boards shared memory,
-	 * and 2) so that other 8 bit devices with shared memory can be
-	 * used in this 128k region, too.
-	 */
-	bus_space_write_1(iot, ioh, asicbase + ED_WD_MSR, sc->wd_msr_proto);
-	if (isa16bit)
-		bus_space_write_1(iot, ioh, asicbase + ED_WD_LAAR,
-		    sc->wd_laar_proto);
-	(void) bus_space_read_1(iot, delaybah, 0);
-	(void) bus_space_read_1(iot, delaybah, 0);
-
-	ia->ia_iosize = ED_WD_IO_PORTS;
-	rv = 1;
-
- out:
-	/*
-	 * XXX Should always unmap, but we can't yet.
-	 * XXX Need to squish "indirect" first.
-	 */
-	if (rv == 0) {
-		bus_space_unmap(iot, ioh, ED_WD_IO_PORTS);
-		if (mapped_mem)
-			bus_space_unmap(memt, memh, memsize);
-	} else {
-		/* XXX this is all "indirect" brokenness */
-		sc->sc_iot = iot;
-		sc->sc_memt = memt;
-		sc->sc_ioh = ioh;
-		sc->sc_memh = memh;
-	}
-	return (rv);
-}
-
-int ed_3com_iobase[] =
-    {0x2e0, 0x2a0, 0x280, 0x250, 0x350, 0x330, 0x310, 0x300};
-int ed_3com_maddr[] = {
-    MADDRUNK, MADDRUNK, MADDRUNK, MADDRUNK, 0xc8000, 0xcc000, 0xd8000, 0xdc000
-};
-#if 0
-int ed_3com_irq[] = {IRQUNK, IRQUNK, IRQUNK, IRQUNK, 9, 3, 4, 5};
-#endif
-
-/*
- * Probe and vendor-specific initialization routine for 3Com 3c503 boards.
- */
-int
-ed_find_3Com(sc, cf, ia)
-	struct ed_softc *sc;
-	struct cfdata *cf;
-	struct isa_attach_args *ia;
-{
-	bus_space_tag_t iot;
-	bus_space_tag_t memt;
-	bus_space_handle_t ioh;
-	bus_space_handle_t memh;
-	int i;
-	u_int memsize, memfail;
-	u_char isa16bit, x;
-	int ptr, asicbase, nicbase;
-
-	/*
-	 * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k window
-	 * to it.
-	 */
-	memsize = 8192;
-
-	iot = ia->ia_iot;
-	memt = ia->ia_memt;
-
-	if (bus_space_map(iot, ia->ia_iobase, ED_3COM_IO_PORTS, 0, &ioh))
-		return (0);
-
-	sc->asic_base = asicbase = ED_3COM_ASIC_OFFSET;
-	sc->nic_base = nicbase = ED_3COM_NIC_OFFSET;
-
-	/*
-	 * Verify that the kernel configured I/O address matches the board
-	 * configured address.
-	 *
-	 * This is really only useful to see if something that looks like the
-	 * board is there; after all, we are already talking it at that
-	 * address.
-	 */
-	x = bus_space_read_1(iot, ioh, asicbase + ED_3COM_BCFR);
-	if (x == 0 || (x & (x - 1)) != 0)
-		goto err;
-	ptr = ffs(x) - 1;
-	if (ia->ia_iobase != IOBASEUNK) {
-		if (ia->ia_iobase != ed_3com_iobase[ptr]) {
-			printf("%s: %s mismatch; kernel configured %x != board configured %x\n",
-			    "iobase", sc->sc_dev.dv_xname, ia->ia_iobase,
-			    ed_3com_iobase[ptr]);
-			goto err;
-		}
-	} else
-		ia->ia_iobase = ed_3com_iobase[ptr];	/* XXX --thorpej */
-
-	x = bus_space_read_1(iot, ioh, asicbase + ED_3COM_PCFR);
-	if (x == 0 || (x & (x - 1)) != 0) {
-		printf("%s: The 3c503 is not currently supported with memory "
-		       "mapping disabled.\n%s: Reconfigure the card to "
-		       "enable memory mapping.\n",
-		       sc->sc_dev.dv_xname, sc->sc_dev.dv_xname);
-		goto err;
-	}
-	ptr = ffs(x) - 1;
-	if (ia->ia_maddr != MADDRUNK) {
-		if (ia->ia_maddr != ed_3com_maddr[ptr]) {
-			printf("%s: %s mismatch; kernel configured %x != board configured %x\n",
-			    "maddr", sc->sc_dev.dv_xname, ia->ia_maddr,
-			    ed_3com_maddr[ptr]);
-			goto err;
-		}
-	} else
-		ia->ia_maddr = ed_3com_maddr[ptr];
-
-#if 0
-	x = bus_space_read_1(iot, ioh, asicbase + ED_3COM_IDCFR) &
-	    ED_3COM_IDCFR_IRQ;
-	if (x == 0 || (x & (x - 1)) != 0)
-		goto out;
-	ptr = ffs(x) - 1;
-	if (ia->ia_irq != IRQUNK) {
-		if (ia->ia_irq != ed_3com_irq[ptr]) {
-			printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
-			    sc->sc_dev.dv_xname, ia->ia_irq,
-			    ed_3com_irq[ptr]);
-			goto err;
-		}
-	} else
-		ia->ia_irq = ed_3com_irq[ptr];
-#endif
-
-	/*
-	 * Reset NIC and ASIC.  Enable on-board transceiver throughout reset
-	 * sequence because it'll lock up if the cable isn't connected if we
-	 * don't.
-	 */
-	bus_space_write_1(iot, ioh, asicbase + ED_3COM_CR,
-	    ED_3COM_CR_RST | ED_3COM_CR_XSEL);
-
-	/* Wait for a while, then un-reset it. */
-	delay(50);
-
-	/*
-	 * The 3Com ASIC defaults to rather strange settings for the CR after a
-	 * reset - it's important to set it again after the following outb
-	 * (this is done when we map the PROM below).
-	 */
-	bus_space_write_1(iot, ioh, asicbase + ED_3COM_CR, ED_3COM_CR_XSEL);
-
-	/* Wait a bit for the NIC to recover from the reset. */
-	delay(5000);
-
-	sc->vendor = ED_VENDOR_3COM;
-	sc->type_str = "3c503";
-	sc->mem_shared = 1;
-	sc->cr_proto = ED_CR_RD2;
-
-	/*
-	 * Get station address from on-board ROM.
-	 *
-	 * First, map ethernet address PROM over the top of where the NIC
-	 * registers normally appear.
-	 */
-	bus_space_write_1(iot, ioh, asicbase + ED_3COM_CR,
-	    ED_3COM_CR_EALO | ED_3COM_CR_XSEL);
-
-	for (i = 0; i < ETHER_ADDR_LEN; ++i)
-		sc->sc_arpcom.ac_enaddr[i] = NIC_GET(iot, ioh, nicbase, i);
-
-	/*
-	 * Unmap PROM - select NIC registers.  The proper setting of the
-	 * transceiver is set in edinit so that the attach code is given a
-	 * chance to set the default based on a compile-time config option.
-	 */
-	bus_space_write_1(iot, ioh, asicbase + ED_3COM_CR, ED_3COM_CR_XSEL);
-
-	/* Determine if this is an 8bit or 16bit board. */
-
-	/* Select page 0 registers. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP);
-
-	/*
-	 * Attempt to clear WTS bit.  If it doesn't clear, then this is a
-	 * 16-bit board.
-	 */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_DCR, 0);
-
-	/* Select page 2 registers. */
-	NIC_PUT(iot, ioh, nicbase,
-	    ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_2 | ED_CR_STP);
-
-	/* The 3c503 forces the WTS bit to a one if this is a 16bit board. */
-	if (NIC_GET(iot, ioh, nicbase, ED_P2_DCR) & ED_DCR_WTS)
-		isa16bit = 1;
-	else
-		isa16bit = 0;
-
-	/* Select page 0 registers. */
-	NIC_PUT(iot, ioh, nicbase, ED_P2_CR,
-	    ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP);
-
-	if (bus_space_map(memt, ia->ia_maddr, memsize, 0, &memh))
-		goto err;
-	sc->mem_start = 0;		/* offset */
-	sc->mem_size = memsize;
-	sc->mem_end = sc->mem_start + memsize;
-
-	/*
-	 * We have an entire 8k window to put the transmit buffers on the
-	 * 16-bit boards.  But since the 16bit 3c503's shared memory is only
-	 * fast enough to overlap the loading of one full-size packet, trying
-	 * to load more than 2 buffers can actually leave the transmitter idle
-	 * during the load.  So 2 seems the best value.  (Although a mix of
-	 * variable-sized packets might change this assumption.  Nonetheless,
-	 * we optimize for linear transfers of same-size packets.)
-	 */
-	if (isa16bit) {
- 		if (cf->cf_flags & ED_FLAGS_NO_MULTI_BUFFERING)
-			sc->txb_cnt = 1;
-		else
-			sc->txb_cnt = 2;
-
-		sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT;
-		sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT;
-		sc->rec_page_stop =
-		    (memsize >> ED_PAGE_SHIFT) + ED_3COM_RX_PAGE_OFFSET_16BIT;
-		sc->mem_ring = sc->mem_start;
-	} else {
-		sc->txb_cnt = 1;
-		sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT;
-		sc->rec_page_start =
-		    ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT;
-		sc->rec_page_stop =
-		    (memsize >> ED_PAGE_SHIFT) + ED_3COM_TX_PAGE_OFFSET_8BIT;
-		sc->mem_ring =
-		    sc->mem_start + (ED_TXBUF_SIZE << ED_PAGE_SHIFT);
-	}
-
-	sc->isa16bit = isa16bit;
-
-	/*
-	 * Initialize GA page start/stop registers.  Probably only needed if
-	 * doing DMA, but what the Hell.
-	 */
-	bus_space_write_1(iot, ioh, asicbase + ED_3COM_PSTR, sc->rec_page_start);
-	bus_space_write_1(iot, ioh, asicbase + ED_3COM_PSPR, sc->rec_page_stop);
-
-	/* Set IRQ.  3c503 only allows a choice of irq 3-5 or 9. */
-	switch (ia->ia_irq) {
-	case 9:
-		bus_space_write_1(iot, ioh, asicbase + ED_3COM_IDCFR,
-		    ED_3COM_IDCFR_IRQ2);
-		break;
-	case 3:
-		bus_space_write_1(iot, ioh, asicbase + ED_3COM_IDCFR,
-		    ED_3COM_IDCFR_IRQ3);
-		break;
-	case 4:
-		bus_space_write_1(iot, ioh, asicbase + ED_3COM_IDCFR,
-		    ED_3COM_IDCFR_IRQ4);
-		break;
-	case 5:
-		bus_space_write_1(iot, ioh, asicbase + ED_3COM_IDCFR,
-		    ED_3COM_IDCFR_IRQ5);
-		break;
-	default:
-		printf("%s: invalid irq configuration (%d) must be 3-5 or 9 for 3c503\n",
-		    sc->sc_dev.dv_xname, ia->ia_irq);
-		goto out;
-	}
-
-	/*
-	 * Initialize GA configuration register.  Set bank and enable shared
-	 * mem.
-	 */
-	bus_space_write_1(iot, ioh, asicbase + ED_3COM_GACFR,
-	    ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0);
-
-	/*
-	 * Initialize "Vector Pointer" registers. These gawd-awful things are
-	 * compared to 20 bits of the address on ISA, and if they match, the
-	 * shared memory is disabled. We set them to 0xffff0...allegedly the
-	 * reset vector.
-	 */
-	bus_space_write_1(iot, ioh, asicbase + ED_3COM_VPTR2, 0xff);
-	bus_space_write_1(iot, ioh, asicbase + ED_3COM_VPTR1, 0xff);
-	bus_space_write_1(iot, ioh, asicbase + ED_3COM_VPTR0, 0x00);
-
-	/* Now zero memory and verify that it is clear. */
-	if (isa16bit) {
-		for (i = 0; i < memsize; i += 2)
-			bus_space_write_2(memt, memh, sc->mem_start + i, 0);
-	} else {
-		for (i = 0; i < memsize; ++i)
-			bus_space_write_1(memt, memh, sc->mem_start + i, 0);
-	}
-
-	memfail = 0;
-	if (isa16bit) {
-		for (i = 0; i < memsize; i += 2) {
-			if (bus_space_read_2(memt, memh, sc->mem_start + i)) {
-				memfail = 1;
-				break;
-			}
-		}
-	} else {
-		for (i = 0; i < memsize; ++i) {
-			if (bus_space_read_1(memt, memh, sc->mem_start + i)) {
-				memfail = 1;
-				break;
-			}
-		}
-	}
-
-	if (memfail) {
-		printf("%s: failed to clear shared memory at %x - "
-		    "check configuration\n",
-		    sc->sc_dev.dv_xname,
-		    (ia->ia_maddr + sc->mem_start + i));
-		goto out;
-	}
-
-	ia->ia_msize = memsize;
-	ia->ia_iosize = ED_3COM_IO_PORTS;
-
-	/*
-	 * XXX Sould always unmap, but we can't yet.
-	 * XXX Need to squish "indirect" first.
-	 */
-	sc->sc_iot = iot;
-	sc->sc_memt = memt;
-	sc->sc_ioh = ioh;
-	sc->sc_memh = memh;
-	return 1;
-
- out:
-	bus_space_unmap(memt, memh, memsize);
- err:
-	bus_space_unmap(iot, ioh, ED_3COM_IO_PORTS);
-	return 0;
-}
-
-/*
- * Probe and vendor-specific initialization routine for NE1000/2000 boards.
- */
-int
-ed_find_Novell(sc, cf, ia)
-	struct ed_softc *sc;
-	struct cfdata *cf;
-	struct isa_attach_args *ia;
-{
-	bus_space_tag_t iot;
-	bus_space_handle_t ioh;
-	u_int memsize, n;
-	u_char romdata[16], tmp;
-	static u_char test_pattern[32] = "THIS is A memory TEST pattern";
-	u_char test_buffer[32];
-	int asicbase, nicbase;
-
-	iot = ia->ia_iot;
-
-	if (bus_space_map(iot, ia->ia_iobase, ED_NOVELL_IO_PORTS, 0, &ioh))
-		return (0);
-
-	sc->asic_base = asicbase = ED_NOVELL_ASIC_OFFSET;
-	sc->nic_base = nicbase = ED_NOVELL_NIC_OFFSET;
-
-	/* XXX - do Novell-specific probe here */
-
-	/* Reset the board. */
-#ifdef GWETHER
-	bus_space_write_1(iot, ioh, asicbase + ED_NOVELL_RESET, 0);
-	delay(200);
-#endif /* GWETHER */
-	tmp = bus_space_read_1(iot, ioh, asicbase + ED_NOVELL_RESET);
-
-	/*
-	 * I don't know if this is necessary; probably cruft leftover from
-	 * Clarkson packet driver code. Doesn't do a thing on the boards I've
-	 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is
-	 * non-invasive...but some boards don't seem to reset and I don't have
-	 * complete documentation on what the 'right' thing to do is...so we do
-	 * the invasive thing for now.  Yuck.]
-	 */
-	bus_space_write_1(iot, ioh, asicbase + ED_NOVELL_RESET, tmp);
-	delay(5000);
-
-	/*
-	 * This is needed because some NE clones apparently don't reset the NIC
-	 * properly (or the NIC chip doesn't reset fully on power-up)
-	 * XXX - this makes the probe invasive! ...Done against my better
-	 * judgement.  -DLG
-	 */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP);
-
-	delay(5000);
-
-	/* Make sure that we really have an 8390 based board. */
-	if (!ed_probe_generic8390(iot, ioh, nicbase))
-		goto out;
-
-	sc->vendor = ED_VENDOR_NOVELL;
-	sc->mem_shared = 0;
-	sc->cr_proto = ED_CR_RD2;
-	ia->ia_msize = 0;
-
-	/*
-	 * Test the ability to read and write to the NIC memory.  This has the
-	 * side affect of determining if this is an NE1000 or an NE2000.
-	 */
-
-	/*
-	 * This prevents packets from being stored in the NIC memory when the
-	 * readmem routine turns on the start bit in the CR.
-	 */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RCR, ED_RCR_MON);
-
-	/* Temporarily initialize DCR for byte operations. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
-
-	NIC_PUT(iot, ioh, nicbase, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT);
-	NIC_PUT(iot, ioh, nicbase, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT);
-
-	sc->isa16bit = 0;
-
-	/*
-	 * XXX indirect brokenness, used by ed_pio{read,write}mem()
-	 */
-	sc->sc_iot = iot;
-	sc->sc_ioh = ioh;
-
-	/*
-	 * Write a test pattern in byte mode.  If this fails, then there
-	 * probably isn't any memory at 8k - which likely means that the board
-	 * is an NE2000.
-	 */
-	ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern));
-	ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern));
-
-	if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) {
-		/* not an NE1000 - try NE2000 */
-
-		NIC_PUT(iot, ioh, nicbase, ED_P0_DCR,
-		    ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
-		NIC_PUT(iot, ioh, nicbase, ED_P0_PSTART, 16384 >> ED_PAGE_SHIFT);
-		NIC_PUT(iot, ioh, nicbase, ED_P0_PSTOP, 32768 >> ED_PAGE_SHIFT);
-
-		sc->isa16bit = 1;
-
-		/*
-		 * Write a test pattern in word mode.  If this also fails, then
-		 * we don't know what this board is.
-		 */
-		ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
-		ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
-
-		if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)))
-			goto out; /* not an NE2000 either */
-
-		sc->type = ED_TYPE_NE2000;
-		sc->type_str = "NE2000";
-	} else {
-		sc->type = ED_TYPE_NE1000;
-		sc->type_str = "NE1000";
-	}
-
-	if (ia->ia_irq == IRQUNK) {
-		printf("%s: %s does not have soft configuration\n",
-		    sc->sc_dev.dv_xname, sc->type_str);
-		goto out;
-	}
-
-	/* 8k of memory plus an additional 8k if 16-bit. */
-	memsize = 8192 + sc->isa16bit * 8192;
-
-#if 0 /* probably not useful - NE boards only come two ways */
-	/* Allow kernel config file overrides. */
-	if (ia->ia_msize)
-		memsize = ia->ia_msize;
-#endif
-
-	/* NIC memory doesn't start at zero on an NE board. */
-	/* The start address is tied to the bus width. */
-	sc->mem_start = (8192 + sc->isa16bit * 8192);
-	sc->tx_page_start = memsize >> ED_PAGE_SHIFT;
-
-#ifdef GWETHER
-	{
-		int x, i, mstart = 0;
-		char pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], tbuf[ED_PAGE_SIZE];
-
-		for (i = 0; i < ED_PAGE_SIZE; i++)
-			pbuf0[i] = 0;
-
-		/* Search for the start of RAM. */
-		for (x = 1; x < 256; x++) {
-			ed_pio_writemem(sc, pbuf0, x << ED_PAGE_SHIFT, ED_PAGE_SIZE);
-			ed_pio_readmem(sc, x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE);
-			if (!bcmp(pbuf0, tbuf, ED_PAGE_SIZE)) {
-				for (i = 0; i < ED_PAGE_SIZE; i++)
-					pbuf[i] = 255 - x;
-				ed_pio_writemem(sc, pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE);
-				ed_pio_readmem(sc, x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE);
-				if (!bcmp(pbuf, tbuf, ED_PAGE_SIZE)) {
-					mstart = x << ED_PAGE_SHIFT;
-					memsize = ED_PAGE_SIZE;
-					break;
-				}
-			}
-		}
-
-		if (mstart == 0) {
-			printf("%s: cannot find start of RAM\n",
-			    sc->sc_dev.dv_xname);
-			goto err;
-		}
-
-		/* Search for the end of RAM. */
-		for (++x; x < 256; x++) {
-			ed_pio_writemem(sc, pbuf0, x << ED_PAGE_SHIFT, ED_PAGE_SIZE);
-			ed_pio_readmem(sc, x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE);
-			if (!bcmp(pbuf0, tbuf, ED_PAGE_SIZE)) {
-				for (i = 0; i < ED_PAGE_SIZE; i++)
-					pbuf[i] = 255 - x;
-				ed_pio_writemem(sc, pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE);
-				ed_pio_readmem(sc, x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE);
-				if (!bcmp(pbuf, tbuf, ED_PAGE_SIZE))
-					memsize += ED_PAGE_SIZE;
-				else
-					break;
-			} else
-				break;
-		}
-
-		printf("%s: RAM start %x, size %d\n",
-		    sc->sc_dev.dv_xname, mstart, memsize);
-
-		sc->mem_start = (caddr_t)mstart;
-		sc->tx_page_start = mstart >> ED_PAGE_SHIFT;
-	}
-#endif /* GWETHER */
-
-	sc->mem_size = memsize;
-	sc->mem_end = sc->mem_start + memsize;
-
-	/*
-	 * Use one xmit buffer if < 16k, two buffers otherwise (if not told
-	 * otherwise).
-	 */
-	if ((memsize < 16384) || (cf->cf_flags & ED_FLAGS_NO_MULTI_BUFFERING))
-		sc->txb_cnt = 1;
-	else
-		sc->txb_cnt = 2;
-
-	sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
-	sc->rec_page_stop = sc->tx_page_start + (memsize >> ED_PAGE_SHIFT);
-
-	sc->mem_ring =
-	    sc->mem_start + ((sc->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT);
-
-	ed_pio_readmem(sc, 0, romdata, 16);
-	for (n = 0; n < ETHER_ADDR_LEN; n++)
-		sc->sc_arpcom.ac_enaddr[n] = romdata[n*(sc->isa16bit+1)];
-
-#ifdef GWETHER
-	if (sc->arpcom.ac_enaddr[2] == 0x86)
-		sc->type_str = "Gateway AT";
-#endif /* GWETHER */
-
-	/* Clear any pending interrupts that might have occurred above. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_ISR, 0xff);
-
-	ia->ia_iosize = ED_NOVELL_IO_PORTS;
-
-	/*
-	 * XXX Sould always unmap, but we can't yet.
-	 * XXX Need to squish "indirect" first.
-	 */
-	sc->sc_iot = iot;
-	sc->sc_ioh = ioh;
-	/* sc_memh is not used by this driver */
-	return 1;
- out:
-	bus_space_unmap(iot, ioh, ED_NOVELL_IO_PORTS);
-
-	return 0;
-}
-
-/*
- * Install interface into kernel networking data structures.
- */
-void
-edattach(parent, self, aux)
-	struct device *parent, *self;
-	void *aux;
-{
-	bus_space_tag_t iot;
-	bus_space_handle_t ioh;
-	struct ed_softc *sc = (void *)self;
-	struct isa_attach_args *ia = aux;
-	struct cfdata *cf = sc->sc_dev.dv_cfdata;
-	struct ifnet *ifp = &sc->sc_arpcom.ac_if;
-	int asicbase;
-
-	/*
-	 * XXX Should re-map io and mem, but can't
-	 * XXX until we squish "indirect" brokenness.
-	 */
-	iot = sc->sc_iot;		/* XXX */
-	ioh = sc->sc_ioh;		/* XXX */
-
-	asicbase = sc->asic_base;
-	sc->sc_delaybah = ia->ia_delaybah;
-
-	/* Set interface to stopped condition (reset). */
-	edstop(sc);
-
-	/* Initialize ifnet structure. */
-	bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
-	ifp->if_softc = sc;
-	ifp->if_start = edstart;
-	ifp->if_ioctl = edioctl;
-	ifp->if_watchdog = edwatchdog;
-	ifp->if_flags =
-	    IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
-	IFQ_SET_READY(&ifp->if_snd);
-
-	/*
-	 * Set default state for LINK0 flag (used to disable the transceiver
-	 * for AUI operation), based on compile-time config option.
-	 */
-	switch (sc->vendor) {
-	case ED_VENDOR_3COM:
-		if (cf->cf_flags & ED_FLAGS_DISABLE_TRANSCEIVER)
-			ifp->if_flags |= IFF_LINK0;
-		break;
-	case ED_VENDOR_WD_SMC:
-		if ((sc->type & ED_WD_SOFTCONFIG) == 0)
-			break;
-		if ((bus_space_read_1(iot, ioh, asicbase + ED_WD_IRR) &
-		    ED_WD_IRR_OUT2) == 0)
-			ifp->if_flags |= IFF_LINK0;
-		break;
-	}
-
-	/* Attach the interface. */
-	if ((sc->spec_flags & ED_REATTACH) == 0) {
-		if_attach(ifp);
-		ether_ifattach(ifp);
-	}
-	ether_ifattach(ifp);
-
-	/* Print additional info when attached. */
-	printf(": address %s, ", ether_sprintf(sc->sc_arpcom.ac_enaddr));
-
-	if (sc->type_str)
-		printf("type %s ", sc->type_str);
-	else
-		printf("type unknown (0x%x) ", sc->type);
-
-	printf("%s", sc->isa16bit ? "(16-bit)" : "(8-bit)");
-
-	switch (sc->vendor) {
-	case ED_VENDOR_WD_SMC:
-		if ((sc->type & ED_WD_SOFTCONFIG) == 0)
-			break;
-	case ED_VENDOR_3COM:
-		if (ifp->if_flags & IFF_LINK0)
-			printf(" aui");
-		else
-			printf(" bnc");
-		break;
-	}
-
-	printf("\n");
-
-	sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
-	    IPL_NET, edintr, sc, sc->sc_dev.dv_xname);
-	sc->sc_sh = shutdownhook_establish((void (*)(void *))edstop, sc);
-}
-
-/*
- * Reset interface.
- */
-void
-edreset(sc)
-	struct ed_softc *sc;
-{
-	int s;
-
-	s = splnet();
-	edstop(sc);
-	edinit(sc);
-	splx(s);
-}
-
-/*
- * Take interface offline.
- */
-void
-edstop(sc)
-	struct ed_softc *sc;
-{
-	bus_space_tag_t iot = sc->sc_iot;
-	bus_space_handle_t ioh = sc->sc_ioh;
-	int nicbase = sc->nic_base;
-	int n = 5000;
-
-	/* Stop everything on the interface, and select page 0 registers. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STP);
-
-	/*
-	 * Wait for interface to enter stopped state, but limit # of checks to
-	 * 'n' (about 5ms).  It shouldn't even take 5us on modern DS8390's, but
-	 * just in case it's an old one.
-	 */
-	while (((NIC_GET(iot, ioh, nicbase,
-	    ED_P0_ISR) & ED_ISR_RST) == 0) && --n);
-}
-
-/*
- * Device timeout/watchdog routine.  Entered if the device neglects to generate
- * an interrupt after a transmit has been started on it.
- */
-void
-edwatchdog(ifp)
-	struct ifnet *ifp;
-{
-	struct ed_softc *sc = ifp->if_softc;
-
-	log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
-	++sc->sc_arpcom.ac_if.if_oerrors;
-
-	edreset(sc);
-}
-
-/*
- * Initialize device.
- */
-void
-edinit(sc)
-	struct ed_softc *sc;
-{
-	bus_space_tag_t iot = sc->sc_iot;
-	bus_space_handle_t ioh = sc->sc_ioh;
-	struct ifnet *ifp = &sc->sc_arpcom.ac_if;
-	int nicbase = sc->nic_base, asicbase = sc->asic_base;
-	int i;
-	u_int32_t mcaf[2];
-
-	/*
-	 * Initialize the NIC in the exact order outlined in the NS manual.
-	 * This init procedure is "mandatory"...don't change what or when
-	 * things happen.
-	 */
-
-	/* Reset transmitter flags. */
-	ifp->if_timer = 0;
-
-	sc->txb_inuse = 0;
-	sc->txb_new = 0;
-	sc->txb_next_tx = 0;
-
-	/* Set interface for page 0, remote DMA complete, stopped. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STP);
-
-	if (sc->isa16bit) {
-		/*
-		 * Set FIFO threshold to 8, No auto-init Remote DMA, byte
-		 * order=80x86, word-wide DMA xfers,
-		 */
-		NIC_PUT(iot, ioh, nicbase, ED_P0_DCR,
-		    ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS);
-	} else {
-		/* Same as above, but byte-wide DMA xfers. */
-		NIC_PUT(iot, ioh, nicbase, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
-	}
-
-	/* Clear remote byte count registers. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RBCR0, 0);
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RBCR1, 0);
-
-	/* Tell RCR to do nothing for now. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RCR, ED_RCR_MON);
-
-	/* Place NIC in internal loopback mode. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_TCR, ED_TCR_LB0);
-
-	/* Set lower bits of byte addressable framing to 0. */
-	if (sc->is790)
-		NIC_PUT(iot, ioh, nicbase, 0x09, 0);
-
-	/* Initialize receive buffer ring. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_BNRY, sc->rec_page_start);
-	NIC_PUT(iot, ioh, nicbase, ED_P0_PSTART, sc->rec_page_start);
-	NIC_PUT(iot, ioh, nicbase, ED_P0_PSTOP, sc->rec_page_stop);
-
-	/*
-	 * Clear all interrupts.  A '1' in each bit position clears the
-	 * corresponding flag.
-	 */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_ISR, 0xff);
-
-	/*
-	 * Enable the following interrupts: receive/transmit complete,
-	 * receive/transmit error, and Receiver OverWrite.
-	 *
-	 * Counter overflow and Remote DMA complete are *not* enabled.
-	 */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_IMR,
-	    ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE |
-	    ED_IMR_OVWE);
-
-	/* Program command register for page 1. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
-
-	/* Copy out our station address. */
-	for (i = 0; i < ETHER_ADDR_LEN; ++i)
-		NIC_PUT(iot, ioh, nicbase, ED_P1_PAR0 + i,
-		    sc->sc_arpcom.ac_enaddr[i]);
-
-	/* Set multicast filter on chip. */
-	ed_getmcaf(&sc->sc_arpcom, mcaf);
-	for (i = 0; i < 8; i++)
-		NIC_PUT(iot, ioh, nicbase, ED_P1_MAR0 + i,
-		    ((u_char *)mcaf)[i]);
-
-	/*
-	 * Set current page pointer to one page after the boundary pointer, as
-	 * recommended in the National manual.
-	 */
-	sc->next_packet = sc->rec_page_start + 1;
-	NIC_PUT(iot, ioh, nicbase, ED_P1_CURR, sc->next_packet);
-
-	/* Program command register for page 0. */
-	NIC_PUT(iot, ioh, nicbase, ED_P1_CR,
-	    sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STP);
-
-	i = ED_RCR_AB | ED_RCR_AM;
-	if (ifp->if_flags & IFF_PROMISC) {
-		/*
-		 * Set promiscuous mode.  Multicast filter was set earlier so
-		 * that we should receive all multicast packets.
-		 */
-		i |= ED_RCR_PRO | ED_RCR_AR | ED_RCR_SEP;
-	}
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RCR, i);
-
-	/* Take interface out of loopback. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_TCR, 0);
-
-	/*
-	 * If this is a 3Com board, the transceiver must be software enabled
-	 * (there is no settable hardware default).
-	 */
-	switch (sc->vendor) {
-		u_char x;
-	case ED_VENDOR_3COM:
-		if (ifp->if_flags & IFF_LINK0)
-			bus_space_write_1(iot, ioh, asicbase + ED_3COM_CR, 0);
-		else
-			bus_space_write_1(iot, ioh, asicbase + ED_3COM_CR,
-			    ED_3COM_CR_XSEL);
-		break;
-	case ED_VENDOR_WD_SMC:
-		if ((sc->type & ED_WD_SOFTCONFIG) == 0)
-			break;
-		x = bus_space_read_1(iot, ioh, asicbase + ED_WD_IRR);
-		if (ifp->if_flags & IFF_LINK0)
-			x &= ~ED_WD_IRR_OUT2;
-		else
-			x |= ED_WD_IRR_OUT2;
-		bus_space_write_1(iot, ioh, asicbase + ED_WD_IRR, x);
-		break;
-	}
-
-	/* Fire up the interface. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STA);
-
-	/* Set 'running' flag, and clear output active flag. */
-	ifp->if_flags |= IFF_RUNNING;
-	ifp->if_flags &= ~IFF_OACTIVE;
-
-	/* ...and attempt to start output. */
-	edstart(ifp);
-}
-
-/*
- * This routine actually starts the transmission on the interface.
- */
-static __inline void
-ed_xmit(sc)
-	struct ed_softc *sc;
-{
-	bus_space_tag_t iot = sc->sc_iot;
-	bus_space_handle_t ioh = sc->sc_ioh;
-	struct ifnet *ifp = &sc->sc_arpcom.ac_if;
-	int nicbase = sc->nic_base;
-	u_int16_t len;
-
-	len = sc->txb_len[sc->txb_next_tx];
-
-	/* Set NIC for page 0 register access. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STA);
-
-	/* Set TX buffer start page. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_TPSR, sc->tx_page_start +
-	    sc->txb_next_tx * ED_TXBUF_SIZE);
-
-	/* Set TX length. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_TBCR0, len);
-	NIC_PUT(iot, ioh, nicbase, ED_P0_TBCR1, len >> 8);
-
-	/* Set page 0, remote DMA complete, transmit packet, and *start*. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    sc->cr_proto | ED_CR_PAGE_0 | ED_CR_TXP | ED_CR_STA);
-
-	/* Point to next transmit buffer slot and wrap if necessary. */
-	sc->txb_next_tx++;
-	if (sc->txb_next_tx == sc->txb_cnt)
-		sc->txb_next_tx = 0;
-
-	/* Set a timer just in case we never hear from the board again. */
-	ifp->if_timer = 2;
-}
-
-/*
- * Start output on interface.
- * We make two assumptions here:
- *  1) that the current priority is set to splnet _before_ this code
- *     is called *and* is returned to the appropriate priority after
- *     return
- *  2) that the IFF_OACTIVE flag is checked before this code is called
- *     (i.e. that the output part of the interface is idle)
- */
-void
-edstart(ifp)
-	struct ifnet *ifp;
-{
-	struct ed_softc *sc = ifp->if_softc;
-	bus_space_tag_t iot = sc->sc_iot;
-	bus_space_handle_t ioh = sc->sc_ioh;
-	struct mbuf *m0, *m;
-	int buffer;
-	int asicbase = sc->asic_base;
-	int len;
-
-	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
-		return;
-
-outloop:
-	/* See if there is room to put another packet in the buffer. */
-	if (sc->txb_inuse == sc->txb_cnt) {
-		/* No room.  Indicate this to the outside world and exit. */
-		ifp->if_flags |= IFF_OACTIVE;
-		return;
-	}
-
-	IFQ_DEQUEUE(&ifp->if_snd, m0);
-	if (m0 == 0)
-		return;
-
-	/* We need to use m->m_pkthdr.len, so require the header */
-	if ((m0->m_flags & M_PKTHDR) == 0)
-		panic("edstart: no header mbuf");
-
-#if NBPFILTER > 0
-	/* Tap off here if there is a BPF listener. */
-	if (ifp->if_bpf)
-		bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT);
-#endif
-
-	/* txb_new points to next open buffer slot. */
-	buffer = sc->mem_start +
-	    ((sc->txb_new * ED_TXBUF_SIZE) << ED_PAGE_SHIFT);
-
-	if (sc->mem_shared) {
-		/* Special case setup for 16 bit boards... */
-		switch (sc->vendor) {
-		/*
-		 * For 16bit 3Com boards (which have 16k of memory), we
-		 * have the xmit buffers in a different page of memory
-		 * ('page 0') - so change pages.
-		 */
-		case ED_VENDOR_3COM:
-			if (sc->isa16bit)
-				bus_space_write_1(iot, ioh,
-				    asicbase + ED_3COM_GACFR,
-				    ED_3COM_GACFR_RSEL);
-			break;
-		/*
-		 * Enable 16bit access to shared memory on WD/SMC
-		 * boards.
-		 */
-		case ED_VENDOR_WD_SMC:
-			if (sc->isa16bit)
-				bus_space_write_1(iot, ioh, asicbase + ED_WD_LAAR,
-				    sc->wd_laar_proto | ED_WD_LAAR_M16EN);
-			bus_space_write_1(iot, ioh, asicbase + ED_WD_MSR,
-			    sc->wd_msr_proto | ED_WD_MSR_MENB);
-			(void) bus_space_read_1(iot, sc->sc_delaybah, 0);
-			(void) bus_space_read_1(iot, sc->sc_delaybah, 0);
-			break;
-		}
-
-		for (m = m0; m != 0; m = m->m_next) {
-			ed_shared_writemem(sc, mtod(m, caddr_t), buffer,
-			    m->m_len);
-			buffer += m->m_len;
-		}
-		len = m0->m_pkthdr.len;
-
-		/* Restore previous shared memory access. */
-		switch (sc->vendor) {
-		case ED_VENDOR_3COM:
-			if (sc->isa16bit)
-				bus_space_write_1(iot, ioh,
-				    asicbase + ED_3COM_GACFR,
-				    ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0);
-			break;
-		case ED_VENDOR_WD_SMC:
-			bus_space_write_1(iot, ioh, asicbase + ED_WD_MSR,
-			    sc->wd_msr_proto);
-			if (sc->isa16bit)
-				bus_space_write_1(iot, ioh, asicbase + ED_WD_LAAR,
-				    sc->wd_laar_proto);
-			(void) bus_space_read_1(iot, sc->sc_delaybah, 0);
-			(void) bus_space_read_1(iot, sc->sc_delaybah, 0);
-			break;
-		}
-	} else
-		len = ed_pio_write_mbufs(sc, m0, (u_int16_t)buffer);
-
-	m_freem(m0);
-	sc->txb_len[sc->txb_new] = max(len, ETHER_MIN_LEN);
-
-	/* Start the first packet transmitting. */
-	if (sc->txb_inuse == 0)
-		ed_xmit(sc);
-
-	/* Point to next buffer slot and wrap if necessary. */
-	if (++sc->txb_new == sc->txb_cnt)
-		sc->txb_new = 0;
-	sc->txb_inuse++;
-
-	/* Loop back to the top to possibly buffer more packets. */
-	goto outloop;
-}
-
-/*
- * Ethernet interface receiver interrupt.
- */
-static __inline void
-ed_rint(sc)
-	struct ed_softc *sc;
-{
-	bus_space_tag_t iot = sc->sc_iot;
-	bus_space_handle_t ioh = sc->sc_ioh;
-	int nicbase = sc->nic_base;
-	u_int8_t boundary, current;
-	u_int16_t len;
-	u_int8_t nlen;
-	u_int8_t next_packet;		/* pointer to next packet */
-	u_int16_t count;		/* bytes in packet (length + 4) */
-	u_int8_t packet_hdr[ED_RING_HDRSZ];
-	int packet_ptr;
-
-loop:
-	/* Set NIC to page 1 registers to get 'current' pointer. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
-
-	/*
-	 * 'sc->next_packet' is the logical beginning of the ring-buffer - i.e.
-	 * it points to where new data has been buffered.  The 'CURR' (current)
-	 * register points to the logical end of the ring-buffer - i.e. it
-	 * points to where additional new data will be added.  We loop here
-	 * until the logical beginning equals the logical end (or in other
-	 * words, until the ring-buffer is empty).
-	 */
-	current = NIC_GET(iot, ioh, nicbase, ED_P1_CURR);
-	if (sc->next_packet == current)
-		return;
-
-	/* Set NIC to page 0 registers to update boundary register. */
-	NIC_PUT(iot, ioh, nicbase, ED_P1_CR,
-	    sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STA);
-
-	do {
-		/* Get pointer to this buffer's header structure. */
-		packet_ptr = sc->mem_ring +
-		    ((sc->next_packet - sc->rec_page_start) << ED_PAGE_SHIFT);
-
-		/*
-		 * The byte count includes a 4 byte header that was added by
-		 * the NIC.
-		 */
-		if (sc->mem_shared)
-			ed_shared_readmem(sc, packet_ptr, packet_hdr,
-			    sizeof(packet_hdr));
-		else
-			ed_pio_readmem(sc, (u_int16_t)packet_ptr, packet_hdr,
-			    sizeof(packet_hdr));
-		next_packet = packet_hdr[ED_RING_NEXT_PACKET];
-		len = count = packet_hdr[ED_RING_COUNT] +
-		    256 * packet_hdr[ED_RING_COUNT + 1];
-
-		/*
-		 * Try do deal with old, buggy chips that sometimes duplicate
-		 * the low byte of the length into the high byte.  We do this
-		 * by simply ignoring the high byte of the length and always
-		 * recalculating it.
-		 *
-		 * NOTE: sc->next_packet is pointing at the current packet.
-		 */
-		if (next_packet >= sc->next_packet)
-			nlen = (next_packet - sc->next_packet);
-		else
-			nlen = ((next_packet - sc->rec_page_start) +
-				(sc->rec_page_stop - sc->next_packet));
-		--nlen;
-		if ((len & ED_PAGE_MASK) + sizeof(packet_hdr) > ED_PAGE_SIZE)
-			--nlen;
-		len = (len & ED_PAGE_MASK) | (nlen << ED_PAGE_SHIFT);
-#ifdef DIAGNOSTIC
-		if (len != count) {
-			printf("%s: length does not match next packet pointer\n",
-			    sc->sc_dev.dv_xname);
-			printf("%s: len %04x nlen %04x start %02x first %02x curr %02x next %02x stop %02x\n",
-			    sc->sc_dev.dv_xname, count, len,
-			    sc->rec_page_start, sc->next_packet, current,
-			    next_packet, sc->rec_page_stop);
-		}
-#endif
-
-		/*
-		 * Be fairly liberal about what we allow as a "reasonable"
-		 * length so that a [crufty] packet will make it to BPF (and
-		 * can thus be analyzed).  Note that all that is really
-		 * important is that we have a length that will fit into one
-		 * mbuf cluster or less; the upper layer protocols can then
-		 * figure out the length from their own length field(s).
-		 */
-		if (len <= MCLBYTES &&
-		    next_packet >= sc->rec_page_start &&
-		    next_packet < sc->rec_page_stop) {
-			/* Go get packet. */
-			edread(sc, packet_ptr + ED_RING_HDRSZ,
-			    len - ED_RING_HDRSZ);
-		} else {
-			/* Really BAD.  The ring pointers are corrupted. */
-			log(LOG_ERR,
-			    "%s: NIC memory corrupt - invalid packet length %d\n",
-			    sc->sc_dev.dv_xname, len);
-			++sc->sc_arpcom.ac_if.if_ierrors;
-			edreset(sc);
-			return;
-		}
-
-		/* Update next packet pointer. */
-		sc->next_packet = next_packet;
-
-		/*
-		 * Update NIC boundary pointer - being careful to keep it one
-		 * buffer behind (as recommended by NS databook).
-		 */
-		boundary = sc->next_packet - 1;
-		if (boundary < sc->rec_page_start)
-			boundary = sc->rec_page_stop - 1;
-		NIC_PUT(iot, ioh, nicbase, ED_P0_BNRY, boundary);
-	} while (sc->next_packet != current);
-
-	goto loop;
-}
-
-/* Ethernet interface interrupt processor. */
-int
-edintr(arg)
-	void *arg;
-{
-	struct ed_softc *sc = arg;
-	bus_space_tag_t iot = sc->sc_iot;
-	bus_space_handle_t ioh = sc->sc_ioh;
-	struct ifnet *ifp = &sc->sc_arpcom.ac_if;
-	int nicbase = sc->nic_base, asicbase = sc->asic_base;
-	u_char isr;
-
-	/* Set NIC to page 0 registers. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STA);
-
-	isr = NIC_GET(iot, ioh, nicbase, ED_P0_ISR);
-	if (!isr)
-		return (0);
-
-	/* Loop until there are no more new interrupts. */
-	for (;;) {
-		/*
-		 * Reset all the bits that we are 'acknowledging' by writing a
-		 * '1' to each bit position that was set.
-		 * (Writing a '1' *clears* the bit.)
-		 */
-		NIC_PUT(iot, ioh, nicbase, ED_P0_ISR, isr);
-
-		/*
-		 * Handle transmitter interrupts.  Handle these first because
-		 * the receiver will reset the board under some conditions.
-		 */
-		if (isr & (ED_ISR_PTX | ED_ISR_TXE)) {
-			u_char collisions = NIC_GET(iot, ioh, nicbase,
-			    ED_P0_NCR) & 0x0f;
-
-			/*
-			 * Check for transmit error.  If a TX completed with an
-			 * error, we end up throwing the packet away.  Really
-			 * the only error that is possible is excessive
-			 * collisions, and in this case it is best to allow the
-			 * automatic mechanisms of TCP to backoff the flow.  Of
-			 * course, with UDP we're screwed, but this is expected
-			 * when a network is heavily loaded.
-			 */
-			(void) NIC_GET(iot, ioh, nicbase, ED_P0_TSR);
-			if (isr & ED_ISR_TXE) {
-				/*
-				 * Excessive collisions (16).
-				 */
-				if ((NIC_GET(iot, ioh, nicbase, ED_P0_TSR) &
-				    ED_TSR_ABT) && (collisions == 0)) {
-					/*
-					 * When collisions total 16, the P0_NCR
-					 * will indicate 0, and the TSR_ABT is
-					 * set.
-					 */
-					collisions = 16;
-				}
-
-				/* Update output errors counter. */
-				++ifp->if_oerrors;
-			} else {
-				/*
-				 * Update total number of successfully
-				 * transmitted packets.
-				 */
-				++ifp->if_opackets;
-			}
-
-			/* Done with the buffer. */
-			sc->txb_inuse--;
-
-			/* Clear watchdog timer. */
-			ifp->if_timer = 0;
-			ifp->if_flags &= ~IFF_OACTIVE;
-
-			/*
-			 * Add in total number of collisions on last
-			 * transmission.
-			 */
-			ifp->if_collisions += collisions;
-
-			/*
-			 * Decrement buffer in-use count if not zero (can only
-			 * be zero if a transmitter interrupt occurred while not
-			 * actually transmitting).
-			 * If data is ready to transmit, start it transmitting,
-			 * otherwise defer until after handling receiver.
-			 */
-			if (sc->txb_inuse > 0)
-				ed_xmit(sc);
-		}
-
-		/* Handle receiver interrupts. */
-		if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) {
-			/*
-			 * Overwrite warning.  In order to make sure that a
-			 * lockup of the local DMA hasn't occurred, we reset
-			 * and re-init the NIC.  The NSC manual suggests only a
-			 * partial reset/re-init is necessary - but some chips
-			 * seem to want more.  The DMA lockup has been seen
-			 * only with early rev chips - Methinks this bug was
-			 * fixed in later revs.  -DG
-			 */
-			if (isr & ED_ISR_OVW) {
-				++ifp->if_ierrors;
-#ifdef DIAGNOSTIC
-				log(LOG_WARNING,
-				    "%s: warning - receiver ring buffer overrun\n",
-				    sc->sc_dev.dv_xname);
-#endif
-				/* Stop/reset/re-init NIC. */
-				edreset(sc);
-			} else {
-				/*
-				 * Receiver Error.  One or more of: CRC error,
-				 * frame alignment error FIFO overrun, or
-				 * missed packet.
-				 */
-				if (isr & ED_ISR_RXE) {
-					++ifp->if_ierrors;
-#ifdef ED_DEBUG
-					printf("%s: receive error %x\n",
-					    sc->sc_dev.dv_xname,
-					    NIC_GET(iot,ioh,nicbase,ED_P0_RSR));
-#endif
-				}
-
-				/*
-				 * Go get the packet(s).
-				 * XXX - Doing this on an error is dubious
-				 * because there shouldn't be any data to get
-				 * (we've configured the interface to not
-				 * accept packets with errors).
-				 */
-
-				/*
-				 * Enable 16bit access to shared memory first
-				 * on WD/SMC boards.
-				 */
-				if (sc->vendor == ED_VENDOR_WD_SMC) {
-					if (sc->isa16bit)
-						bus_space_write_1(iot, ioh,
-						    asicbase + ED_WD_LAAR,
-						    sc->wd_laar_proto |
-						    ED_WD_LAAR_M16EN);
-					bus_space_write_1(iot, ioh,
-					    asicbase + ED_WD_MSR,
-					    sc->wd_msr_proto | ED_WD_MSR_MENB);
-					(void) bus_space_read_1(iot,
-					    sc->sc_delaybah, 0);
-					(void) bus_space_read_1(iot,
-					    sc->sc_delaybah, 0);
-				}
-
-				ed_rint(sc);
-
-				/* Disable 16-bit access. */
-				if (sc->vendor == ED_VENDOR_WD_SMC) {
-					bus_space_write_1(iot, ioh,
-					    asicbase + ED_WD_MSR,
-					    sc->wd_msr_proto);
-					if (sc->isa16bit)
-						bus_space_write_1(iot, ioh,
-						    asicbase + ED_WD_LAAR,
-						    sc->wd_laar_proto);
-					(void) bus_space_read_1(iot,
-					    sc->sc_delaybah, 0);
-					(void) bus_space_read_1(iot,
-					    sc->sc_delaybah, 0);
-				}
-			}
-		}
-
-		/*
-		 * If it looks like the transmitter can take more data,	attempt
-		 * to start output on the interface.  This is done after
-		 * handling the receiver to give the receiver priority.
-		 */
-		edstart(ifp);
-
-		/*
-		 * Return NIC CR to standard state: page 0, remote DMA
-		 * complete, start (toggling the TXP bit off, even if was just
-		 * set in the transmit routine, is *okay* - it is 'edge'
-		 * triggered from low to high).
-		 */
-		NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-		    sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STA);
-
-		/*
-		 * If the Network Talley Counters overflow, read them to reset
-		 * them.  It appears that old 8390's won't clear the ISR flag
-		 * otherwise - resulting in an infinite loop.
-		 */
-		if (isr & ED_ISR_CNT) {
-			(void) NIC_GET(iot, ioh, nicbase, ED_P0_CNTR0);
-			(void) NIC_GET(iot, ioh, nicbase, ED_P0_CNTR1);
-			(void) NIC_GET(iot, ioh, nicbase, ED_P0_CNTR2);
-		}
-
-		isr = NIC_GET(iot, ioh, nicbase, ED_P0_ISR);
-		if (!isr)
-			return (1);
-	}
-}
-
-/*
- * Process an ioctl request.  This code needs some work - it looks pretty ugly.
- */
-int
-edioctl(ifp, cmd, data)
-	register struct ifnet *ifp;
-	u_long cmd;
-	caddr_t data;
-{
-	struct ed_softc *sc = ifp->if_softc;
-	register struct ifaddr *ifa = (struct ifaddr *)data;
-	struct ifreq *ifr = (struct ifreq *)data;
-	int s, error = 0;
-
-	s = splnet();
-	if ((sc->spec_flags & ED_NOTPRESENT) != 0) {
-		if_down(ifp);
-		printf("%s: device offline\n", sc->sc_dev.dv_xname);
-		splx(s);
-		return ENXIO;		/* may be ignored, oh well. */
-	}
-
-	if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
-		splx(s);
-		return error;
-	}
-
-	switch (cmd) {
-
-	case SIOCSIFADDR:
-		ifp->if_flags |= IFF_UP;
-
-		switch (ifa->ifa_addr->sa_family) {
-#ifdef INET
-		case AF_INET:
-			edinit(sc);
-			arp_ifinit(&sc->sc_arpcom, ifa);
-			break;
-#endif
-		default:
-			edinit(sc);
-			break;
-		}
-		break;
-
-	case SIOCSIFFLAGS:
-		if ((ifp->if_flags & IFF_UP) == 0 &&
-		    (ifp->if_flags & IFF_RUNNING) != 0) {
-			/*
-			 * If interface is marked down and it is running, then
-			 * stop it.
-			 */
-			edstop(sc);
-			ifp->if_flags &= ~IFF_RUNNING;
-		} else if ((ifp->if_flags & IFF_UP) != 0 &&
-		    	   (ifp->if_flags & IFF_RUNNING) == 0) {
-			/*
-			 * If interface is marked up and it is stopped, then
-			 * start it.
-			 */
-			edinit(sc);
-		} else {
-			/*
-			 * Reset the interface to pick up changes in any other
-			 * flags that affect hardware registers.
-			 */
-			edstop(sc);
-			edinit(sc);
-		}
-		break;
-
-	case SIOCADDMULTI:
-	case SIOCDELMULTI:
-		/* Update our multicast list. */
-		error = (cmd == SIOCADDMULTI) ?
-		    ether_addmulti(ifr, &sc->sc_arpcom) :
-		    ether_delmulti(ifr, &sc->sc_arpcom);
-
-		if (error == ENETRESET) {
-			/*
-			 * Multicast list has changed; set the hardware filter
-			 * accordingly.
-			 */
-			if (ifp->if_flags & IFF_RUNNING) {
-				edstop(sc);	/* XXX for ds_setmcaf? */
-				edinit(sc);
-			}
-			error = 0;
-		}
-		break;
-
-	default:
-		error = EINVAL;
-		break;
-	}
-
-	splx(s);
-	return (error);
-}
-
-/*
- * Retreive packet from shared memory and send to the next level up via
- * ether_input_mbuf().  If there is a BPF listener, give a copy to BPF, too.
- */
-void
-edread(sc, buf, len)
-	struct ed_softc *sc;
-	int buf, len;
-{
-	struct ifnet *ifp = &sc->sc_arpcom.ac_if;
-	struct mbuf *m;
-
-	/* Pull packet off interface. */
-	m = edget(sc, buf, len);
-	if (m == 0) {
-		ifp->if_ierrors++;
-		return;
-	}
-
-	ifp->if_ipackets++;
-
-#if NBPFILTER > 0
-	/*
-	 * Check if there's a BPF listener on this interface.
-	 * If so, hand off the raw packet to BPF.
-	 */
-	if (ifp->if_bpf)
-		bpf_mtap(ifp->if_bpf, m, BPF_DIRECTION_IN);
-#endif
-
-	ether_input_mbuf(ifp, m);
-}
-
-/*
- * Supporting routines.
- */
-
-/*
- * Given a NIC memory source address and a host memory destination address,
- * copy 'amount' from NIC to host using Programmed I/O.  The 'amount' is
- * rounded up to a word - okay as long as mbufs are word sized.
- * This routine is currently Novell-specific.
- */
-void
-ed_pio_readmem(sc, src, dst, amount)
-	struct ed_softc *sc;
-	u_int16_t src;
-	caddr_t dst;
-	u_int16_t amount;
-{
-	bus_space_tag_t iot = sc->sc_iot;
-	bus_space_handle_t ioh = sc->sc_ioh;
-	int nicbase = sc->nic_base;
-
-	/* Select page 0 registers. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
-
-	/* Round up to a word. */
-	if (amount & 1)
-		++amount;
-
-	/* Set up DMA byte count. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RBCR0, amount);
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RBCR1, amount >> 8);
-
-	/* Set up source address in NIC mem. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RSAR0, src);
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RSAR1, src >> 8);
-
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA);
-
-	if (sc->isa16bit)
-		bus_space_read_raw_multi_2(iot, ioh,
-		    sc->asic_base + ED_NOVELL_DATA, dst, amount);
-	else
-		bus_space_read_multi_1(iot, ioh,
-		    sc->asic_base + ED_NOVELL_DATA, dst, amount);
-}
-
-/*
- * Stripped down routine for writing a linear buffer to NIC memory.  Only used
- * in the probe routine to test the memory.  'len' must be even.
- */
-void
-ed_pio_writemem(sc, src, dst, len)
-	struct ed_softc *sc;
-	caddr_t src;
-	u_int16_t dst;
-	u_int16_t len;
-{
-	bus_space_tag_t iot = sc->sc_iot;
-	bus_space_handle_t ioh = sc->sc_ioh;
-	int nicbase = sc->nic_base;
-	int maxwait = 100; /* about 120us */
-
-	/* Select page 0 registers. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
-
-	/* Reset remote DMA complete flag. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_ISR, ED_ISR_RDC);
-
-	/* Set up DMA byte count. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RBCR0, len);
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RBCR1, len >> 8);
-
-	/* Set up destination address in NIC mem. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RSAR0, dst);
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RSAR1, dst >> 8);
-
-	/* Set remote DMA write. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
-
-	if (sc->isa16bit)
-		bus_space_write_raw_multi_2(iot, ioh,
-		    sc->asic_base + ED_NOVELL_DATA, src, len);
-	else
-		bus_space_write_multi_1(iot, ioh,
-		    sc->asic_base + ED_NOVELL_DATA, src, len);
-
-	/*
-	 * Wait for remote DMA complete.  This is necessary because on the
-	 * transmit side, data is handled internally by the NIC in bursts and
-	 * we can't start another remote DMA until this one completes.  Not
-	 * waiting causes really bad things to happen - like the NIC
-	 * irrecoverably jamming the ISA bus.
-	 */
-	while (((NIC_GET(iot, ioh, nicbase, ED_P0_ISR) & ED_ISR_RDC) !=
-	    ED_ISR_RDC) && --maxwait);
-}
-
-/*
- * Write an mbuf chain to the destination NIC memory address using programmed
- * I/O.
- */
-u_int16_t
-ed_pio_write_mbufs(sc, m, dst)
-	struct ed_softc *sc;
-	struct mbuf *m;
-	u_int16_t dst;
-{
-	bus_space_tag_t iot = sc->sc_iot;
-	bus_space_handle_t ioh = sc->sc_ioh;
-	int nicbase = sc->nic_base, asicbase = sc->asic_base;
-	u_int16_t len;
-	int maxwait = 100; /* about 120us */
-
-	len = m->m_pkthdr.len;
-
-	/* Select page 0 registers. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
-
-	/* Reset remote DMA complete flag. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_ISR, ED_ISR_RDC);
-
-	/* Set up DMA byte count. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RBCR0, len);
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RBCR1, len >> 8);
-
-	/* Set up destination address in NIC mem. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RSAR0, dst);
-	NIC_PUT(iot, ioh, nicbase, ED_P0_RSAR1, dst >> 8);
-
-	/* Set remote DMA write. */
-	NIC_PUT(iot, ioh, nicbase, ED_P0_CR,
-	    ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
-
-	/*
-	 * Transfer the mbuf chain to the NIC memory.
-	 * 16-bit cards require that data be transferred as words, and only
-	 * words, so that case requires some extra code to patch over
-	 * odd-length mbufs.
-	 */
-	if (!sc->isa16bit) {
-		/* NE1000s are easy. */
-		for (; m != 0; m = m->m_next) {
-			if (m->m_len) {
-				bus_space_write_multi_1(iot, ioh,
-				    asicbase + ED_NOVELL_DATA,
-				    mtod(m, u_char *), m->m_len);
-			}
-		}
-	} else {
-		/* NE2000s are a bit trickier. */
-		u_int8_t *data, savebyte[2];
-		int len, wantbyte;
-
-		wantbyte = 0;
-		for (; m != 0; m = m->m_next) {
-			len = m->m_len;
-			if (len == 0)
-				continue;
-			data = mtod(m, u_int8_t *);
-			/* Finish the last word. */
-			if (wantbyte) {
-				savebyte[1] = *data;
-				bus_space_write_raw_multi_2(iot, ioh,
-				    asicbase + ED_NOVELL_DATA, savebyte, 2);
-				data++;
-				len--;
-				wantbyte = 0;
-			}
-			/* Output contiguous words. */
-			if (len > 1) {
-				bus_space_write_raw_multi_2(iot, ioh,
-				    asicbase + ED_NOVELL_DATA, data, len & ~1);
-			}
-			/* Save last byte, if necessary. */
-			if (len & 1) {
-				data += len & ~1;
-				savebyte[0] = *data;
-				wantbyte = 1;
-			}
-		}
-
-		if (wantbyte) {
-			savebyte[1] = 0;
-			bus_space_write_raw_multi_2(iot, ioh,
-			    asicbase + ED_NOVELL_DATA, savebyte, 2);
-		}
-	}
-
-	/*
-	 * Wait for remote DMA complete.  This is necessary because on the
-	 * transmit side, data is handled internally by the NIC in bursts and
-	 * we can't start another remote DMA until this one completes. 	Not
-	 * waiting causes really bad things to happen - like the NIC
-	 * irrecoverably jamming the ISA bus.
-	 */
-	while (((NIC_GET(iot, ioh, nicbase, ED_P0_ISR) & ED_ISR_RDC) !=
-	    ED_ISR_RDC) && --maxwait);
-
-	if (!maxwait) {
-		log(LOG_WARNING,
-		    "%s: remote transmit DMA failed to complete\n",
-		    sc->sc_dev.dv_xname);
-		edreset(sc);
-	}
-
-	return (len);
-}
-
-/*
- * Given a source and destination address, copy 'amount' of a packet from the
- * ring buffer into a linear destination buffer.  Takes into account ring-wrap.
- */
-static __inline int
-ed_ring_copy(sc, src, dst, amount)
-	struct ed_softc *sc;
-	int src;
-	caddr_t dst;
-	u_int16_t amount;
-{
-	u_int16_t tmp_amount;
-
-	/* Does copy wrap to lower addr in ring buffer? */
-	if (src + amount > sc->mem_end) {
-		tmp_amount = sc->mem_end - src;
-
-		/* Copy amount up to end of NIC memory. */
-		if (sc->mem_shared)
-			ed_shared_readmem(sc, src, dst, tmp_amount);
-		else
-			ed_pio_readmem(sc, (u_int16_t)src, dst, tmp_amount);
-
-		amount -= tmp_amount;
-		src = sc->mem_ring;
-		dst += tmp_amount;
-	}
-
-	if (sc->mem_shared)
-		ed_shared_readmem(sc, src, dst, amount);
-	else
-		ed_pio_readmem(sc, (u_int16_t)src, dst, amount);
-
-	return (src + amount);
-}
-
-/*
- * Copy data from receive buffer to end of mbuf chain allocate additional mbufs
- * as needed.  Return pointer to last mbuf in chain.
- * sc = ed info (softc)
- * src = pointer in ed ring buffer
- * totlen = maximum packet size
- */
-struct mbuf *
-edget(sc, src, totlen)
-	struct ed_softc *sc;
-	int src;
-	int totlen;
-{
-	struct ifnet *ifp = &sc->sc_arpcom.ac_if;
-	struct mbuf *top, **mp, *m;
-	int len, pad;
-
-	MGETHDR(m, M_DONTWAIT, MT_DATA);
-	if (m == 0)
-		return 0;
-
-	m->m_pkthdr.rcvif = ifp;
-	m->m_pkthdr.len = totlen;
-	pad = ALIGN(sizeof(struct ether_header)) - sizeof(struct ether_header);
-	m->m_data += pad;
-	len = MHLEN - pad;
-	top = 0;
-	mp = &top;
-
-	while (totlen > 0) {
-		if (top) {
-			MGET(m, M_DONTWAIT, MT_DATA);
-			if (m == 0) {
-				m_freem(top);
-				return 0;
-			}
-			len = MLEN;
-		}
-		if (top && totlen >= MINCLSIZE) {
-			MCLGET(m, M_DONTWAIT);
-			if (m->m_flags & M_EXT)
-				len = MCLBYTES;
-		}
-		m->m_len = len = min(totlen, len);
-		src = ed_ring_copy(sc, src, mtod(m, caddr_t), len);
-		totlen -= len;
-		*mp = m;
-		mp = &m->m_next;
-	}
-
-	return top;
-}
-
-/*
- * Compute the multicast address filter from the list of multicast addresses we
- * need to listen to.
- */
-void
-ed_getmcaf(ac, af)
-	struct arpcom *ac;
-	u_int32_t *af;
-{
-	struct ifnet *ifp = &ac->ac_if;
-	struct ether_multi *enm;
-	register u_int32_t crc;
-	register int i;
-	struct ether_multistep step;
-
-	/*
-	 * Set up multicast address filter by passing all multicast addresses
-	 * through a crc generator, and then using the high order 6 bits as an
-	 * index into the 64 bit logical address filter.  The high order bit
-	 * selects the word, while the rest of the bits select the bit within
-	 * the word.
-	 */
-
-	if (ifp->if_flags & IFF_PROMISC) {
-		ifp->if_flags |= IFF_ALLMULTI;
-		af[0] = af[1] = 0xffffffff;
-		return;
-	}
-
-	af[0] = af[1] = 0;
-	ETHER_FIRST_MULTI(step, ac, enm);
-	while (enm != NULL) {
-		if (bcmp(enm->enm_addrlo, enm->enm_addrhi,
-		    sizeof(enm->enm_addrlo)) != 0) {
-			/*
-			 * We must listen to a range of multicast addresses.
-			 * For now, just accept all multicasts, rather than
-			 * trying to set only those filter bits needed to match
-			 * the range.  (At this time, the only use of address
-			 * ranges is for IP multicast routing, for which the
-			 * range is big enough to require all bits set.)
-			 */
-			ifp->if_flags |= IFF_ALLMULTI;
-			af[0] = af[1] = 0xffffffff;
-			return;
-		}
-
-		/* Just want the 6 most significant bits. */
-		crc = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26;
-
-		/* Turn on the corresponding bit in the filter. */
-		af[crc >> 5] |= 1 << ((crc & 0x1f) ^ 0);
-
-		ETHER_NEXT_MULTI(step, enm);
-	}
-	ifp->if_flags &= ~IFF_ALLMULTI;
-}
-
-void
-ed_shared_writemem(sc, from, card, len)
-	struct ed_softc *sc;
-	caddr_t from;
-	int card, len;
-{
-	bus_space_tag_t memt = sc->sc_memt;
-	bus_space_handle_t memh = sc->sc_memh;
-	u_int16_t word;
-
-	/*
-	 * For 16-bit cards, 16-bit memory access has already
-	 * been set up.  Note that some cards are really picky
-	 * about enforcing 16-bit access to memory, so we
-	 * have to be careful.
-	 */
-	if (sc->isa16bit) {
-		/*
-		 * If writing to an odd location, we need to align first.
-		 * This requires a read-modify-write cycle as we should
-		 * keep accesses 16-bit wide.
-		 */
-		if (len > 0 && (card & 1)) {
-			word = bus_space_read_2(memt, memh, card & ~1);
-			word = (word & 0xff) | (*from << 8);
-			bus_space_write_2(memt, memh, card & ~1, word);
-			from++;
-			card++;
-			len--;
-		}
-		/* XXX I think maybe a bus_space_write_raw_region is needed. */
-		while (len > 1) {
-			word = (u_int8_t)from[0] | (u_int8_t)from[1] << 8;
-			bus_space_write_2(memt, memh, card, word);
-			from += 2;
-			card += 2;
-			len -= 2;
-		}
-		if (len == 1) {
-			word = *from;
-			bus_space_write_2(memt, memh, card, word);
-		}
-	} else {
-		while (len--)
-			bus_space_write_1(memt, memh, card++, *from++);
-	}
-}
-
-void
-ed_shared_readmem(sc, card, to, len)
-	struct ed_softc *sc;
-	caddr_t to;
-	int card, len;
-{
-	bus_space_tag_t memt = sc->sc_memt;
-	bus_space_handle_t memh = sc->sc_memh;
-	u_int16_t word;
-
-	/*
-	 * See comment above re. 16-bit cards.
-	 */
-	if (sc->isa16bit) {
-		/* XXX I think maybe a bus_space_read_raw_region is needed.  */
-		while (len > 1) {
-			word = bus_space_read_2(memt, memh, card);
-			*to++ = word & 0xff;
-			*to++ = word >> 8 & 0xff;
-			card += 2;
-			len -= 2;
-		}
-		if (len == 1)
-			*to = bus_space_read_2(memt, memh, card) & 0xff;
-	} else {
-		while (len--)
-			*to++ = bus_space_read_1(memt, memh, card++);
-	}
-}
diff --git a/sys/dev/isa/if_edreg.h b/sys/dev/isa/if_edreg.h
deleted file mode 100644
index 42c9b544b9f..00000000000
--- a/sys/dev/isa/if_edreg.h
+++ /dev/null
@@ -1,424 +0,0 @@
-/*    $OpenBSD: if_edreg.h,v 1.7 2006/03/04 19:33:21 miod Exp $      */
-/*    $NetBSD: if_edreg.h,v 1.15 1996/01/10 16:49:22 chuck Exp $      */
-
-/*
- * National Semiconductor DS8390 NIC register definitions.
- *
- * Copyright (C) 1993, David Greenman.  This software may be used, modified,
- * copied, distributed, and sold, in both source and binary form provided that
- * the above copyright and these terms are retained.  Under no circumstances is
- * the author responsible for the proper functioning of this software, nor does
- * the author assume any responsibility for damages incurred with its use.
- */
-
-/*
- * Vendor types
- */
-#define ED_VENDOR_WD_SMC	0x00	/* Western Digital/SMC */
-#define ED_VENDOR_3COM		0x01	/* 3Com */
-#define ED_VENDOR_NOVELL	0x02	/* Novell */
-
-/*
- * Compile-time config flags
- */
-/*
- * This sets the default for enabling/disablng the transceiver.
- */
-#define ED_FLAGS_DISABLE_TRANSCEIVER	0x0001
-
-/*
- * This forces the board to be used in 8/16-bit mode even if it autoconfigs
- * differently.
- */
-#define ED_FLAGS_FORCE_8BIT_MODE	0x0002
-#define ED_FLAGS_FORCE_16BIT_MODE	0x0004
-
-/*
- * This disables the use of double transmit buffers.
- */
-#define ED_FLAGS_NO_MULTI_BUFFERING	0x0008
-
-/*
- * This forces all operations with the NIC memory to use Programmed I/O (i.e.
- * not via shared memory).
- */
-#define ED_FLAGS_FORCE_PIO		0x0010
-
-/*
- *		Definitions for Western digital/SMC WD80x3 series ASIC
- */
-/*
- * Memory Select Register (MSR)
- */
-#define ED_WD_MSR	0
-
-/* next three definitions for Toshiba */
-#define	ED_WD_MSR_POW	0x02	/* 0 = power save, 1 = normal (R/W) */
-#define	ED_WD_MSR_BSY	0x04	/* gate array busy (R) */
-#define	ED_WD_MSR_LEN	0x20	/* 0 = 16-bit, 1 = 8-bit (R/W) */
-
-#define ED_WD_MSR_ADDR	0x3f	/* Memory decode bits 18-13 */
-#define ED_WD_MSR_MENB	0x40	/* Memory enable */
-#define ED_WD_MSR_RST	0x80	/* Reset board */
-
-/*
- * Interface Configuration Register (ICR)
- */
-#define ED_WD_ICR	1
-
-#define ED_WD_ICR_16BIT	0x01	/* 16-bit interface */
-#define ED_WD_ICR_OAR	0x02	/* select register (0=BIO 1=EAR) */
-#define ED_WD_ICR_IR2	0x04	/* high order bit of encoded IRQ */
-#define ED_WD_ICR_MSZ	0x08	/* memory size (0=8k 1=32k) */
-#define ED_WD_ICR_RLA	0x10	/* recall LAN address */
-#define ED_WD_ICR_RX7	0x20	/* recall all but i/o and LAN address */
-#define	ED_WD_ICR_RIO	0x40	/* recall i/o address */
-#define ED_WD_ICR_STO	0x80	/* store to non-volatile memory */
-#ifdef TOSH_ETHER
-#define	ED_WD_ICR_MEM	0xe0	/* shared mem address A15-A13 (R/W) */
-#define	ED_WD_ICR_MSZ1	0x0f	/* memory size, 0x08 = 64K, 0x04 = 32K,
-				   0x02 = 16K, 0x01 = 8K */
-				/* 64K can only be used if mem address
-				   above 1MB */
-				/* IAR holds address A23-A16 (R/W) */
-#endif
-
-/*
- * IO Address Register (IAR)
- */
-#define ED_WD_IAR	2
-
-/*
- * EEROM Address Register
- */
-#define ED_WD_EAR	3
-
-/*
- * Interrupt Request Register (IRR)
- */
-#define ED_WD_IRR	4
-
-#define	ED_WD_IRR_0WS	0x01	/* use 0 wait-states on 8 bit bus */
-#define ED_WD_IRR_OUT1	0x02	/* WD83C584 pin 1 output */
-#define ED_WD_IRR_OUT2	0x04	/* WD83C584 pin 2 output */
-#define ED_WD_IRR_OUT3	0x08	/* WD83C584 pin 3 output */
-#define ED_WD_IRR_FLASH	0x10	/* Flash RAM is in the ROM socket */
-
-/*
- * The three bits of the encoded IRQ are decoded as follows:
- *
- * IR2 IR1 IR0  IRQ
- *  0   0   0   2/9
- *  0   0   1   3
- *  0   1   0   5
- *  0   1   1   7
- *  1   0   0   10
- *  1   0   1   11
- *  1   1   0   15
- *  1   1   1   4
- */
-#define ED_WD_IRR_IR0	0x20	/* bit 0 of encoded IRQ */
-#define ED_WD_IRR_IR1	0x40	/* bit 1 of encoded IRQ */
-#define ED_WD_IRR_IEN	0x80	/* Interrupt enable */
-
-/*
- * LA Address Register (LAAR)
- */
-#define ED_WD_LAAR	5
-
-#define ED_WD_LAAR_ADDRHI	0x1f	/* bits 23-19 of RAM address */
-#define ED_WD_LAAR_0WS16	0x20	/* enable 0 wait-states on 16 bit bus */
-#define ED_WD_LAAR_L16EN	0x40	/* enable 16-bit operation */
-#define ED_WD_LAAR_M16EN	0x80	/* enable 16-bit memory access */
-
-/* i/o base offset to station address/card-ID PROM */
-#define ED_WD_PROM	8
-
-/*
- *	83C790 specific registers
- */
-/*
- * Hardware Support Register (HWR) ('790)
- */
-#define	ED_WD790_HWR	4
-
-#define	ED_WD790_HWR_RST	0x10	/* hardware reset */
-#define	ED_WD790_HWR_LPRM	0x40	/* LAN PROM select */
-#define	ED_WD790_HWR_SWH	0x80	/* switch register set */
-
-/*
- * ICR790 Interrupt Control Register for the 83C790
- */
-#define	ED_WD790_ICR	6
-
-#define	ED_WD790_ICR_EIL	0x01	/* enable interrupts */
-
-/*
- * REV/IOPA Revision / I/O Pipe register for the 83C79X
- */
-#define ED_WD790_REV	7
-
-#define ED_WD790	0x20		/* and 0x21... */
-#define ED_WD795	0x40		/* and 0x41... */
-
-/*
- * PIO mode register for the 83C795
- */
-#define ED_WD795_PIO	8
-
-/*
- * 79X RAM Address Register (RAR)
- *      Enabled with SWH bit=1 in HWR register
- */
-
-#define ED_WD790_RAR	0x0b
-
-#define ED_WD790_RAR_SZ8	0x00	/* 8k memory buffer */
-#define ED_WD790_RAR_SZ16	0x10	/* 16k memory buffer */
-#define ED_WD790_RAR_SZ32	0x20	/* 32k memory buffer */
-#define ED_WD790_RAR_SZ64	0x30	/* 64k memory buffer */
-
-/*
- * General Control Register (GCR)
- * Enabled with SWH bit == 1 in HWR register
- */
-#define	ED_WD790_GCR	0x0d
-
-#define	ED_WD790_GCR_IR0	0x04	/* bit 0 of encoded IRQ */
-#define	ED_WD790_GCR_IR1	0x08	/* bit 1 of encoded IRQ */
-#define	ED_WD790_GCR_ZWSEN	0x20	/* zero wait state enable */
-#define	ED_WD790_GCR_IR2	0x40	/* bit 2 of encoded IRQ */
-/*
- * The three bits of the encoded IRQ are decoded as follows:
- *
- * IR2 IR1 IR0  IRQ
- *  0   0   0   none
- *  0   0   1   9
- *  0   1   0   3
- *  0   1   1   5
- *  1   0   0   7
- *  1   0   1   10
- *  1   1   0   11
- *  1   1   1   15
- */
-
-/* i/o base offset to CARD ID */
-#define ED_WD_CARD_ID	ED_WD_PROM+6
-
-/* Board type codes in card ID */
-#define ED_TYPE_WD8003S		0x02
-#define ED_TYPE_WD8003E		0x03
-#define ED_TYPE_WD8013EBT	0x05
-#define	ED_TYPE_TOSHIBA1	0x11	/* named PCETA1 */
-#define	ED_TYPE_TOSHIBA2	0x12	/* named PCETA2 */
-#define	ED_TYPE_TOSHIBA3	0x13	/* named PCETB */
-#define	ED_TYPE_TOSHIBA4	0x14	/* named PCETC */
-#define	ED_TYPE_WD8003W		0x24
-#define	ED_TYPE_WD8003EB	0x25
-#define	ED_TYPE_WD8013W		0x26
-#define ED_TYPE_WD8013EP	0x27
-#define ED_TYPE_WD8013WC	0x28
-#define ED_TYPE_WD8013EPC	0x29
-#define	ED_TYPE_SMC8216T	0x2a
-#define	ED_TYPE_SMC8216C	0x2b
-#define ED_TYPE_WD8013EBP	0x2c
-
-/* Bit definitions in card ID */
-#define	ED_WD_REV_MASK		0x1f	/* Revision mask */
-#define	ED_WD_SOFTCONFIG	0x20	/* Soft config */
-#define	ED_WD_LARGERAM		0x40	/* Large RAM */
-#define	ED_MICROCHANEL		0x80	/* Microchannel bus (vs. isa) */
-
-/*
- * Checksum total.  All 8 bytes in station address PROM will add up to this.
- */
-#ifdef TOSH_ETHER
-#define ED_WD_ROM_CHECKSUM_TOTAL	0xA5
-#else
-#define ED_WD_ROM_CHECKSUM_TOTAL	0xFF
-#endif
-
-#define ED_WD_NIC_OFFSET	0x10	/* I/O base offset to NIC */
-#define ED_WD_ASIC_OFFSET	0	/* I/O base offset to ASIC */
-#define ED_WD_IO_PORTS		32	/* # of i/o addresses used */
-
-#define ED_WD_PAGE_OFFSET	0	/* page offset for NIC access to mem */
-
-/*
- *			Definitions for 3Com 3c503
- */
-#define ED_3COM_NIC_OFFSET	0
-#define ED_3COM_ASIC_OFFSET	0x400	/* offset to nic i/o regs */
-
-/*
- * XXX - The I/O address range is fragmented in the 3c503; this is the
- *	number of regs at iobase.
- */
-#define ED_3COM_IO_PORTS	16	/* # of i/o addresses used */
-
-/* tx memory starts in second bank on 8bit cards */
-#define ED_3COM_TX_PAGE_OFFSET_8BIT	0x20
-
-/* tx memory starts in first bank on 16bit cards */
-#define ED_3COM_TX_PAGE_OFFSET_16BIT	0x0
-
-/* ...and rx memory starts in second bank */
-#define ED_3COM_RX_PAGE_OFFSET_16BIT	0x20
-
-
-/*
- * Page Start Register.  Must match PSTART in NIC.
- */
-#define ED_3COM_PSTR		0
-
-/*
- * Page Stop Register.  Must match PSTOP in NIC.
- */
-#define ED_3COM_PSPR		1
-
-/*
- * DrQ Timer Register.  Determines number of bytes to be transferred during a
- * DMA burst.
- */
-#define ED_3COM_DQTR		2
-
-/*
- * Base Configuration Register.  Read-only register which contains the
- * board-configured I/O base address of the adapter.  Bit encoded.
- */
-#define ED_3COM_BCFR		3
-
-/*
- * EPROM Configuration Register.  Read-only register which contains the
- * board-configured memory base address.  Bit encoded.
- */
-#define ED_3COM_PCFR		4
-
-/*
- * GA Configuration Register.  Gate-Array Configuration Register.
- *
- * mbs2  mbs1  mbs0	start address
- *  0     0     0	0x0000
- *  0     0     1	0x2000
- *  0     1     0	0x4000
- *  0     1     1	0x6000
- *
- * Note that with adapters with only 8K, the setting for 0x2000 must always be
- * used.
- */
-#define ED_3COM_GACFR		5
-
-#define ED_3COM_GACFR_MBS0	0x01
-#define ED_3COM_GACFR_MBS1	0x02
-#define ED_3COM_GACFR_MBS2	0x04
-
-#define ED_3COM_GACFR_RSEL	0x08	/* enable shared memory */
-#define ED_3COM_GACFR_TEST	0x10	/* for GA testing */
-#define ED_3COM_GACFR_OWS	0x20	/* select 0WS access to GA */
-#define ED_3COM_GACFR_TCM	0x40	/* Mask DMA interrupts */
-#define ED_3COM_GACFR_NIM	0x80	/* Mask NIC interrupts */
-
-/*
- * Control Register.  Miscellaneous control functions.
- */
-#define ED_3COM_CR		6
-
-#define ED_3COM_CR_RST		0x01	/* Reset GA and NIC */
-#define ED_3COM_CR_XSEL		0x02	/* Transceiver select.  BNC=1(def) AUI=0 */
-#define ED_3COM_CR_EALO		0x04	/* window EA PROM 0-15 to I/O base */
-#define ED_3COM_CR_EAHI		0x08	/* window EA PROM 16-31 to I/O base */
-#define ED_3COM_CR_SHARE	0x10	/* select interrupt sharing option */
-#define ED_3COM_CR_DBSEL	0x20	/* Double buffer select */
-#define ED_3COM_CR_DDIR		0x40	/* DMA direction select */
-#define ED_3COM_CR_START	0x80	/* Start DMA controller */
-
-/*
- * Status Register.  Miscellaneous status information.
- */
-#define ED_3COM_STREG		7
-
-#define ED_3COM_STREG_REV	0x07	/* GA revision */
-#define ED_3COM_STREG_DIP	0x08	/* DMA in progress */
-#define ED_3COM_STREG_DTC	0x10	/* DMA terminal count */
-#define ED_3COM_STREG_OFLW	0x20	/* Overflow */
-#define ED_3COM_STREG_UFLW	0x40	/* Underflow */
-#define ED_3COM_STREG_DPRDY	0x80	/* Data port ready */
-
-/*
- * Interrupt/DMA Configuration Register
- */
-#define ED_3COM_IDCFR		8
-
-#define ED_3COM_IDCFR_DRQ	0x07	/* DMA request */
-#define ED_3COM_IDCFR_UNUSED	0x08	/* not used */
-#if 0
-#define ED_3COM_IDCFR_IRQ	0xF0	/* Interrupt request */
-#else
-#define ED_3COM_IDCFR_IRQ2	0x10	/* Interrupt request 2 select */
-#define ED_3COM_IDCFR_IRQ3	0x20	/* Interrupt request 3 select */
-#define ED_3COM_IDCFR_IRQ4	0x40	/* Interrupt request 4 select */
-#define ED_3COM_IDCFR_IRQ5	0x80	/* Interrupt request 5 select */
-#endif
-
-/*
- * DMA Address Register MSB
- */
-#define ED_3COM_DAMSB		9
-
-/*
- * DMA Address Register LSB
- */
-#define ED_3COM_DALSB		0x0a
-
-/*
- * Vector Pointer Register 2
- */
-#define ED_3COM_VPTR2		0x0b
-
-/*
- * Vector Pointer Register 1
- */
-#define ED_3COM_VPTR1		0x0c
-
-/*
- * Vector Pointer Register 0
- */
-#define ED_3COM_VPTR0		0x0d
-
-/*
- * Register File Access MSB
- */
-#define ED_3COM_RFMSB		0x0e
-
-/*
- * Register File Access LSB
- */
-#define ED_3COM_RFLSB		0x0f
-
-/*
- *		 Definitions for Novell NE1000/2000 boards
- */
-
-/*
- * Board type codes
- */
-#define ED_TYPE_NE1000		0x01
-#define ED_TYPE_NE2000		0x02
-
-/*
- * Register offsets/total
- */
-#define ED_NOVELL_NIC_OFFSET	0x00
-#define ED_NOVELL_ASIC_OFFSET	0x10
-#define ED_NOVELL_IO_PORTS	32
-
-/*
- * Remote DMA data register; for reading or writing to the NIC mem via
- * programmed I/O (offset from ASIC base).
- */
-#define ED_NOVELL_DATA		0x00
-
-/*
- * Reset register; reading from this register causes a board reset.
- */
-#define ED_NOVELL_RESET		0x0f
diff --git a/sys/dev/isa/if_hp.c b/sys/dev/isa/if_hp.c
deleted file mode 100644
index 8b01470c392..00000000000
--- a/sys/dev/isa/if_hp.c
+++ /dev/null
@@ -1,968 +0,0 @@
-/*    $OpenBSD: if_hp.c,v 1.17 2006/04/16 00:46:32 pascoe Exp $       */
-/*    $NetBSD: if_hp.c,v 1.21 1995/12/24 02:31:31 mycroft Exp $       */
-
-/* XXX THIS DRIVER IS BROKEN.  IT WILL NOT EVEN COMPILE. */
-
-/*-
- * Copyright (c) 1990, 1991 William F. Jolitz.
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * HP LAN Ethernet driver
- *
- * Parts inspired from Tim Tucker's if_wd driver for the wd8003,
- * insight on the ne2000 gained from Robert Clements PC/FTP driver.
- *
- * receive bottom end totally rewritten by Curt Mayer, Dec 1992.
- * no longer loses back to back packets.
- * note to driver writers: RTFM!
- *
- * hooks for packet filter added by Charles Hannum, 29DEC1992.
- *
- * Mostly rewritten for HP-labelled EISA controllers by Charles Hannum,
- * 18JAN1993.
- */
-
-#include "hp.h"
-#if NHP > 0
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/mbuf.h>
-#include <sys/buf.h>
-#include <sys/protosw.h>
-#include <sys/socket.h>
-#include <sys/ioctl.h>
-#include <sys/errno.h>
-#include <sys/syslog.h>
-
-#include <net/if.h>
-#include <net/netisr.h>
-#include <net/route.h>
-
-#ifdef INET
-#include <netinet/in.h>
-#include <netinet/in_systm.h>
-#include <netinet/in_var.h>
-#include <netinet/ip.h>
-#include <netinet/if_ether.h>
-#endif
-
-#include "bpfilter.h"
-#if NBPFILTER > 0
-#include <sys/selinfo.h>
-#include <net/bpf.h>
-#endif
-
-#include <machine/cpu.h>
-#include <machine/pio.h>
-
-#include <i386/isa/isa_device.h>	/* XXX BROKEN */
-#include <dev/isa/if_nereg.h>
-
-int     hpprobe(), hpattach(), hpintr();
-int     hpstart(), hpinit(), hpioctl();
-
-struct isa_driver hpdriver =
-{
-	hpprobe, hpattach, "hp",
-};
-
-struct mbuf *hpget();
-
-/*
- * Ethernet software status per interface.
- *
- * Each interface is referenced by a network interface structure,
- * ns_if, which the routing code uses to locate the interface.
- * This structure contains the output queue for the interface, its address, ...
- */
-struct hp_softc {
-	struct arpcom ns_ac;	/* Ethernet common part */
-#define	ns_if		ns_ac.ac_if	/* network-visible interface */
-#define	ns_addrp	ns_ac.ac_enaddr	/* hardware Ethernet address */
-	int     ns_flags;
-#define	DSF_LOCK	1	/* block re-entering enstart */
-	int     ns_oactive;
-	int     ns_mask;
-	struct prhdr ns_ph;	/* hardware header of incoming packet */
-	u_char  ns_pb[2048];
-	u_char  ns_txstart;	/* transmitter buffer start */
-	u_char  ns_rxstart;	/* receiver buffer start */
-	u_char  ns_rxend;	/* receiver buffer end */
-	u_char  hp_type;	/* HP board type */
-	u_char  hp_irq;		/* interrupt vector */
-	short   ns_port;	/* i/o port base */
-	short   ns_mode;	/* word/byte mode */
-	short   ns_rcr;
-#if NBPFILTER > 0
-	caddr_t ns_bpf;
-#endif
-}
-        hp_softc[NHP];
-#define	ENBUFSIZE	(sizeof(struct ether_header) + ETHERMTU + 2 + ETHER_MIN_LEN)
-
-#define	PAT(n)	(0xa55a + 37*(n))
-
-u_short boarddata[16];
-
-#define hp_option (-8)
-#define hp_data (-4)
-#define HP_RUN (0x01)
-#define HP_DATA (0x10)
-
-hpprobe(dvp)
-	struct isa_device *dvp;
-{
-	int     val, i, s, sum, pat;
-	register struct hp_softc *ns = &hp_softc[0];
-	register hpc;
-
-#ifdef lint
-	hpintr(0);
-#endif
-
-	hpc = (ns->ns_port = dvp->id_iobase + 0x10);
-	s = splnet();
-
-	ns->hp_irq = ffs(dvp->id_irq) - 1;
-
-	/* Extract board address */
-	for (i = 0; i < 6; i++)
-		ns->ns_addrp[i] = inb(hpc - 0x10 + i);
-	ns->hp_type = inb(hpc - 0x10 + 7);
-
-	if (ns->ns_addrp[0] != 0x08 ||
-	    ns->ns_addrp[1] != 0x00 ||
-	    ns->ns_addrp[2] != 0x09) {
-		splx(s);
-		return 0;
-	}
-	/* Word Transfers, Burst Mode Select, Fifo at 8 bytes */
-	/* On this board, WTS means 32-bit transfers, which is still
-	 * experimental.  - mycroft, 18JAN93 */
-#ifdef HP_32BIT
-	ns->ns_mode = DSDC_WTS | DSDC_BMS | DSDC_FT1;
-#else
-	ns->ns_mode = DSDC_BMS | DSDC_FT1;
-#endif
-	ns->ns_txstart = 0 * 1024 / DS_PGSIZE;
-	ns->ns_rxend = 32 * 1024 / DS_PGSIZE;
-
-	ns->ns_rxstart = ns->ns_txstart + (PKTSZ / DS_PGSIZE);
-
-	outb(hpc + hp_option, HP_RUN);
-
-#if 0
-	outb(hpc + ds0_isr, 0xff);
-	outb(hpc + ds_cmd, DSCM_NODMA | DSCM_PG0 | DSCM_STOP);
-	delay(1000);
-
-	/* Check cmd reg and fail if not right */
-	if ((i = inb(hpc + ds_cmd)) != (DSCM_NODMA | DSCM_PG0 | DSCM_STOP)) {
-		splx(s);
-		return (0);
-	}
-#endif
-
-	outb(hpc + hp_option, 0);
-
-	splx(s);
-	return (32);
-}
-/*
- * Fetch from onboard ROM/RAM
- */
-hpfetch(ns, up, ad, len)
-	struct hp_softc *ns;
-	caddr_t up;
-{
-	u_char  cmd;
-	register hpc = ns->ns_port;
-	int     counter = 100000;
-
-	outb(hpc + hp_option, inb(hpc + hp_option) | HP_DATA);
-
-	cmd = inb(hpc + ds_cmd);
-	outb(hpc + ds_cmd, DSCM_NODMA | DSCM_PG0 | DSCM_START);
-
-	/* Setup remote dma */
-	outb(hpc + ds0_isr, DSIS_RDC);
-
-	if (ns->ns_mode & DSDC_WTS)
-		len = (len + 3) & ~3;
-	else
-		len = (len + 1) & ~1;
-
-	outb(hpc + ds0_rbcr0, len);
-	outb(hpc + ds0_rbcr1, len >> 8);
-	outb(hpc + ds0_rsar0, ad);
-	outb(hpc + ds0_rsar1, ad >> 8);
-
-#ifdef HP_DEBUG
-	printf("hpfetch: len=%d ioaddr=0x%03x addr=0x%04x option=0x%02x %d-bit\n",
-	    len, hpc + hp_data, ad, inb(hpc + hp_option),
-	    ns->ns_mode & DSDC_WTS ? 32 : 16);
-	printf("hpfetch: cmd=0x%02x isr=0x%02x ",
-	    inb(hpc + ds_cmd), inb(hpc + ds0_isr));
-	outb(hpc + ds_cmd, DSCM_NODMA | DSCM_PG2 | DSCM_START);
-	printf("imr=0x%02x rcr=0x%02x tcr=0x%02x dcr=0x%02x\n",
-	    inb(hpc + ds0_imr), inb(hpc + ds0_rcr), inb(hpc + ds0_tcr),
-	    inb(hpc + ds0_dcr));
-#endif
-
-	/* Execute & extract from card */
-	outb(hpc + ds_cmd, DSCM_RREAD | DSCM_PG0 | DSCM_START);
-
-#ifdef HP_32BIT
-	if (ns->ns_mode & DSDC_WTS)
-		len = (caddr_t) insd(hpc + hp_data, up, len >> 2) - up;
-	else
-#endif
-		len = (caddr_t) insw(hpc + hp_data, up, len >> 1) - up;
-
-#ifdef HP_DEBUG
-	printf("hpfetch: done len=%d\n", len);
-#endif
-
-	/* Wait till done, then shutdown feature */
-	while ((inb(hpc + ds0_isr) & DSIS_RDC) == 0 && counter-- > 0);
-	outb(hpc + ds0_isr, DSIS_RDC);
-	outb(hpc + ds_cmd, cmd);
-
-	outb(hpc + hp_option, inb(hpc + hp_option) & ~HP_DATA);
-}
-/*
- * Put to onboard RAM
- */
-hpput(ns, up, ad, len)
-	struct hp_softc *ns;
-	caddr_t up;
-{
-	u_char  cmd;
-	register hpc = ns->ns_port;
-	int     counter = 100000;
-
-	outb(hpc + hp_option, inb(hpc + hp_option) | HP_DATA);
-
-	cmd = inb(hpc + ds_cmd);
-	outb(hpc + ds_cmd, DSCM_NODMA | DSCM_PG0 | DSCM_START);
-
-	/* Setup for remote dma */
-	outb(hpc + ds0_isr, DSIS_RDC);
-
-	if (ns->ns_mode & DSDC_WTS)
-		len = (len + 3) & ~3;
-	else
-		len = (len + 1) & ~1;
-
-#ifdef HP_DEBUG
-	printf("hpput: len=%d ioaddr=0x%03x addr=0x%04x option=0x%02x %d-bit\n",
-	    len, hpc + hp_data, ad, inb(hpc + hp_option),
-	    ns->ns_mode & DSDC_WTS ? 32 : 16);
-	printf("hpput: cmd=0x%02x isr=0x%02x ",
-	    inb(hpc + ds_cmd), inb(hpc + ds0_isr));
-	outb(hpc + ds_cmd, DSCM_NODMA | DSCM_PG2 | DSCM_START);
-	printf("imr=0x%02x rcr=0x%02x tcr=0x%02x dcr=0x%02x\n",
-	    inb(hpc + ds0_imr), inb(hpc + ds0_rcr), inb(hpc + ds0_tcr),
-	    inb(hpc + ds0_dcr));
-	{
-		unsigned char *p = (unsigned char *) up;
-		int     n = len;
-		printf("hpput:");
-		while (n--)
-			printf(" %02x", *(p++));
-		printf("\n");
-	}
-#endif
-
-	outb(hpc + ds_cmd, DSCM_NODMA | DSCM_PG0 | DSCM_START);
-	outb(hpc + ds0_rbcr0, 0xff);
-	outb(hpc + ds_cmd, DSCM_RREAD | DSCM_PG0 | DSCM_START);
-
-	outb(hpc + ds0_rbcr0, len);
-	outb(hpc + ds0_rbcr1, len >> 8);
-	outb(hpc + ds0_rsar0, ad);
-	outb(hpc + ds0_rsar1, ad >> 8);
-
-	/* Execute & stuff to card */
-	outb(hpc + ds_cmd, DSCM_RWRITE | DSCM_PG0 | DSCM_START);
-
-#ifdef HP_32BIT
-	if (ns->ns_mode & DSDC_WTS)
-		len = (caddr_t) outsd(hpc + hp_data, up, len >> 2) - up;
-	else
-#endif
-		len = (caddr_t) outsw(hpc + hp_data, up, len >> 1) - up;
-
-#ifdef HP_DEBUG
-	printf("hpput: done len=%d\n", len);
-#endif
-
-	/* Wait till done, then shutdown feature */
-	while ((inb(hpc + ds0_isr) & DSIS_RDC) == 0 && counter-- > 0);
-	outb(hpc + ds0_isr, DSIS_RDC);
-	outb(hpc + ds_cmd, cmd);
-
-	outb(hpc + hp_option, inb(hpc + hp_option) & ~HP_DATA);
-}
-/*
- * Reset of interface.
- */
-hpreset(unit, uban)
-	int     unit, uban;
-{
-	register struct hp_softc *ns = &hp_softc[unit];
-	register hpc = ns->ns_port;
-	if (unit >= NHP)
-		return;
-	printf("hp%d: reset\n", unit);
-	outb(hpc + hp_option, 0);
-	ns->ns_flags &= ~DSF_LOCK;
-	hpinit(unit);
-}
-
-static char *
-hp_id(type)
-	u_char  type;
-{
-	static struct {
-		u_char  type;
-		char   *name;
-	} boards[] = {
-		{
-			0x00, "hp27240"
-		}, {
-			0x10, "hp24240"
-		}, {
-			0x01, "hp27245"
-		}, {
-			0x02, "hp27250"
-		}, {
-			0x81, "hp27247"
-		}, {
-			0x91, "hp27247r1"
-		}
-	};
-	int     n = sizeof(boards) / sizeof(boards[0]);
-
-	while (n)
-		if (boards[--n].type == type)
-			return boards[n].name;
-
-	return "UNKNOWN";
-}
-/*
- * Interface exists: make available by filling in network interface
- * record.  System will initialize the interface when it is ready
- * to accept packets.  We get the ethernet address here.
- */
-hpattach(dvp)
-	struct isa_device *dvp;
-{
-	int     unit = dvp->id_unit;
-	register struct hp_softc *ns = &hp_softc[unit];
-	register struct ifnet *ifp = &ns->ns_if;
-
-	ifp->if_unit = unit;
-	ifp->if_name = hpdriver.name;
-	printf("hp%d: %s %d-bit ethernet address %s\n", unit,
-	    hp_id(ns->hp_type), ns->ns_mode & DSDC_WTS ? 32 : 16,
-	    ether_sprintf(ns->ns_addrp));
-	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS;
-	ifp->if_start = hpstart;
-	ifp->if_ioctl = hpioctl;
-	ifp->if_reset = hpreset;
-	ifp->if_watchdog = 0;
-	IFQ_SET_READY(&ifp->if_snd);
-	if_attach(ifp);
-	if_alloc_sadl(ifp);
-}
-/*
- * Initialization of interface; set up initialization block
- * and transmit/receive descriptor rings.
- */
-hpinit(unit)
-	int     unit;
-{
-	register struct hp_softc *ns = &hp_softc[unit];
-	struct ifnet *ifp = &ns->ns_if;
-	int     s;
-	int     i;
-	char   *cp;
-	register hpc = ns->ns_port;
-
-	if (ifp->if_addrlist == (struct ifaddr *) 0)
-		return;
-	if (ifp->if_flags & IFF_RUNNING)
-		return;
-
-	s = splnet();
-
-#ifdef HP_DEBUG
-	printf("hpinit: hp%d at 0x%x irq %d\n", unit, hpc, (int) ns->hp_irq);
-	printf("hpinit: promiscuous mode %s\n",
-	    ns->ns_if.if_flags & IFF_PROMISC ? "on" : "off");
-#endif
-
-	ns->ns_rcr = (ns->ns_if.if_flags & IFF_BROADCAST ? DSRC_AB : 0) |
-	    (ns->ns_if.if_flags & IFF_PROMISC ? DSRC_PRO : 0);
-#ifdef HP_LOG_ERRORS
-	ns->ns_rcr |= DSRC_SEP;
-#endif
-
-	/* set irq and turn on board */
-	outb(hpc + hp_option, HP_RUN | (ns->hp_irq << 1));
-
-	/* init regs */
-	outb(hpc + ds_cmd, DSCM_NODMA | DSCM_PG0 | DSCM_STOP);
-	outb(hpc + ds0_dcr, 0);
-	outb(hpc + ds0_rbcr0, 0);
-	outb(hpc + ds0_rbcr1, 0);
-	outb(hpc + ds0_rcr, DSRC_MON);
-	outb(hpc + ds0_tpsr, ns->ns_txstart);
-	outb(hpc + ds0_imr, 0);
-	outb(hpc + ds0_tcr, DSTC_LB0);
-	outb(hpc + ds0_pstart, ns->ns_rxstart);
-	outb(hpc + ds0_bnry, ns->ns_rxend - 1);
-	outb(hpc + ds0_pstop, ns->ns_rxend);
-	outb(hpc + ds0_isr, 0xff);
-	outb(hpc + ds_cmd, DSCM_NODMA | DSCM_PG1 | DSCM_STOP);
-	outb(hpc + ds1_curr, ns->ns_rxstart);
-
-	/* set physical address on ethernet */
-	for (i = 0; i < 6; i++)
-		outb(hpc + ds1_par0 + i, ns->ns_addrp[i]);
-
-	/* clr logical address hash filter for now */
-	for (i = 0; i < 8; i++)
-		outb(hpc + ds1_mar0 + i, 0xff);
-
-	/* fire it up */
-	outb(hpc + ds_cmd, DSCM_NODMA | DSCM_PG0 | DSCM_START);
-	outb(hpc + ds0_dcr, ns->ns_mode);
-	outb(hpc + ds0_rcr, ns->ns_rcr);
-	outb(hpc + ds0_tcr, 0);
-	outb(hpc + ds0_imr, 0xff);
-
-	ns->ns_if.if_flags |= IFF_RUNNING;
-	ns->ns_flags &= ~DSF_LOCK;
-	ns->ns_oactive = 0;
-	ns->ns_mask = ~0;
-	hpstart(ifp);
-
-#ifdef HP_DEBUG
-	printf("hpinit: done\n", unit, hpc);
-#endif
-
-	splx(s);
-}
-/*
- * Setup output on interface.
- * Get another datagram to send off of the interface queue,
- * and map it to the interface before starting the output.
- * called only at splnet or interrupt level.
- */
-hpstart(ifp)
-	struct ifnet *ifp;
-{
-	register struct hp_softc *ns = &hp_softc[ifp->if_unit];
-	struct mbuf *m0, *m;
-	int     buffer;
-	int     len, i, total;
-	register hpc = ns->ns_port;
-
-	/*
-	       * The DS8390 has only one transmit buffer, if it is busy we
-	       * must wait until the transmit interrupt completes.
-	       */
-	if (ns->ns_flags & DSF_LOCK)
-		return;
-
-	if (inb(hpc + ds_cmd) & DSCM_TRANS)
-		return;
-
-	if ((ns->ns_if.if_flags & IFF_RUNNING) == 0)
-		return;
-
-	IFQ_DEQUEUE(&ns->ns_if.if_snd, m);
-
-	if (m == 0)
-		return;
-
-	/*
-	       * Copy the mbuf chain into the transmit buffer
-	       */
-
-	ns->ns_flags |= DSF_LOCK;	/* prevent entering hpstart */
-	buffer = ns->ns_txstart * DS_PGSIZE;
-	i = 0;
-	total = len = m->m_pkthdr.len;
-
-#ifdef HP_DEBUG
-	printf("hpstart: len=%d\n", len);
-#endif
-
-#if NBPFILTER > 0
-	if (ns->ns_bpf)
-		bpf_mtap(ns->ns_bpf, m, BPF_DIRECTION_OUT);
-#endif
-
-	for (m0 = m; m != 0;) {
-		if (m->m_len & 1 && t > m->m_len) {
-			m->m_len -= 1;
-			hpput(ns, mtod(m, caddr_t), buffer, m->m_len);
-			t -= m->m_len;
-			buffer += m->m_len;
-			m->m_data += m->m_len;
-			m->m_len = 1;
-			m = m_pullup(m, 2);
-		} else {
-			hpput(ns, mtod(m, caddr_t), buffer, m->m_len);
-			t -= m->m_len;
-			buffer += m->m_len;
-			MFREE(m, m0);
-			m = m0;
-		}
-	}
-
-	/*
-	       * Init transmit length registers, and set transmit start flag.
-	       */
-	len = total;
-	if (len < ETHER_MIN_LEN)
-		len = ETHER_MIN_LEN;
-	outb(hpc + ds_cmd, DSCM_NODMA | DSCM_PG0 | DSCM_START);
-	outb(hpc + ds0_tbcr0, len & 0xff);
-	outb(hpc + ds0_tbcr1, (len >> 8) & 0xff);
-	outb(hpc + ds0_tpsr, ns->ns_txstart);
-	outb(hpc + ds_cmd, DSCM_TRANS | DSCM_NODMA | DSCM_PG0 | DSCM_START);
-
-#ifdef HP_DEBUG
-	printf("hpstart: done\n", hpc);
-#endif
-}
-/*
- * Controller interrupt.
- */
-hpintr(unit)
-{
-	register struct hp_softc *ns = &hp_softc[unit];
-	u_char  cmd, isr;
-	register hpc = ns->ns_port;
-	u_char  err;
-
-	/* Save cmd, clear interrupt */
-	cmd = inb(hpc + ds_cmd);
-loop:
-	isr = inb(hpc + ds0_isr);
-	outb(hpc + ds_cmd, DSCM_NODMA | DSCM_PG0 | DSCM_START);
-	outb(hpc + ds0_isr, isr);
-
-	/* Receiver error */
-	if (isr & DSIS_RXE) {
-		/* need to read these registers to clear status */
-		err = inb(hpc + ds0_rsr);
-		(void) inb(hpc + 0xD);
-		(void) inb(hpc + 0xE);
-		(void) inb(hpc + 0xF);
-		ns->ns_if.if_ierrors++;
-#ifdef HP_LOG_ERRORS
-		isr |= DSIS_RX;
-#endif
-	}
-	/* We received something */
-	if (isr & DSIS_RX) {
-		u_char  bnry;
-		u_char  curr;
-		u_short addr;
-		int     len;
-		int     i;
-		unsigned char c;
-
-		while (1) {
-			outb(hpc + ds_cmd, DSCM_START | DSCM_NODMA | DSCM_PG0);
-			bnry = inb(hpc + ds0_bnry);
-			outb(hpc + ds_cmd, DSCM_START | DSCM_NODMA | DSCM_PG1);
-			curr = inb(hpc + ds1_curr);
-
-#ifdef HP_DEBUG
-			printf("hpintr: receive isr=0x%02x bnry=0x%02x curr=0x%02x\n",
-			    isr, bnry, curr);
-#endif
-
-			if (++bnry >= ns->ns_rxend)
-				bnry = ns->ns_rxstart;
-
-			/* if ring empty, done! */
-			if (bnry == curr)
-				break;
-
-			addr = bnry * DS_PGSIZE;
-
-			outb(hpc + hp_option, inb(hpc + hp_option) | HP_DATA);
-
-#if 0
-			/* send packet with auto packet release */
-			outb(hpc + ds_cmd, DSCM_START | DSCM_NODMA | DSCM_PG0);
-			outb(hpc + ds0_rbcr1, 0x0f);
-			outb(hpc + ds0_dcr, ns->ns_mode | DSDC_AR);
-			outb(hpc + ds_cmd, DSCM_SENDP | DSCM_PG0 | DSCM_START);
-#endif
-
-			/* get length */
-			hpfetch(ns, (caddr_t) & ns->ns_ph, addr, sizeof ns->ns_ph);
-			addr += sizeof ns->ns_ph;
-
-#ifdef HP_DEBUG
-			printf("hpintr: sendp packet hdr: %x %x %x %x\n",
-			    ns->ns_ph.pr_status,
-			    ns->ns_ph.pr_nxtpg,
-			    ns->ns_ph.pr_sz0,
-			    ns->ns_ph.pr_sz1);
-#endif
-
-#ifdef HP_LOG_ERRORS
-			if (ns->ns_ph.pr_status & (DSRS_CRC | DSRS_FO | DSRS_DFR)) {
-				/* Get packet header */
-				if (len > 14)
-					len = 14;
-				hpfetch(ns, (caddr_t) (ns->ns_pb), addr, len);
-
-				/* move boundary up */
-				bnry = ns->ns_ph.pr_nxtpg;
-				if (--bnry < ns->ns_rxstart)
-					bnry = ns->ns_rxend - 1;
-				outb(hpc + ds_cmd, DSCM_START | DSCM_NODMA | DSCM_PG0);
-				outb(hpc + ds0_bnry, bnry);
-
-				printf("hp%d: receive error status=0x%02x\n", unit,
-				    ns->ns_ph.pr_status);
-				printf("hp%d: packet header:", unit);
-				{
-					int     n;
-					for (n = 0; n < len; n++)
-						printf(" %02x", ns->ns_pb[n]);
-				}
-				printf("\n");
-
-				continue;
-			}
-#endif
-
-			ns->ns_if.if_ipackets++;
-			len = ns->ns_ph.pr_sz0 + (ns->ns_ph.pr_sz1 << 8);
-			if (len < ETHER_MIN_LEN || len > ETHER_MAX_DIX_LEN) {
-				printf("hpintr: bnry %x curr %x\n", bnry, curr);
-				printf("hpintr: packet hdr: %x %x %x %x\n",
-				    ns->ns_ph.pr_status,
-				    ns->ns_ph.pr_nxtpg,
-				    ns->ns_ph.pr_sz0,
-				    ns->ns_ph.pr_sz1);
-				printf("isr = 0x%x reg_isr=0x%x\n",
-				    isr, inb(hpc + ds0_isr));
-				outb(hpc + ds_cmd, DSCM_START | DSCM_NODMA | DSCM_PG0);
-				bnry = inb(hpc + ds0_bnry);
-				outb(hpc + ds_cmd, DSCM_START | DSCM_NODMA | DSCM_PG1);
-				curr = inb(hpc + ds1_curr);
-				printf("hpintr: new bnry %x curr %x\n", bnry, curr);
-				printf("hpintr: bad len %d\n-hanging-\n",
-				    len);
-				while (1);
-			}
-			/* read packet */
-			hpfetch(ns, (caddr_t) (ns->ns_pb), addr, len);
-
-			/* move boundary up */
-			bnry = ns->ns_ph.pr_nxtpg;
-			if (--bnry < ns->ns_rxstart)
-				bnry = ns->ns_rxend - 1;
-			outb(hpc + ds_cmd, DSCM_START | DSCM_NODMA | DSCM_PG0);
-			outb(hpc + ds0_bnry, bnry);
-
-#ifdef HP_DEBUG
-			printf("hpintr: receive done bnry=0x%02x\n", bnry);
-#endif
-
-			outb(hpc + hp_option, inb(hpc + hp_option) & ~HP_DATA);
-
-			/* adjust for ether header and checksum */
-			len -= sizeof(struct ether_header) + sizeof(long);
-
-			/* process packet */
-			hpread(ns, (caddr_t) (ns->ns_pb), len);
-		}
-	}
-	/* Transmit error */
-	if (isr & DSIS_TXE) {
-		ns->ns_flags &= ~DSF_LOCK;
-		/* Need to read these registers to clear status */
-		ns->ns_if.if_collisions += inb(hpc + ds0_tbcr0);
-		ns->ns_if.if_oerrors++;
-	}
-	/* Packet Transmitted */
-	if (isr & DSIS_TX) {
-		ns->ns_flags &= ~DSF_LOCK;
-		++ns->ns_if.if_opackets;
-		ns->ns_if.if_collisions += inb(hpc + ds0_tbcr0);
-	}
-	/* Receiver ovverun? */
-	if (isr & DSIS_ROVRN) {
-		log(LOG_ERR, "hp%d: error: isr %x\n", ns - hp_softc, isr
-		     /* , DSIS_BITS */ );
-		outb(hpc + ds0_rbcr0, 0);
-		outb(hpc + ds0_rbcr1, 0);
-		outb(hpc + ds0_tcr, DSTC_LB0);
-		outb(hpc + ds0_rcr, DSRC_MON);
-		outb(hpc + ds_cmd, DSCM_START | DSCM_NODMA);
-		outb(hpc + ds0_rcr, ns->ns_rcr);
-		outb(hpc + ds0_tcr, 0);
-	}
-	/* Any more to send? */
-	outb(hpc + ds_cmd, DSCM_NODMA | DSCM_PG0 | DSCM_START);
-	hpstart(&ns->ns_if);
-	outb(hpc + ds_cmd, cmd);
-	outb(hpc + ds0_imr, 0xff);
-
-	/* Still more to do? */
-	isr = inb(hpc + ds0_isr);
-	if (isr)
-		goto loop;
-}
-/*
- * Pass a packet to the higher levels.
- * We deal with the trailer protocol here.
- */
-hpread(ns, buf, len)
-	register struct hp_softc *ns;
-	char   *buf;
-	int     len;
-{
-	register struct ether_header *eh;
-	struct mbuf *m;
-	int     off, resid;
-	register struct ifqueue *inq;
-	u_short etype;
-
-	/*
-	 * Deal with trailer protocol: if type is trailer type
-	 * get true type from first 16-bit word past data.
-	 * Remember that type was trailer by setting off.
-	 */
-	eh = (struct ether_header *) buf;
-	etype = ntohs((u_short) eh->ether_type);
-#define	hpdataaddr(eh, off, type)	((type)(((caddr_t)((eh)+1)+(off))))
-	if (etype >= ETHERTYPE_TRAIL &&
-	    etype < ETHERTYPE_TRAIL + ETHERTYPE_NTRAILER) {
-		off = (etype - ETHERTYPE_TRAIL) * 512;
-		if (off >= ETHERMTU)
-			return;	/* sanity */
-		eh->ether_type = *hpdataaddr(eh, off, u_short *);
-		resid = ntohs(*(hpdataaddr(eh, off + 2, u_short *)));
-		if (off + resid > len)
-			return;	/* sanity */
-		len = off + resid;
-	} else
-		off = 0;
-
-	if (len == 0)
-		return;
-
-#if NBPFILTER > 0
-	if (ns->ns_bpf)
-		bpf_tap(ns->ns_bpf, buf, len + sizeof(struct ether_header),
-		    BPF_DIRECTION_IN);
-#endif
-	/*
-	 * Pull packet off interface.  Off is nonzero if packet
-	 * has trailing header; hpget will then force this header
-	 * information to be at the front, but we still have to drop
-	 * the type and length which are at the front of any trailer data.
-	 */
-	m = hpget(buf, len, off, &ns->ns_if);
-	if (m == 0)
-		return;
-
-	/*
-	 * XXX I don't understand the implications of ETHERTYPE_TRAIL.
-	 * Just prepend the "fixed" ethernet header to the mbuf chain.
-	 */
-	M_PREPEND(m, sizeof(*eh), M_DONTWAIT);
-	if (m == 0)
-		return;
-	*mtod(m, struct ether_header *) = *eh;
-	ether_input_mbuf(&ns->ns_if, m);
-}
-/*
- * Supporting routines
- */
-
-/*
- * Pull read data off a interface.
- * Len is length of data, with local net header stripped.
- * Off is non-zero if a trailer protocol was used, and
- * gives the offset of the trailer information.
- * We copy the trailer information and then all the normal
- * data into mbufs.  When full cluster sized units are present
- * we copy into clusters.
- */
-struct mbuf *
-hpget(buf, totlen, off0, ifp)
-	caddr_t buf;
-	int     totlen, off0;
-	struct ifnet *ifp;
-{
-	struct mbuf *top, **mp, *m, *p;
-	int     off = off0, len;
-	register caddr_t cp = buf;
-	char   *epkt;
-
-	buf += sizeof(struct ether_header);
-	cp = buf;
-	epkt = cp + totlen;
-
-
-	if (off) {
-		cp += off + 2 * sizeof(u_short);
-		totlen -= 2 * sizeof(u_short);
-	}
-	MGETHDR(m, M_DONTWAIT, MT_DATA);
-	if (m == 0)
-		return (0);
-	m->m_pkthdr.rcvif = ifp;
-	m->m_pkthdr.len = totlen;
-	m->m_len = MHLEN;
-
-	top = 0;
-	mp = &top;
-	while (totlen > 0) {
-		if (top) {
-			MGET(m, M_DONTWAIT, MT_DATA);
-			if (m == 0) {
-				m_freem(top);
-				return (0);
-			}
-			m->m_len = MLEN;
-		}
-		len = min(totlen, epkt - cp);
-		if (len >= MINCLSIZE) {
-			MCLGET(m, M_DONTWAIT);
-			if (m->m_flags & M_EXT)
-				m->m_len = len = min(len, MCLBYTES);
-			else
-				len = m->m_len;
-		} else {
-			/*
-				       * Place initial small packet/header at end of mbuf.
-				       */
-			if (len < m->m_len) {
-				if (top == 0 && len + max_linkhdr <= m->m_len)
-					m->m_data += max_linkhdr;
-				m->m_len = len;
-			} else
-				len = m->m_len;
-		}
-		bcopy(cp, mtod(m, caddr_t), (unsigned) len);
-		cp += len;
-		*mp = m;
-		mp = &m->m_next;
-		totlen -= len;
-		if (cp == epkt)
-			cp = buf;
-	}
-	return (top);
-}
-/*
- * Process an ioctl request.
- */
-hpioctl(ifp, cmd, data)
-	register struct ifnet *ifp;
-	u_long	cmd;
-	caddr_t data;
-{
-	register struct ifaddr *ifa = (struct ifaddr *) data;
-	struct hp_softc *ns = &hp_softc[ifp->if_unit];
-	struct ifreq *ifr = (struct ifreq *) data;
-	int     s = splnet(), error = 0;
-
-	if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
-		splx(s);
-		return error;
-	}
-
-	switch (cmd) {
-
-	case SIOCSIFADDR:
-		ifp->if_flags |= IFF_UP;
-
-		switch (ifa->ifa_addr->sa_family) {
-#ifdef INET
-		case AF_INET:
-			hpinit(ifp->if_unit);	/* before arpwhohas */
-			((struct arpcom *) ifp)->ac_ipaddr =
-			    IA_SIN(ifa)->sin_addr;
-			arpwhohas((struct arpcom *) ifp, &IA_SIN(ifa)->sin_addr);
-			break;
-#endif
-		default:
-			hpinit(ifp->if_unit);
-			break;
-		}
-		break;
-
-	case SIOCSIFFLAGS:
-#ifdef HP_DEBUG
-		printf("hp: setting flags, up: %s, running: %s\n",
-		    ifp->if_flags & IFF_UP ? "yes" : "no",
-		    ifp->if_flags & IFF_RUNNING ? "yes" : "no");
-#endif
-		if ((ifp->if_flags & IFF_UP) == 0 &&
-		    ifp->if_flags & IFF_RUNNING) {
-			ifp->if_flags &= ~IFF_RUNNING;
-			outb(ns->ns_port + ds_cmd, DSCM_STOP | DSCM_NODMA);
-		} else
-			if (ifp->if_flags & IFF_UP &&
-			    (ifp->if_flags & IFF_RUNNING) == 0)
-				hpinit(ifp->if_unit);
-		break;
-
-#ifdef notdef
-	case SIOCGHWADDR:
-		bcopy((caddr_t) ns->ns_addrp, (caddr_t) & ifr->ifr_data,
-		    sizeof(ns->ns_addrp));
-		break;
-#endif
-
-	default:
-		error = EINVAL;
-	}
-	splx(s);
-	return (error);
-}
-#endif