map registers of the qec+be 100mbit card

3 files changed, 263 insertions, 0 deletions

diff --git a/sys/arch/sparc/dev/be.c b/sys/arch/sparc/dev/be.c
new file mode 100644
index 00000000000..1c8a1831edc
--- /dev/null
+++ b/sys/arch/sparc/dev/be.c
@@ -0,0 +1,118 @@
+#include "bpfilter.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/mbuf.h>
+#include <sys/syslog.h>
+#include <sys/socket.h>
+#include <sys/device.h>
+#include <sys/malloc.h>
+
+#include <net/if.h>
+
+#ifdef INET
+#include <netinet/in.h>
+#include <netinet/if_ether.h>
+#endif
+
+#include <machine/autoconf.h>
+#include <machine/cpu.h>
+
+#include <sparc/dev/sbusvar.h>
+#include <sparc/dev/dmareg.h>
+#include <sparc/dev/dmavar.h>
+
+#include <sparc/dev/qecvar.h>
+#include <sparc/dev/bereg.h>
+#include <sparc/dev/bevar.h>
+
+int	bematch __P((struct device *, void *, void *));
+void	beattach __P((struct device *, struct device *, void *));
+
+int	beintr __P((void *arg));
+void	bestop __P((struct be_softc *));
+
+struct cfdriver be_cd = {
+	NULL, "be", DV_IFNET
+};
+
+struct cfattach be_ca = {
+	sizeof(struct be_softc), bematch, beattach
+};
+
+int
+bematch(parent, vcf, aux)
+	struct device *parent;
+	void *vcf, *aux;
+{
+	struct cfdata *cf = vcf;
+	struct confargs *ca = aux;
+	register struct romaux *ra = &ca->ca_ra;
+
+	if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
+		return (0);
+	return (1);
+}
+
+void
+beattach(parent, self, aux)
+	struct device *parent, *self;
+	void *aux;
+{
+	struct be_softc *sc = (struct be_softc *)self;
+	struct confargs *ca = aux;
+	int pri;
+	struct qec_softc *qec = (struct qec_softc *)parent;
+
+	/* XXX the following declarations should be elsewhere */
+	extern void myetheraddr __P((u_char *));
+
+	if (ca->ca_ra.ra_nintr != 1) {
+		printf(": expected 1 interrupt, got %d\n", ca->ca_ra.ra_nintr);
+		return;
+	}
+	pri = ca->ca_ra.ra_intr[0].int_pri;
+	printf(" pri %d", pri);
+	sc->sc_rev = getpropint(ca->ca_ra.ra_node, "board-version", -1);
+	printf(": rev %x", sc->sc_rev);
+	myetheraddr(sc->sc_arpcom.ac_enaddr);
+
+	sc->sc_cr = mapiodev(ca->ca_ra.ra_reg, 0, sizeof(struct be_cregs));
+	sc->sc_br = mapiodev(&ca->ca_ra.ra_reg[1], 0, sizeof(struct be_bregs));
+	sc->sc_tr = mapiodev(&ca->ca_ra.ra_reg[2], 0, sizeof(struct be_tregs));
+	bestop(sc);
+
+	sc->sc_mem = qec->sc_buffer;
+	sc->sc_memsize = qec->sc_bufsiz;
+	sc->sc_conf3 = getpropint(ca->ca_ra.ra_node, "busmaster-regval", 0);
+
+	sc->sc_ih.ih_fun = beintr;
+	sc->sc_ih.ih_arg = sc;
+	intr_establish(pri, &sc->sc_ih);
+
+	printf("\n");
+}
+
+void
+bestop(sc)
+	struct be_softc *sc;
+{
+	int tries;
+
+	tries = 32;
+	sc->sc_br->tx_cfg = 0;
+	while (sc->sc_br->tx_cfg != 0 && --tries)
+		DELAY(20);
+
+	tries = 32;
+	sc->sc_br->rx_cfg = 0;
+	while (sc->sc_br->rx_cfg != 0 && --tries)
+		DELAY(20);
+}
+
+int
+beintr(arg)
+	void *arg;
+{
+	return (0);
+}
diff --git a/sys/arch/sparc/dev/bereg.h b/sys/arch/sparc/dev/bereg.h
new file mode 100644
index 00000000000..66e30a46b44
--- /dev/null
+++ b/sys/arch/sparc/dev/bereg.h
@@ -0,0 +1,99 @@
+/*	$OpenBSD: bereg.h,v 1.1 1998/07/04 07:57:52 deraadt Exp $	*/
+
+/*
+ * Copyright (c) 1998 Theo de Raadt.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+struct be_bregs {
+	volatile u_int32_t xif_cfg;          /* XIF config register */
+	volatile u_int32_t _unused[63];      /* Reserved... */
+	volatile u_int32_t status;           /* Status register, clear on read */
+	volatile u_int32_t imask;            /* Interrupt mask register */
+	volatile u_int32_t _unused2[64];     /* Reserved... */
+	volatile u_int32_t tx_swreset;       /* Transmitter software reset */
+	volatile u_int32_t tx_cfg;           /* Transmitter config register */
+	volatile u_int32_t ipkt_gap1;        /* Inter-packet gap 1 */
+	volatile u_int32_t ipkt_gap2;        /* Inter-packet gap 2 */
+	volatile u_int32_t attempt_limit;    /* Transmit attempt limit */
+	volatile u_int32_t stime;            /* Transmit slot time */
+	volatile u_int32_t preamble_len;     /* Size of transmit preamble */
+	volatile u_int32_t preamble_pattern; /* Pattern for transmit preamble */
+	volatile u_int32_t tx_sframe_delim;  /* Transmit delimiter */
+	volatile u_int32_t jsize;            /* Toe jam... */
+	volatile u_int32_t tx_pkt_max;       /* Transmit max pkt size */
+	volatile u_int32_t tx_pkt_min;       /* Transmit min pkt size */
+	volatile u_int32_t peak_attempt;     /* Count of transmit peak attempts */
+	volatile u_int32_t dt_ctr;           /* Transmit defer timer */
+	volatile u_int32_t nc_ctr;           /* Transmit normal-collision counter */
+	volatile u_int32_t fc_ctr;           /* Transmit first-collision counter */
+	volatile u_int32_t ex_ctr;           /* Transmit excess-collision counter */
+	volatile u_int32_t lt_ctr;           /* Transmit late-collision counter */
+	volatile u_int32_t rand_seed;        /* Transmit random number seed */
+	volatile u_int32_t tx_smachine;      /* Transmit state machine */
+	volatile u_int32_t _unused3[44];     /* Reserved */
+	volatile u_int32_t rx_swreset;       /* Receiver software reset */
+	volatile u_int32_t rx_cfg;           /* Receiver config register */
+	volatile u_int32_t rx_pkt_max;       /* Receive max pkt size */
+	volatile u_int32_t rx_pkt_min;       /* Receive min pkt size */
+	volatile u_int32_t mac_addr2;        /* Ether address register 2 */
+	volatile u_int32_t mac_addr1;        /* Ether address register 1 */
+	volatile u_int32_t mac_addr0;        /* Ether address register 0 */
+	volatile u_int32_t fr_ctr;           /* Receive frame receive counter */
+	volatile u_int32_t gle_ctr;          /* Receive giant-length error counter */
+	volatile u_int32_t unale_ctr;        /* Receive unaligned error counter */
+	volatile u_int32_t rcrce_ctr;        /* Receive CRC error counter */
+	volatile u_int32_t rx_smachine;      /* Receiver state machine */
+	volatile u_int32_t rx_cvalid;        /* Receiver code violation */
+	volatile u_int32_t _unused4;         /* Reserved... */
+	volatile u_int32_t htable3;          /* Hash table 3 */
+	volatile u_int32_t htable2;          /* Hash table 2 */
+	volatile u_int32_t htable1;          /* Hash table 1 */
+	volatile u_int32_t htable0;          /* Hash table 0 */
+	volatile u_int32_t afilter2;         /* Address filter 2 */
+	volatile u_int32_t afilter1;         /* Address filter 1 */
+	volatile u_int32_t afilter0;         /* Address filter 0 */
+	volatile u_int32_t afilter_mask;     /* Address filter mask */
+};
+
+struct be_cregs {
+	volatile u_int32_t ctrl;       /* Control */
+	volatile u_int32_t stat;       /* Status */
+	volatile u_int32_t rxds;       /* RX descriptor ring ptr */
+	volatile u_int32_t txds;       /* TX descriptor ring ptr */
+	volatile u_int32_t rimask;     /* RX Interrupt Mask */
+	volatile u_int32_t timask;     /* TX Interrupt Mask */
+	volatile u_int32_t qmask;      /* QEC Error Interrupt Mask */
+	volatile u_int32_t bmask;      /* BigMAC Error Interrupt Mask */
+	volatile u_int32_t rxwbufptr;  /* Local memory rx write ptr */
+	volatile u_int32_t rxrbufptr;  /* Local memory rx read ptr */
+	volatile u_int32_t txwbufptr;  /* Local memory tx write ptr */
+	volatile u_int32_t txrbufptr;  /* Local memory tx read ptr */
+	volatile u_int32_t ccnt;       /* Collision Counter */
+};
+
+struct be_tregs {
+	u_int32_t	tcvr_pal;
+	u_int32_t	mgmt_pal;
+};
diff --git a/sys/arch/sparc/dev/bevar.h b/sys/arch/sparc/dev/bevar.h
new file mode 100644
index 00000000000..3e615a58aea
--- /dev/null
+++ b/sys/arch/sparc/dev/bevar.h
@@ -0,0 +1,46 @@
+/*	$OpenBSD: bevar.h,v 1.1 1998/07/04 07:57:52 deraadt Exp $	*/
+
+/*
+ * Copyright (c) 1998 Theo de Raadt.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+struct be_softc {
+	struct	device sc_dev;
+	struct	sbusdev sc_sd;		/* sbus device */
+	struct	intrhand sc_ih;		/* interrupt vectoring */
+	struct	dma_softc *sc_dma;	/* pointer to my dma */
+
+	u_long	sc_laddr;		/* DMA address */
+	struct	be_bregs *sc_br;	/* registers */
+	struct	be_cregs *sc_cr;	/* registers */
+	struct	be_tregs *sc_tr;	/* registers */
+
+	struct	arpcom sc_arpcom;
+	void	*sc_mem;
+	int	sc_memsize;
+	long	sc_addr;
+	int	sc_conf3;
+	u_int	sc_rev;
+};