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authorMiod Vallat <miod@cvs.openbsd.org>2007-10-24 20:04:27 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2007-10-24 20:04:27 +0000
commit9b8b71cbf4f3001f0a9967628c2df963d576edae (patch)
tree5a0a47cd221434082e5457eefb0e84e8640c4017 /sys
parenta649fd7acf8837f41450313169ec2b40df408eae (diff)
pipleine -> pipeline
Diffstat (limited to 'sys')
-rw-r--r--sys/arch/mips64/mips64/cache_r5k.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/sys/arch/mips64/mips64/cache_r5k.S b/sys/arch/mips64/mips64/cache_r5k.S
index c239ea69d04..207712e6fc7 100644
--- a/sys/arch/mips64/mips64/cache_r5k.S
+++ b/sys/arch/mips64/mips64/cache_r5k.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: cache_r5k.S,v 1.20 2007/10/18 04:32:25 miod Exp $ */
+/* $OpenBSD: cache_r5k.S,v 1.21 2007/10/24 20:04:26 miod Exp $ */
/*
* Copyright (c) 1998-2004 Opsycon AB (www.opsycon.se)
@@ -135,7 +135,7 @@
#define CTYPE_HAS_XL3 0x0400 /* External L3 Cache present */
/*
- * Due to a flaw in RM7000 1.x processors a pipleine 'drain' is
+ * Due to a flaw in RM7000 1.x processors a pipeline 'drain' is
* required after some mtc0 instructions.
* Ten nops in sequence does the trick.
*/