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authorBrad Smith <brad@cvs.openbsd.org>2008-10-06 00:34:11 +0000
committerBrad Smith <brad@cvs.openbsd.org>2008-10-06 00:34:11 +0000
commita7619a363c6dd7f9584d7311a94986f650cf5e73 (patch)
tree875292bd9a5c51239c65cb773031a198c331b792 /sys
parentce0e3bf4f3fdcac79b08ed3d5648e6bf54e46e2f (diff)
Detect and store the PCI/PCIe bus speed.
From DragonFly
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/ic/re.c28
-rw-r--r--sys/dev/ic/rtl81x9reg.h10
2 files changed, 33 insertions, 5 deletions
diff --git a/sys/dev/ic/re.c b/sys/dev/ic/re.c
index 22446b01f55..1841632cd28 100644
--- a/sys/dev/ic/re.c
+++ b/sys/dev/ic/re.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: re.c,v 1.91 2008/10/02 20:21:13 brad Exp $ */
+/* $OpenBSD: re.c,v 1.92 2008/10/06 00:34:09 brad Exp $ */
/* $FreeBSD: if_re.c,v 1.31 2004/09/04 07:54:05 ru Exp $ */
/*
* Copyright (c) 1997, 1998-2003
@@ -923,6 +923,32 @@ re_attach(struct rl_softc *sc, const char *intrstr)
printf(", %s, address %s\n", intrstr,
ether_sprintf(sc->sc_arpcom.ac_enaddr));
+ if (sc->sc_hwrev == RL_HWREV_8139CPLUS) {
+ sc->rl_bus_speed = 33; /* XXX */
+ } else if (sc->rl_flags & RL_FLAG_PCIE) {
+ sc->rl_bus_speed = 125;
+ } else {
+ u_int8_t cfg2;
+
+ cfg2 = CSR_READ_1(sc, RL_CFG2);
+ switch (cfg2 & RL_CFG2_PCI_MASK) {
+ case RL_CFG2_PCI_33MHZ:
+ sc->rl_bus_speed = 33;
+ break;
+ case RL_CFG2_PCI_66MHZ:
+ sc->rl_bus_speed = 66;
+ break;
+ default:
+ printf("%s: unknown bus speed, assume 33MHz\n",
+ sc->sc_dev.dv_xname);
+ sc->rl_bus_speed = 33;
+ break;
+ }
+
+ if (cfg2 & RL_CFG2_PCI_64BIT)
+ sc->rl_flags |= RL_FLAG_PCI64;
+ }
+
if (sc->rl_ldata.rl_tx_desc_cnt >
PAGE_SIZE / sizeof(struct rl_desc)) {
sc->rl_ldata.rl_tx_desc_cnt =
diff --git a/sys/dev/ic/rtl81x9reg.h b/sys/dev/ic/rtl81x9reg.h
index c0850ac23f6..9fed4d864db 100644
--- a/sys/dev/ic/rtl81x9reg.h
+++ b/sys/dev/ic/rtl81x9reg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: rtl81x9reg.h,v 1.54 2008/10/05 22:43:40 brad Exp $ */
+/* $OpenBSD: rtl81x9reg.h,v 1.55 2008/10/06 00:34:10 brad Exp $ */
/*
* Copyright (c) 1997, 1998
@@ -393,9 +393,10 @@
/*
* Config 2 register
*/
-#define RL_CFG2_PCI33MHZ 0x00
-#define RL_CFG2_PCI66MHZ 0x01
-#define RL_CFG2_PCI64BIT 0x08
+#define RL_CFG2_PCI_MASK 0x07
+#define RL_CFG2_PCI_33MHZ 0x00
+#define RL_CFG2_PCI_66MHZ 0x01
+#define RL_CFG2_PCI_64BIT 0x08
#define RL_CFG2_AUXPWR 0x10
/*
@@ -789,6 +790,7 @@ struct rl_softc {
u_int32_t sc_hwrev;
int rl_eecmd_read;
int rl_eewidth;
+ int rl_bus_speed;
void *sc_sdhook; /* shutdownhook */
void *sc_pwrhook;
int rl_txthresh;