swap the port register table arrays to make it better readble and fix some

register typos... on init, wait for the receive engine to be ready before
setting up the descriptor rings.

2 files changed, 65 insertions, 47 deletions

diff --git a/sys/dev/pci/if_nx.c b/sys/dev/pci/if_nx.c
index 0208f740981..3ee4f2b67c8 100644
--- a/sys/dev/pci/if_nx.c
+++ b/sys/dev/pci/if_nx.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_nx.c,v 1.39 2007/05/03 21:05:41 reyk Exp $	*/
+/*	$OpenBSD: if_nx.c,v 1.40 2007/05/04 04:18:10 reyk Exp $	*/
 
 /*
  * Copyright (c) 2007 Reyk Floeter <reyk@openbsd.org>
@@ -79,7 +79,7 @@ int nx_debug = 0;
 #define DPRINTREG(_lvl, _reg)	do {					\
 	if (nx_debug & (_lvl))						\
 		printf("%s: 0x%08x: %08x\n",				\
-		    #_reg, _reg, nxb_readcrb(sc, _reg));			\
+		    #_reg, _reg, nxb_readcrb(sc, _reg));		\
 } while (0)
 #else
 #define DPRINTREG(_lvl, _reg)
@@ -267,6 +267,10 @@ const struct nxb_board {
 	{ NXB_BOARDTYPE_P2SB31_10GCX4,	NXNIU_MODE_XGE, 1, IFM_10G_CX4 }
 };
 
+/* Use mapping table, see if_nxreg.h for details */
+const u_int32_t nx_swportreg[NXSW_PORTREG_MAX][NX_MAX_PORTS] = NXSW_PORTREGS;
+#define NXSW_PORTREG(_p, _r)	(nx_swportreg[_r][nx->nx_port->nxp_id])
+
 extern int ifqmaxlen;
 
 /*
@@ -617,7 +621,6 @@ nxb_newstate(struct nxb_softc *sc, int newstate)
 			sc->sc_state = NX_S_FAIL;
 			return (-1);
 		}
-		nxb_writecrb(sc, NXSW_CMDPEG_STATE, NXSW_CMDPEG_INIT_ACK);
 		break;
 	case NX_S_RELOADED:
 		assert(oldstate == NX_S_RESET || oldstate == NX_S_BOOT);
@@ -697,6 +700,7 @@ nxb_reload(void *arg)
 			timeout_add(&sc->sc_reload, hz / 100);
 		return;
 	}
+	nxb_writecrb(sc, NXSW_MPORT_MODE, NXSW_MPORT_MODE_NFUNC);
 	nxb_writecrb(sc, NXSW_CMDPEG_STATE, NXSW_CMDPEG_INIT_ACK);
 
 	/* Firmware is ready for operation, allow interrupts etc. */
@@ -1446,12 +1450,6 @@ nx_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
 		error = (cmd == SIOCADDMULTI) ?
 		    ether_addmulti(ifr, &nx->nx_ac) :
 		    ether_delmulti(ifr, &nx->nx_ac);
-
-		if (error == ENETRESET) {
-			if (ifp->if_flags & IFF_RUNNING)
-				nx_iff(nx);
-			error = 0;
-		}
 		break;
 
 	case SIOCGIFMEDIA:
@@ -1463,10 +1461,10 @@ nx_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
 		error = ENOTTY;
 	}
 
-	if (error == ENETRESET) {
+        if (error == ENETRESET) {
 		if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
 		    (IFF_UP | IFF_RUNNING))
-			nx_init(ifp);
+			nx_iff(nx);
 		error = 0;
 	}
 
@@ -1479,10 +1477,23 @@ void
 nx_init(struct ifnet *ifp)
 {
 	struct nx_softc		*nx = (struct nx_softc *)ifp->if_softc;
+	struct nxb_softc	*sc = nx->nx_sc;
+
+	if (sc->sc_state != NX_S_READY)
+		return;
+
+	if (nxb_wait(sc, NXSW_PORTREG(nx, NXSW_RCVPEG_STATE),
+	    NXSW_RCVPEG_INIT_DONE, NXSW_RCVPEG_STATE_M, 1, 2000) != 0) {
+		printf("%s: receive engine not ready, code 0x%x\n",
+		    DEVNAME(nx), nx_readcrb(nx, NXSW_RCVPEG_STATE));
+		return;
+	}
 
-	/* Update the station MAC address */
 	nx_setlladdr(nx, LLADDR(ifp->if_sadl));
 
+	ifp->if_flags |= IFF_RUNNING;
+	ifp->if_flags &= ~IFF_OACTIVE;
+
 	return;
 }
 
@@ -1495,6 +1506,7 @@ nx_start(struct ifnet *ifp)
 void
 nx_stop(struct ifnet *ifp)
 {
+	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
 	return;
 }
 
@@ -1559,16 +1571,12 @@ nx_writephy(struct nx_softc *nx, bus_size_t reg, u_int32_t val)
 	    BUS_SPACE_BARRIER_WRITE);
 }
 
-/* Use mapping table, see if_nxreg.h for details */
-const u_int32_t nx_swportreg[NX_MAX_PORTS][NXSW_PORTREG_MAX] = NXSW_PORTREGS;
-
 u_int32_t
 nx_readcrb(struct nx_softc *nx, enum nxsw_portreg n)
 {
-	struct nxb_port		*nxp = nx->nx_port;
 	u_int32_t		 reg;
 
-	reg = nx_swportreg[nxp->nxp_id][n];
+	reg = NXSW_PORTREG(nx, n);
 	nxb_set_crbwindow(nx->nx_sc, NXMEMMAP_WINDOW1_START);
 	bus_space_barrier(nx->nx_memt, nx->nx_memh, reg, 4,
 	    BUS_SPACE_BARRIER_READ);
@@ -1578,10 +1586,9 @@ nx_readcrb(struct nx_softc *nx, enum nxsw_portreg n)
 void
 nx_writecrb(struct nx_softc *nx, enum nxsw_portreg n, u_int32_t val)
 {
-	struct nxb_port		*nxp = nx->nx_port;
 	u_int32_t		 reg;
 
-	reg = nx_swportreg[nxp->nxp_id][n];
+	reg = NXSW_PORTREG(nx, n);
 	nxb_set_crbwindow(nx->nx_sc, NXMEMMAP_WINDOW1_START);
 	bus_space_write_4(nx->nx_memt, nx->nx_memh, reg, val);
 	bus_space_barrier(nx->nx_memt, nx->nx_memh, reg, 4,
diff --git a/sys/dev/pci/if_nxreg.h b/sys/dev/pci/if_nxreg.h
index e10b9dde8b6..b8a09da69d2 100644
--- a/sys/dev/pci/if_nxreg.h
+++ b/sys/dev/pci/if_nxreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_nxreg.h,v 1.22 2007/05/03 21:05:41 reyk Exp $	*/
+/*	$OpenBSD: if_nxreg.h,v 1.23 2007/05/04 04:18:10 reyk Exp $	*/
 
 /*
  * Copyright (c) 2007 Reyk Floeter <reyk@openbsd.org>
@@ -167,7 +167,7 @@ struct nx_ringcontext {
 	/* d3 state register, dummy dma address */
 	u_int64_t		rc_reserved[2];
 
-	u_int32_t		rc_align;	/* 64bit aligned */
+	u_int32_t		rc_txconsumer;
 } __packed;
 
 /*
@@ -434,6 +434,10 @@ struct nx_ringcontext {
 #define NXSW_XG_STATE		NXSW(0x2294)	/* PHY state register */
 #define  NXSW_XG_LINK_UP	(1<<4)		/* 10G PHY state up */
 #define  NXSW_XG_LINK_DOWN	(1<<5)		/* 10G PHY state down */
+#define NXSW_MPORT_MODE		NXSW(0x22c4)	/* Multi port mode */
+#define  NXSW_MPORT_MODE_M	0xffff		/* Mode mask */
+#define  NXSW_MPORT_MODE_1FUNC	0x1111		/* Single function mode */
+#define  NXSW_MPORT_MODE_NFUNC	0x2222		/* Multi function mode */
 
 #define NXSW_TEMP		NXSW(0x23b4)	/* Temperature sensor */
 #define  NXSW_TEMP_STATE_M	0x0000ffff	/* Temp state mask */
@@ -451,7 +455,6 @@ struct nx_ringcontext {
  * they're using different offsets between the registers. Ugh, we have to
  * define a mapping table to avoid a ton of ugly if's in the code.
  */
-
 enum nxsw_portreg {
 	NXSW_RCV_PRODUCER_OFF	= 0,		/* Producer Rx ring index */
 	NXSW_RCV_CONSUMER_OFF,			/* Consumer Rx ring index */
@@ -472,36 +475,44 @@ enum nxsw_portreg {
 	NXSW_STATUS_PROD,			/* Producer status index */
 	NXSW_STATUS_CONS,			/* Consumer status index */
 	NXSW_RCVPEG_STATE,			/* State of the NX2031 */
+#define  NXSW_RCVPEG_STATE_M	0xffff		/* State mask */
+#define  NXSW_RCVPEG_INIT_START	0xff00		/* Start of initialization */
+#define  NXSW_RCVPEG_INIT_DONE	0xff01		/* Initialization complete */
+#define  NXSW_RCVPEG_INIT_ACK	0xf00f		/* Initialization ACKed */
+#define  NXSW_RCVPEG_INIT_FAIL	0xffff		/* Initialization failed */
 	NXSW_STATUS_RING_SIZE,			/* Entries in the status ring */
 
+	NXSW_CONTEXT_ADDR_LO,			/* Low address of context */
+	NXSW_CONTEXT_ADDR_HI,			/* High address of context */
+	NXSW_CONTEXT_SIG,			/* Context signature */
+
 	NXSW_PORTREG_MAX
 };
 #define NXSW_PORTREGS		{					\
-	{								\
-	    NXSW(0x2300), NXSW(0x2304), NXSW(0x2308), NXSW(0x230c),	\
-	    NXSW(0x2310), NXSW(0x2314), NXSW(0x2318), NXSW(0x231c),	\
-	    NXSW(0x2320), NXSW(0x2324), NXSW(0x2328), NXSW(0x232c),	\
-	    NXSW(0x2320), NXSW(0x2324), NXSW(0x2328), NXSW(0x232c),	\
-	    NXSW(0x2340)						\
-	}, {								\
-	    NXSW(0x2344), NXSW(0x2348), NXSW(0x234c), NXSW(0x2350),	\
-	    NXSW(0x2354), NXSW(0x2358), NXSW(0x235c), NXSW(0x2360),	\
-	    NXSW(0x2364), NXSW(0x2368), NXSW(0x236c), NXSW(0x2370),	\
-	    NXSW(0x2374), NXSW(0x2378), NXSW(0x237c), NXSW(0x2380),	\
-	    NXSW(0x2384)						\
-	}, {								\
-	    NXSW(0x23d8), NXSW(0x23dc), NXSW(0x23f0), NXSW(0x23f4),	\
-	    NXSW(0x23f8), NXSW(0x23fc), NXSW(0x2400), NXSW(0x2404),	\
-	    NXSW(0x2408), NXSW(0x240c), NXSW(0x2410), NXSW(0x2414),	\
-	    NXSW(0x2418), NXSW(0x241c), NXSW(0x2420), NXSW(0x2424),	\
-	    NXSW(0x2428)						\
-	}, {								\
-	    NXSW(0x242c), NXSW(0x2430), NXSW(0x2434), NXSW(0x2438),	\
-	    NXSW(0x243c), NXSW(0x2440), NXSW(0x2444), NXSW(0x2448),	\
-	    NXSW(0x244c), NXSW(0x2450), NXSW(0x2454), NXSW(0x2458),	\
-	    NXSW(0x245c), NXSW(0x2460), NXSW(0x2464), NXSW(0x2468),	\
-	    NXSW(0x246c)						\
-	}								\
+	{ NXSW(0x2300), NXSW(0x2344), NXSW(0x23d8), NXSW(0x242c) },	\
+	{ NXSW(0x2304), NXSW(0x2348), NXSW(0x23dc), NXSW(0x2430) },	\
+	{ NXSW(0x2308), NXSW(0x234c), NXSW(0x23f0), NXSW(0x2434) },	\
+	{ NXSW(0x230c), NXSW(0x2350), NXSW(0x23f4), NXSW(0x2438) },	\
+									\
+	{ NXSW(0x2310), NXSW(0x2354), NXSW(0x23f8), NXSW(0x243c) },	\
+	{ NXSW(0x2314), NXSW(0x2358), NXSW(0x23fc), NXSW(0x2440) },	\
+	{ NXSW(0x2318), NXSW(0x235c), NXSW(0x2400), NXSW(0x2444) },	\
+	{ NXSW(0x231c), NXSW(0x2360), NXSW(0x2404), NXSW(0x2448) },	\
+									\
+	{ NXSW(0x2320), NXSW(0x2364), NXSW(0x2408), NXSW(0x244c) },	\
+	{ NXSW(0x2324), NXSW(0x2368), NXSW(0x240c), NXSW(0x2450) },	\
+	{ NXSW(0x2328), NXSW(0x236c), NXSW(0x2410), NXSW(0x2454) },	\
+	{ NXSW(0x232c), NXSW(0x2370), NXSW(0x2414), NXSW(0x2458) },	\
+									\
+	{ NXSW(0x2330), NXSW(0x2374), NXSW(0x2418), NXSW(0x245c) },	\
+	{ NXSW(0x2334), NXSW(0x2378), NXSW(0x241c), NXSW(0x2460) },	\
+	{ NXSW(0x2338), NXSW(0x237c), NXSW(0x2420), NXSW(0x2464) },	\
+	{ NXSW(0x233c), NXSW(0x2380), NXSW(0x2424), NXSW(0x2468) },	\
+	{ NXSW(0x2340), NXSW(0x2384), NXSW(0x2428), NXSW(0x246c) },	\
+									\
+	{ NXSW(0x2388), NXSW(0x2390), NXSW(0x2398), NXSW(0x23a0) },	\
+	{ NXSW(0x238c), NXSW(0x2394), NXSW(0x239c), NXSW(0x23a4) },	\
+	{ NXSW(0x23c0), NXSW(0x23c4), NXSW(0x23c8), NXSW(0x23cc) }	\
 }
 
 /*