combus renamed uartbus, com_oct renamed cn30xxuart

9 files changed, 429 insertions, 431 deletions

diff --git a/sys/arch/octeon/conf/GENERIC b/sys/arch/octeon/conf/GENERIC
index 5685efe1c74..60d028bcd39 100644
--- a/sys/arch/octeon/conf/GENERIC
+++ b/sys/arch/octeon/conf/GENERIC
@@ -1,4 +1,4 @@
-#	$OpenBSD: GENERIC,v 1.6 2011/05/08 13:24:55 syuu Exp $
+#	$OpenBSD: GENERIC,v 1.7 2011/05/08 13:39:30 syuu Exp $
 #
 # For further information on compiling OpenBSD kernels, see the config(8)
 # man page.
@@ -29,12 +29,12 @@ mainbus0	at root
 cpu0		at mainbus0
 clock0		at mainbus0
 iobus0		at mainbus0
-combus0		at mainbus0
+uartbus0	at mainbus0
 
 octcf0		at iobus0
 
-com0		at combus0
-com1		at combus0
+com0		at uartbus0
+com1		at uartbus0
 
 pcibus*		at iobus0
 pci*		at pcibus?
diff --git a/sys/arch/octeon/conf/RAMDISK b/sys/arch/octeon/conf/RAMDISK
index e391dc0b2a2..f61b487ae35 100644
--- a/sys/arch/octeon/conf/RAMDISK
+++ b/sys/arch/octeon/conf/RAMDISK
@@ -1,4 +1,4 @@
-#	$OpenBSD: RAMDISK,v 1.7 2011/05/08 13:24:55 syuu Exp $
+#	$OpenBSD: RAMDISK,v 1.8 2011/05/08 13:39:30 syuu Exp $
 #
 # For further information on compiling OpenBSD kernels, see the config(8)
 # man page.
@@ -43,12 +43,12 @@ mainbus0	at root
 cpu0		at mainbus0
 clock0		at mainbus0
 iobus0		at mainbus0
-combus0		at mainbus0
+uartbus0	at mainbus0
 
 octcf0		at iobus0
 
-com0		at combus0
-com1		at combus0
+com0		at uartbus0
+com1		at uartbus0
 
 pcibus*		at iobus0
 pci*		at pcibus?
diff --git a/sys/arch/octeon/conf/files.octeon b/sys/arch/octeon/conf/files.octeon
index df5bce0c444..87a4c500864 100644
--- a/sys/arch/octeon/conf/files.octeon
+++ b/sys/arch/octeon/conf/files.octeon
@@ -1,4 +1,4 @@
-#	$OpenBSD: files.octeon,v 1.7 2011/05/08 13:24:55 syuu Exp $
+#	$OpenBSD: files.octeon,v 1.8 2011/05/08 13:39:30 syuu Exp $
 
 # Standard stanzas config(8) can't run without
 maxpartitions 16
@@ -60,13 +60,13 @@ device	octcf: disk
 attach	octcf at iobus
 file	arch/octeon/dev/octcf.c				octcf
 
-define	combus {[base = -1]}
-device	combus
-attach	combus at mainbus
-file	arch/octeon/dev/combus.c			combus
+define	uartbus {[base = -1]}
+device	uartbus
+attach	uartbus at mainbus
+file	arch/octeon/dev/octeon_uartbus.c		uartbus
 
-attach	com at combus with com_oct
-file	arch/octeon/dev/com_oct.c			com_oct
+attach	com at uartbus with cn30xxuart
+file	arch/octeon/dev/cn30xxuart.c			cn30xxuart
 
 device	pcibus
 attach	pcibus at iobus
diff --git a/sys/arch/octeon/dev/com_oct.c b/sys/arch/octeon/dev/cn30xxuart.c
index 36700d1f348..e8b3e51a2fe 100644
--- a/sys/arch/octeon/dev/com_oct.c
+++ b/sys/arch/octeon/dev/cn30xxuart.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: com_oct.c,v 1.3 2011/05/08 13:24:55 syuu Exp $	*/
+/*	$OpenBSD: cn30xxuart.c,v 1.1 2011/05/08 13:39:30 syuu Exp $	*/
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -34,25 +34,25 @@
 
 #include <machine/autoconf.h>
 #include <machine/bus.h>
-#include <machine/intr.h>
 
 #include <dev/ic/comreg.h>
 #include <dev/ic/comvar.h>
 #include <dev/cons.h>
 
-#include <octeon/dev/combusvar.h>
+#include <octeon/dev/iobusvar.h>
+#include <octeon/dev/uartbusvar.h>
 #include <octeon/dev/octeonreg.h>
 
-int	com_oct_probe(struct device *, void *, void *);
-void	com_oct_attach(struct device *, struct device *, void *);
+int	cn30xxuart_probe(struct device *, void *, void *);
+void	cn30xxuart_attach(struct device *, struct device *, void *);
 
-struct cfattach com_oct_ca = {
-	sizeof(struct com_softc), com_oct_probe, com_oct_attach
+struct cfattach cn30xxuart_ca = {
+	sizeof(struct com_softc), cn30xxuart_probe, cn30xxuart_attach
 };
 
 extern struct cfdriver com_cd;
 
-cons_decl(com_oct);
+cons_decl(cn30xxuart);
 
 #define  OCTEON_MIO_UART0               0x8001180000000800ull
 #define  OCTEON_MIO_UART0_LSR           0x8001180000000828ull
@@ -64,26 +64,26 @@ cons_decl(com_oct);
 #define  USR_TXFIFO_NOTFULL		2
 
 static int delay_changed = 1;
-int com_oct_delay(void);
-void com_oct_wait_txhr_empty(int);
+int cn30xxuart_delay(void);
+void cn30xxuart_wait_txhr_empty(int);
 
 int
-com_oct_probe(struct device *parent, void *match, void *aux)
+cn30xxuart_probe(struct device *parent, void *match, void *aux)
 {
 	struct cfdata *cf = match;
-	struct combus_attach_args *cba = aux;
-	bus_space_tag_t iot = cba->cba_memt;
+	struct uartbus_attach_args *uba = aux;
+	bus_space_tag_t iot = uba->uba_memt;
 	bus_space_handle_t ioh;
 	int rv = 0, console;
 
-	if (strcmp(cba->cba_name, com_cd.cd_name) != 0)
+	if (strcmp(uba->uba_name, com_cd.cd_name) != 0)
 		return 0;
 
 	console = 1;
 
 	/* if it's in use as console, it's there. */
 	if (!(console && !comconsattached)) {
-		if (bus_space_map(iot, cba->cba_baseaddr, COM_NPORTS, 0, &ioh)) {
+		if (bus_space_map(iot, uba->uba_baseaddr, COM_NPORTS, 0, &ioh)) {
 			printf(": can't map uart registers\n");
 			return 1;
 		}
@@ -99,16 +99,16 @@ com_oct_probe(struct device *parent, void *match, void *aux)
 }
 
 void
-com_oct_attach(struct device *parent, struct device *self, void *aux)
+cn30xxuart_attach(struct device *parent, struct device *self, void *aux)
 {
 	struct com_softc *sc = (void *)self;
-	struct combus_attach_args *cba = aux;
+	struct uartbus_attach_args *uba = aux;
 	int console;
 
 	console = 1;
 
-	sc->sc_iot = cba->cba_memt;
-	sc->sc_iobase = cba->cba_baseaddr;
+	sc->sc_iot = uba->uba_memt;
+	sc->sc_iobase = uba->uba_baseaddr;
 	sc->sc_hwflags = 0;
 	sc->sc_swflags = 0;
 	sc->sc_frequency = curcpu()->ci_hw.clock;
@@ -134,7 +134,7 @@ com_oct_attach(struct device *parent, struct device *self, void *aux)
 
 	com_attach_subr(sc);
 
-	octeon_intr_establish(cba->cba_intr, IPL_TTY, comintr,
+	octeon_intr_establish(uba->uba_intr, IPL_TTY, comintr,
 	    (void *)sc, sc->sc_dev.dv_xname);
 }
 
@@ -142,7 +142,7 @@ com_oct_attach(struct device *parent, struct device *self, void *aux)
  * Early console routines.
  */
 int 
-com_oct_delay(void)
+cn30xxuart_delay(void)
 {
 	int divisor;
 	u_char lcr;
@@ -160,7 +160,7 @@ com_oct_delay(void)
 }
 
 void
-com_oct_wait_txhr_empty(int d)
+cn30xxuart_wait_txhr_empty(int d)
 {
 	while (((*(uint64_t*)OCTEON_MIO_UART0_LSR & LSR_TXRDY) == 0) &&
         	((*(uint64_t*)OCTEON_MIO_UART0_USR & USR_TXFIFO_NOTFULL) == 0))
@@ -168,39 +168,39 @@ com_oct_wait_txhr_empty(int d)
 }
 
 void
-com_octcninit(struct consdev *consdev)
+cn30xxuartcninit(struct consdev *consdev)
 {
 }
 
 void
-com_octcnprobe(struct consdev *consdev)
+cn30xxuartcnprobe(struct consdev *consdev)
 {
 }
 
 void
-com_octcnpollc(dev_t dev, int c)
+cn30xxuartcnpollc(dev_t dev, int c)
 {
 }
 
 void
-com_octcnputc (dev_t dev, int c)
+cn30xxuartcnputc (dev_t dev, int c)
 {
 	int d;
 
 	/* 1/10th the time to transmit 1 character (estimate). */
-	d = com_oct_delay();
-        com_oct_wait_txhr_empty(d);
+	d = cn30xxuart_delay();
+        cn30xxuart_wait_txhr_empty(d);
 	*(uint64_t*)OCTEON_MIO_UART0_RBR = (uint8_t)c;
-        com_oct_wait_txhr_empty(d);
+        cn30xxuart_wait_txhr_empty(d);
 }
 
 int
-com_octcngetc (dev_t dev)
+cn30xxuartcngetc (dev_t dev)
 {
 	int c, d;
 
 	/* 1/10th the time to transmit 1 character (estimate). */
-	d = com_oct_delay();
+	d = cn30xxuart_delay();
 
 	while ((*(uint64_t*)OCTEON_MIO_UART0_LSR & LSR_RXRDY) == 0)
 		delay(d);
diff --git a/sys/arch/octeon/dev/combus.c b/sys/arch/octeon/dev/combus.c
deleted file mode 100644
index 870e930d9fe..00000000000
--- a/sys/arch/octeon/dev/combus.c
+++ /dev/null
@@ -1,369 +0,0 @@
-/*	$OpenBSD: combus.c,v 1.2 2010/10/26 00:02:01 syuu Exp $ */
-
-/*
- * Copyright (c) 2000-2004 Opsycon AB  (www.opsycon.se)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-/*
- * This is a combus, for OCTEON UART.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/conf.h>
-#include <sys/malloc.h>
-#include <sys/device.h>
-#include <sys/proc.h>
-
-#include <mips64/archtype.h>
-
-#include <machine/autoconf.h>
-#include <machine/intr.h>
-#include <machine/atomic.h>
-
-#include <octeon/dev/octeonreg.h>
-#include <octeon/dev/combusvar.h>
-
-#include <dev/ic/comreg.h>
-#include <dev/ic/ns16550reg.h>
-#define	com_lcr	com_cfcr
-
-int	 combusmatch(struct device *, void *, void *);
-void	 combusattach(struct device *, struct device *, void *);
-int	 combusprint(void *, const char *);
-int	 combussubmatch(struct device *, void *, void *);
-
-u_int8_t combus_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-u_int16_t combus_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-u_int32_t combus_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-u_int64_t combus_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-
-void	 combus_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
-	    u_int8_t);
-void	 combus_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
-	    u_int16_t);
-void	 combus_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
-	    u_int32_t);
-void	 combus_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t,
-	    u_int64_t);
-
-void	 combus_read_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
-	    u_int8_t *, bus_size_t);
-void	 combus_write_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
-	    const u_int8_t *, bus_size_t);
-void	 combus_read_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
-	    u_int8_t *, bus_size_t);
-void	 combus_write_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
-	    const u_int8_t *, bus_size_t);
-void	 combus_read_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
-	    u_int8_t *, bus_size_t);
-void	 combus_write_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
-	    const u_int8_t *, bus_size_t);
-
-int	 combus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
-	    bus_space_handle_t *);
-void	 combus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-int	 combus_space_region(bus_space_tag_t, bus_space_handle_t, bus_size_t,
-	    bus_size_t, bus_space_handle_t *);
-
-void	*combus_space_vaddr(bus_space_tag_t, bus_space_handle_t);
-
-bus_addr_t combus_pa_to_device(paddr_t);
-paddr_t	 combus_device_to_pa(bus_addr_t);
-
-bus_size_t combus_get_read_reg(bus_size_t);
-bus_size_t combus_get_write_reg(bus_size_t, u_int8_t);
-
-static int lcr = 0;
-
-struct cfattach combus_ca = {
-	sizeof(struct device), combusmatch, combusattach
-};
-
-struct cfdriver combus_cd = {
-	NULL, "combus", DV_DULL
-};
-
-bus_space_t combus_tag = {
-	PHYS_TO_XKPHYS(0, CCA_NC),
-	NULL,
-	combus_read_1, combus_write_1,
-	combus_read_2, combus_write_2,
-	combus_read_4, combus_write_4,
-	combus_read_8, combus_write_8,
-	combus_read_raw_2, combus_write_raw_2,
-	combus_read_raw_4, combus_write_raw_4,
-	combus_read_raw_8, combus_write_raw_8,
-	combus_space_map, combus_space_unmap, combus_space_region,
-	combus_space_vaddr
-};
-
-/*
- * List of combus child devices.
- */
-
-#define	COMBUSDEV(name, addr, i) \
-	{ name, &combus_tag, &combus_tag, addr, i }
-struct combus_attach_args combus_children[] = {
-	COMBUSDEV("com", OCTEON_UART0_BASE, CIU_INT_UART0),
-	COMBUSDEV("com", OCTEON_UART1_BASE, CIU_INT_UART1),
-};
-#undef	COMBUSDEV
-
-
-
-/*
- * Match bus only to targets which have this bus.
- */
-int
-combusmatch(struct device *parent, void *match, void *aux)
-{
-	return (1);
-}
-
-int
-combusprint(void *aux, const char *combus)
-{
-	struct combus_attach_args *cba = aux;
-
-	if (combus != NULL)
-		printf("%s at %s", cba->cba_name, combus);
-
-	if (cba->cba_baseaddr != 0)
-		printf(" base 0x%llx", cba->cba_baseaddr);
-	if (cba->cba_intr >= 0)
-		printf(" irq %d", cba->cba_intr);
-
-	return (UNCONF);
-}
-
-int
-combussubmatch(struct device *parent, void *vcf, void *args)
-{
-	struct cfdata *cf = vcf;
-	struct combus_attach_args *cba = args;
-
-	if (strcmp(cf->cf_driver->cd_name, cba->cba_name) != 0)
-		return 0;
-
-	if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != (int)cba->cba_baseaddr)
-		return 0;
-
-	return (*cf->cf_attach->ca_match)(parent, cf, cba);
-}
-
-void
-combusattach(struct device *parent, struct device *self, void *aux)
-{
-	uint i;
-
-	printf("\n");
-
-	/*
-	 * Attach subdevices.
-	 */
-	for (i = 0; i < nitems(combus_children); i++)
-		config_found_sm(self, combus_children + i,
-		    combusprint, combussubmatch);
-}
-
-/*
- * Bus access primitives. These are really ugly...
- */
-
-u_int8_t
-combus_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
-	o = combus_get_read_reg(o);
-	return (u_int8_t)(volatile uint64_t)*(volatile uint64_t *)(h + o);
-}
-
-u_int16_t
-combus_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
-	panic(__func__);
-}
-
-u_int32_t
-combus_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
-	panic(__func__);
-}
-
-u_int64_t
-combus_read_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
-{
-	panic(__func__);
-}
-
-void
-combus_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
-{
-	o = combus_get_write_reg(o, 1);
-	*(volatile uint64_t *)(h + o) = (volatile uint64_t)v;
-}
-
-void
-combus_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int16_t v)
-{
-	panic(__func__);
-}
-
-void
-combus_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int32_t v)
-{
-	panic(__func__);
-}
-
-void
-combus_write_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int64_t v)
-{
-	panic(__func__);
-}
-
-void
-combus_read_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
-    u_int8_t *buf, bus_size_t len)
-{
-	panic(__func__);
-}
-
-void
-combus_write_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
-    const u_int8_t *buf, bus_size_t len)
-{
-	panic(__func__);
-}
-
-void
-combus_read_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
-    u_int8_t *buf, bus_size_t len)
-{
-	panic(__func__);
-}
-
-void
-combus_write_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
-    const u_int8_t *buf, bus_size_t len)
-{
-	panic(__func__);
-}
-
-void
-combus_read_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
-    u_int8_t *buf, bus_size_t len)
-{
-	panic(__func__);
-}
-
-void
-combus_write_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
-    const u_int8_t *buf, bus_size_t len)
-{
-	panic(__func__);
-}
-
-int
-combus_space_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size,
-    int flags, bus_space_handle_t *bshp)
-{
-	*bshp = t->bus_base + offs;
-
-	return 0;
-}
-
-void
-combus_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
-{
-}
-
-int
-combus_space_region(bus_space_tag_t t, bus_space_handle_t bsh,
-    bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
-{
-	*nbshp = bsh + offset;
-	return (0);
-}
-
-void *
-combus_space_vaddr(bus_space_tag_t t, bus_space_handle_t h)
-{
-	return (void *)h;
-}
-
-/*
- * combus bus_dma helpers.
- */
-
-bus_addr_t
-combus_pa_to_device(paddr_t pa)
-{
-	return (bus_addr_t)pa;
-}
-
-paddr_t
-combus_device_to_pa(bus_addr_t addr)
-{
-	return (paddr_t)addr;
-}
-
-bus_size_t
-combus_get_read_reg(bus_size_t o)
-{
-	if (lcr && LCR_DLAB)
-		switch(o) {
-			case com_dlbl:
-				return (bus_size_t)0x80;
-			case com_dlbh:
-				return (bus_size_t)0x88;
-		}
-
-	return (bus_size_t)(o << 3);
-}
-
-bus_size_t
-combus_get_write_reg(bus_size_t o, u_int8_t v)
-{
-	if (o == com_lcr)
-		lcr = v;
-
-	switch(o) {
-		case com_data:
-			return (bus_size_t)0x40;
-		case com_fifo:
-			return (bus_size_t)0x50;
-	}
-
-	if (lcr && LCR_DLAB)
-		switch(o) {
-			case com_dlbl:
-				return (bus_size_t)0x80;
-			case com_dlbh:
-				return (bus_size_t)0x88;
-		}
-
-	return (bus_size_t)(o << 3);
-}
diff --git a/sys/arch/octeon/dev/mainbus.c b/sys/arch/octeon/dev/mainbus.c
index 5028743f093..c12f5999651 100644
--- a/sys/arch/octeon/dev/mainbus.c
+++ b/sys/arch/octeon/dev/mainbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mainbus.c,v 1.3 2011/05/08 13:24:55 syuu Exp $ */
+/*	$OpenBSD: mainbus.c,v 1.4 2011/05/08 13:39:30 syuu Exp $ */
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -78,7 +78,7 @@ mainbus_attach(struct device *parent, struct device *self, void *aux)
 	config_found(self, &caa.caa_maa, mainbus_print);
 
 	/* uart I/O */
-	caa.caa_maa.maa_name = "combus";
+	caa.caa_maa.maa_name = "uartbus";
 	config_found(self, &caa.caa_maa, mainbus_print);
 
 	/* on-board I/O */
diff --git a/sys/arch/octeon/dev/octeon_uartbus.c b/sys/arch/octeon/dev/octeon_uartbus.c
new file mode 100644
index 00000000000..da9f0247026
--- /dev/null
+++ b/sys/arch/octeon/dev/octeon_uartbus.c
@@ -0,0 +1,369 @@
+/*	$OpenBSD: octeon_uartbus.c,v 1.1 2011/05/08 13:39:30 syuu Exp $ */
+
+/*
+ * Copyright (c) 2000-2004 Opsycon AB  (www.opsycon.se)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+/*
+ * This is a uartbus, for OCTEON UART.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/conf.h>
+#include <sys/malloc.h>
+#include <sys/device.h>
+#include <sys/proc.h>
+
+#include <mips64/archtype.h>
+
+#include <machine/autoconf.h>
+#include <machine/intr.h>
+#include <machine/atomic.h>
+
+#include <octeon/dev/octeonreg.h>
+#include <octeon/dev/uartbusvar.h>
+
+#include <dev/ic/comreg.h>
+#include <dev/ic/ns16550reg.h>
+#define	com_lcr	com_cfcr
+
+int	 uartbusmatch(struct device *, void *, void *);
+void	 uartbusattach(struct device *, struct device *, void *);
+int	 uartbusprint(void *, const char *);
+int	 uartbussubmatch(struct device *, void *, void *);
+
+u_int8_t uartbus_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+u_int16_t uartbus_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+u_int32_t uartbus_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+u_int64_t uartbus_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+
+void	 uartbus_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
+	    u_int8_t);
+void	 uartbus_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
+	    u_int16_t);
+void	 uartbus_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
+	    u_int32_t);
+void	 uartbus_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t,
+	    u_int64_t);
+
+void	 uartbus_read_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
+	    u_int8_t *, bus_size_t);
+void	 uartbus_write_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
+	    const u_int8_t *, bus_size_t);
+void	 uartbus_read_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
+	    u_int8_t *, bus_size_t);
+void	 uartbus_write_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
+	    const u_int8_t *, bus_size_t);
+void	 uartbus_read_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
+	    u_int8_t *, bus_size_t);
+void	 uartbus_write_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
+	    const u_int8_t *, bus_size_t);
+
+int	 uartbus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
+	    bus_space_handle_t *);
+void	 uartbus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+int	 uartbus_space_region(bus_space_tag_t, bus_space_handle_t, bus_size_t,
+	    bus_size_t, bus_space_handle_t *);
+
+void	*uartbus_space_vaddr(bus_space_tag_t, bus_space_handle_t);
+
+bus_addr_t uartbus_pa_to_device(paddr_t);
+paddr_t	 uartbus_device_to_pa(bus_addr_t);
+
+bus_size_t uartbus_get_read_reg(bus_size_t);
+bus_size_t uartbus_get_write_reg(bus_size_t, u_int8_t);
+
+static int lcr = 0;
+
+struct cfattach uartbus_ca = {
+	sizeof(struct device), uartbusmatch, uartbusattach
+};
+
+struct cfdriver uartbus_cd = {
+	NULL, "uartbus", DV_DULL
+};
+
+bus_space_t uartbus_tag = {
+	PHYS_TO_XKPHYS(0, CCA_NC),
+	NULL,
+	uartbus_read_1, uartbus_write_1,
+	uartbus_read_2, uartbus_write_2,
+	uartbus_read_4, uartbus_write_4,
+	uartbus_read_8, uartbus_write_8,
+	uartbus_read_raw_2, uartbus_write_raw_2,
+	uartbus_read_raw_4, uartbus_write_raw_4,
+	uartbus_read_raw_8, uartbus_write_raw_8,
+	uartbus_space_map, uartbus_space_unmap, uartbus_space_region,
+	uartbus_space_vaddr
+};
+
+/*
+ * List of uartbus child devices.
+ */
+
+#define	UARTBUSDEV(name, addr, i) \
+	{ name, &uartbus_tag, addr, i }
+struct uartbus_attach_args uartbus_children[] = {
+	UARTBUSDEV("com", OCTEON_UART0_BASE, CIU_INT_UART0),
+	UARTBUSDEV("com", OCTEON_UART1_BASE, CIU_INT_UART1),
+};
+#undef	UARTBUSDEV
+
+
+
+/*
+ * Match bus only to targets which have this bus.
+ */
+int
+uartbusmatch(struct device *parent, void *match, void *aux)
+{
+	return (1);
+}
+
+int
+uartbusprint(void *aux, const char *uartbus)
+{
+	struct uartbus_attach_args *uba = aux;
+
+	if (uartbus != NULL)
+		printf("%s at %s", uba->uba_name, uartbus);
+
+	if (uba->uba_baseaddr != 0)
+		printf(" base 0x%llx", uba->uba_baseaddr);
+	if (uba->uba_intr >= 0)
+		printf(" irq %d", uba->uba_intr);
+
+	return (UNCONF);
+}
+
+int
+uartbussubmatch(struct device *parent, void *vcf, void *args)
+{
+	struct cfdata *cf = vcf;
+	struct uartbus_attach_args *uba = args;
+
+	if (strcmp(cf->cf_driver->cd_name, uba->uba_name) != 0)
+		return 0;
+
+	if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != (int)uba->uba_baseaddr)
+		return 0;
+
+	return (*cf->cf_attach->ca_match)(parent, cf, uba);
+}
+
+void
+uartbusattach(struct device *parent, struct device *self, void *aux)
+{
+	uint i;
+
+	printf("\n");
+
+	/*
+	 * Attach subdevices.
+	 */
+	for (i = 0; i < nitems(uartbus_children); i++)
+		config_found_sm(self, uartbus_children + i,
+		    uartbusprint, uartbussubmatch);
+}
+
+/*
+ * Bus access primitives. These are really ugly...
+ */
+
+u_int8_t
+uartbus_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+	o = uartbus_get_read_reg(o);
+	return (u_int8_t)(volatile uint64_t)*(volatile uint64_t *)(h + o);
+}
+
+u_int16_t
+uartbus_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+	panic(__func__);
+}
+
+u_int32_t
+uartbus_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+	panic(__func__);
+}
+
+u_int64_t
+uartbus_read_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+	panic(__func__);
+}
+
+void
+uartbus_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
+{
+	o = uartbus_get_write_reg(o, 1);
+	*(volatile uint64_t *)(h + o) = (volatile uint64_t)v;
+}
+
+void
+uartbus_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int16_t v)
+{
+	panic(__func__);
+}
+
+void
+uartbus_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int32_t v)
+{
+	panic(__func__);
+}
+
+void
+uartbus_write_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int64_t v)
+{
+	panic(__func__);
+}
+
+void
+uartbus_read_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
+    u_int8_t *buf, bus_size_t len)
+{
+	panic(__func__);
+}
+
+void
+uartbus_write_raw_2(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
+    const u_int8_t *buf, bus_size_t len)
+{
+	panic(__func__);
+}
+
+void
+uartbus_read_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
+    u_int8_t *buf, bus_size_t len)
+{
+	panic(__func__);
+}
+
+void
+uartbus_write_raw_4(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
+    const u_int8_t *buf, bus_size_t len)
+{
+	panic(__func__);
+}
+
+void
+uartbus_read_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
+    u_int8_t *buf, bus_size_t len)
+{
+	panic(__func__);
+}
+
+void
+uartbus_write_raw_8(bus_space_tag_t t, bus_space_handle_t h, bus_addr_t o,
+    const u_int8_t *buf, bus_size_t len)
+{
+	panic(__func__);
+}
+
+int
+uartbus_space_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size,
+    int flags, bus_space_handle_t *bshp)
+{
+	*bshp = t->bus_base + offs;
+
+	return 0;
+}
+
+void
+uartbus_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
+{
+}
+
+int
+uartbus_space_region(bus_space_tag_t t, bus_space_handle_t bsh,
+    bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
+{
+	*nbshp = bsh + offset;
+	return (0);
+}
+
+void *
+uartbus_space_vaddr(bus_space_tag_t t, bus_space_handle_t h)
+{
+	return (void *)h;
+}
+
+/*
+ * uartbus bus_dma helpers.
+ */
+
+bus_addr_t
+uartbus_pa_to_device(paddr_t pa)
+{
+	return (bus_addr_t)pa;
+}
+
+paddr_t
+uartbus_device_to_pa(bus_addr_t addr)
+{
+	return (paddr_t)addr;
+}
+
+bus_size_t
+uartbus_get_read_reg(bus_size_t o)
+{
+	if (lcr && LCR_DLAB)
+		switch(o) {
+			case com_dlbl:
+				return (bus_size_t)0x80;
+			case com_dlbh:
+				return (bus_size_t)0x88;
+		}
+
+	return (bus_size_t)(o << 3);
+}
+
+bus_size_t
+uartbus_get_write_reg(bus_size_t o, u_int8_t v)
+{
+	if (o == com_lcr)
+		lcr = v;
+
+	switch(o) {
+		case com_data:
+			return (bus_size_t)0x40;
+		case com_fifo:
+			return (bus_size_t)0x50;
+	}
+
+	if (lcr && LCR_DLAB)
+		switch(o) {
+			case com_dlbl:
+				return (bus_size_t)0x80;
+			case com_dlbh:
+				return (bus_size_t)0x88;
+		}
+
+	return (bus_size_t)(o << 3);
+}
diff --git a/sys/arch/octeon/dev/combusvar.h b/sys/arch/octeon/dev/uartbusvar.h
index ef6a8790b1d..918869050fc 100644
--- a/sys/arch/octeon/dev/combusvar.h
+++ b/sys/arch/octeon/dev/uartbusvar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: combusvar.h,v 1.1 2010/10/01 16:13:59 syuu Exp $	*/
+/*	$OpenBSD: uartbusvar.h,v 1.1 2011/05/08 13:39:30 syuu Exp $	*/
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -26,18 +26,16 @@
  *
  */
 
-#ifndef	_COMBUSVAR_H_
-#define	_COMBUSVAR_H_
+#ifndef	_UARTBUSVAR_H_
+#define	_UARTBUSVAR_H_
 
 #include <machine/bus.h>
 
-struct combus_attach_args {
-	char		*cba_name;
-
-	bus_space_tag_t  cba_iot;
-	bus_space_tag_t  cba_memt;
-	bus_addr_t	 cba_baseaddr;
-	int	 	 cba_intr;
+struct uartbus_attach_args {
+	char		*uba_name;
+	bus_space_tag_t  uba_memt;
+	bus_addr_t	 uba_baseaddr;
+	int	 	 uba_intr;
 };
 
-#endif	/* _COMBUSVAR_H_ */
+#endif	/* _UARTBUSVAR_H_ */
diff --git a/sys/arch/octeon/octeon/machdep.c b/sys/arch/octeon/octeon/machdep.c
index 80d8e1ffb62..d4756e69bca 100644
--- a/sys/arch/octeon/octeon/machdep.c
+++ b/sys/arch/octeon/octeon/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.8 2011/05/08 13:24:55 syuu Exp $ */
+/*	$OpenBSD: machdep.c,v 1.9 2011/05/08 13:39:30 syuu Exp $ */
 
 /*
  * Copyright (c) 2009, 2010 Miodrag Vallat.
@@ -206,8 +206,8 @@ vaddr_t	mips_init(__register_t, __register_t, __register_t, __register_t);
 boolean_t is_memory_range(paddr_t, psize_t, psize_t);
 void	octeon_memory_init(struct boot_info *);
 
-cons_decl(com_oct);
-struct consdev octcons = cons_init(com_oct);
+cons_decl(cn30xxuart);
+struct consdev octcons = cons_init(cn30xxuart);
 
 #define btoc(x) (((x)+PAGE_MASK)>>PAGE_SHIFT)