Attach amdmsr(4) at mainbus in a way that it can be disabled in UKC or the

config file, only configure the driver when we have an AMD Geode LX
CPU and the graphics processor is available.

mainbus part by miod, ok miod, matthieu

3 files changed, 45 insertions, 6 deletions

diff --git a/sys/arch/i386/i386/amdmsr.c b/sys/arch/i386/i386/amdmsr.c
index 38ea7534678..c6bdab7611f 100644
--- a/sys/arch/i386/i386/amdmsr.c
+++ b/sys/arch/i386/i386/amdmsr.c
@@ -1,4 +1,4 @@
-/*      $OpenBSD: amdmsr.c,v 1.3 2008/06/15 15:31:55 matthieu Exp $	*/
+/*      $OpenBSD: amdmsr.c,v 1.4 2008/06/18 20:15:54 mbalmer Exp $	*/
 
 /*
  * Copyright (c) 2008 Marc Balmer <mbalmer@openbsd.org>
@@ -18,7 +18,7 @@
  */
 
 /*
- * Enable MSR access AMD Processors
+ * Enable MSR access for AMD Geode LX Processors with graphics processor
  */
 
 #include <sys/param.h>
@@ -42,6 +42,11 @@ static int amdmsr_open_cnt;
 extern int allowaperture;
 #endif
 
+#define GLX_CPU_GLD_MSR_CAP	0x00002000
+#define GLX_CPU_DID		0x0864		/* CPU device ID */
+#define GLX_GP_GLD_MSR_CAP	0xa0002000
+#define GLX_GP_DID		0x03d4		/* GP device ID */
+
 struct amdmsr_softc {
 	struct device		sc_dev;
 };
@@ -58,8 +63,9 @@ struct cfattach amdmsr_ca = {
 };
 
 int
-amdmsr_match(struct device *parent, void *match, void *aux)
+amdmsr_probe()
 {
+	u_int64_t gld_msr_cap;
 	int family, model, step;
 
 	family = (cpu_id >> 8) & 0xf;
@@ -67,12 +73,27 @@ amdmsr_match(struct device *parent, void *match, void *aux)
 	step   = (cpu_id >> 0) & 0xf;
 
 	if (strcmp(cpu_vendor, "AuthenticAMD") == 0 && family == 0x5 &&
-	    (model > 0x8 || (model == 0x8 && step > 0x7)))
-		return 1;
+	    (model > 0x8 || (model == 0x8 && step > 0x7))) {
+		/* Check for Geode LX CPU and graphics processor presence */
+		gld_msr_cap = rdmsr(GLX_CPU_GLD_MSR_CAP);
+		if (((gld_msr_cap >> 8) & 0x0fff) == GLX_CPU_DID) {
+			gld_msr_cap = rdmsr(GLX_GP_GLD_MSR_CAP);
+			if (((gld_msr_cap >> 8) & 0x0fff) == GLX_GP_DID)
+				return 1;
+		}
+	}
 
 	return 0;
 }
 
+int
+amdmsr_match(struct device *parent, void *match, void *aux)
+{
+	const char **busname = (const char **)aux;
+
+	return (strcmp(*busname, amdmsr_cd.cd_name) == 0);
+}
+
 void
 amdmsr_attach(struct device *parent, struct device *self, void *aux)
 {
@@ -83,6 +104,9 @@ int
 amdmsropen(dev_t dev, int flags, int devtype, struct proc *p)
 {
 #ifdef APERTURE
+	if (amdmsr_cd.cd_ndevs == 0 || minor(dev) != 0)
+		return ENXIO;
+
 	if (suser(p, 0) != 0 || !allowaperture)
 		return EPERM;
 	/* allow only one simultaneous open() */
diff --git a/sys/arch/i386/i386/mainbus.c b/sys/arch/i386/i386/mainbus.c
index 69b510a0bac..42582e1f77f 100644
--- a/sys/arch/i386/i386/mainbus.c
+++ b/sys/arch/i386/i386/mainbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mainbus.c,v 1.40 2008/01/13 22:29:01 kettenis Exp $	*/
+/*	$OpenBSD: mainbus.c,v 1.41 2008/06/18 20:15:54 mbalmer Exp $	*/
 /*	$NetBSD: mainbus.c,v 1.21 1997/06/06 23:14:20 thorpej Exp $	*/
 
 /*
@@ -54,6 +54,7 @@
 #include "ipmi.h"
 #include "esm.h"
 #include "vesabios.h"
+#include "amdmsr.h"
 
 #include <machine/cpuvar.h>
 #include <machine/i82093var.h>
@@ -69,6 +70,10 @@
 #include <dev/ipmivar.h>
 #endif
 
+#if NAMDMSR > 0
+#include <machine/amdmsr.h>
+#endif
+
 #if NESM > 0
 #include <arch/i386/i386/esmvar.h>
 #endif
@@ -173,6 +178,12 @@ mainbus_attach(struct device *parent, struct device *self, void *aux)
 
 		config_found(self, &caa, mainbus_print);
 	}
+#if NAMDMSR > 0
+	if (amdmsr_probe()) {
+		mba.mba_busname = "amdmsr";
+		config_found(self, &mba.mba_busname, mainbus_print);
+	}
+#endif
 
 #if NACPI > 0
 	if (!acpi_hasprocfvs)
diff --git a/sys/arch/i386/include/amdmsr.h b/sys/arch/i386/include/amdmsr.h
index 9e3ca730c70..78abbd689eb 100644
--- a/sys/arch/i386/include/amdmsr.h
+++ b/sys/arch/i386/include/amdmsr.h
@@ -25,4 +25,8 @@ struct amdmsr_req {
 #define RDMSR	_IOWR('M', 0, struct amdmsr_req)
 #define WRMSR	_IOW('M', 1, struct amdmsr_req)
 
+#ifdef _KERNEL
+int	amdmsr_probe(void);
+#endif
+
 #endif	/* !_SYS_AMDMSR_H_ */