diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2022-04-21 09:55:26 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2022-04-21 09:55:26 +0000 |
| commit | 0d5e1832457b6f81920ecdd34def4d5e86a288f4 (patch) | |
| tree | ced6fa40fce5aecf10f21ef0037ee4a09ad2554a /sys | |
| parent | af22ac312c282d7fcccfc4c2a8aac9380675f6d1 (diff) | |
drm/amd/display: don't ignore alpha property on pre-multiplied mode
From Melissa Wen
804c096d640ece718d6505c5252eb66544bbc2c9 in linux 5.15.y/5.15.35
e4f1541caf60fcbe5a59e9d25805c0b5865e546a in mainline linux
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 14 | ||||
| -rw-r--r-- | sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 14 |
2 files changed, 18 insertions, 10 deletions
diff --git a/sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index 711b18d96ea..93f31e4aeec 100644 --- a/sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -2460,14 +2460,18 @@ void dcn10_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx) struct mpc *mpc = dc->res_pool->mpc; struct mpc_tree *mpc_tree_params = &(pipe_ctx->stream_res.opp->mpc_tree_params); - if (per_pixel_alpha) - blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; - else - blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; - blnd_cfg.overlap_only = false; blnd_cfg.global_gain = 0xff; + if (per_pixel_alpha && pipe_ctx->plane_state->global_alpha) { + blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN; + blnd_cfg.global_gain = pipe_ctx->plane_state->global_alpha_value; + } else if (per_pixel_alpha) { + blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; + } else { + blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; + } + if (pipe_ctx->plane_state->global_alpha) blnd_cfg.global_alpha = pipe_ctx->plane_state->global_alpha_value; else diff --git a/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_hwseq.c index a47ba1d45be..9f8d7f92300 100644 --- a/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -2297,14 +2297,18 @@ void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx) struct mpc *mpc = dc->res_pool->mpc; struct mpc_tree *mpc_tree_params = &(pipe_ctx->stream_res.opp->mpc_tree_params); - if (per_pixel_alpha) - blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; - else - blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; - blnd_cfg.overlap_only = false; blnd_cfg.global_gain = 0xff; + if (per_pixel_alpha && pipe_ctx->plane_state->global_alpha) { + blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN; + blnd_cfg.global_gain = pipe_ctx->plane_state->global_alpha_value; + } else if (per_pixel_alpha) { + blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; + } else { + blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; + } + if (pipe_ctx->plane_state->global_alpha) blnd_cfg.global_alpha = pipe_ctx->plane_state->global_alpha_value; else |