diff options
| author | Mark Kettenis <kettenis@cvs.openbsd.org> | 2024-06-11 09:15:34 +0000 |
|---|---|---|
| committer | Mark Kettenis <kettenis@cvs.openbsd.org> | 2024-06-11 09:15:34 +0000 |
| commit | 1e6faa6c694f25be539096eab47ae15c3d8377d3 (patch) | |
| tree | 16daede9edc8fff22b31afa4ccc4f92e1d58fcc0 /sys | |
| parent | 5121713055d9d7358b962a760fdd03c02794836e (diff) | |
Add RK3588 TSADC clocks and resets.
ok patrick@, dlg@
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/fdt/rkclock.c | 15 | ||||
| -rw-r--r-- | sys/dev/fdt/rkclock_clocks.h | 3 |
2 files changed, 17 insertions, 1 deletions
diff --git a/sys/dev/fdt/rkclock.c b/sys/dev/fdt/rkclock.c index 81aca118463..568601faf0f 100644 --- a/sys/dev/fdt/rkclock.c +++ b/sys/dev/fdt/rkclock.c @@ -1,4 +1,4 @@ -/* $OpenBSD: rkclock.c,v 1.88 2024/04/01 11:16:11 patrick Exp $ */ +/* $OpenBSD: rkclock.c,v 1.89 2024/06/11 09:15:33 kettenis Exp $ */ /* * Copyright (c) 2017, 2018 Mark Kettenis <kettenis@openbsd.org> * @@ -4003,6 +4003,11 @@ const struct rkclock rk3588_clocks[] = { { RK3588_CLK_200M_SRC, RK3588_CLK_150M_SRC, RK3588_XIN24M }, }, { + RK3588_CLK_TSADC, RK3588_CRU_CLKSEL_CON(41), + SEL(8, 8), DIV(7, 0), + { RK3588_PLL_GPLL, RK3588_XIN24M }, + }, + { RK3588_CLK_UART1_SRC, RK3588_CRU_CLKSEL_CON(41), SEL(14, 14), DIV(13, 9), { RK3588_PLL_GPLL, RK3588_PLL_CPLL } @@ -4554,6 +4559,14 @@ rk3588_reset(void *cookie, uint32_t *cells, int on) uint32_t bit, mask, reg; switch (idx) { + case RK3588_SRST_P_TSADC: + reg = RK3588_CRU_SOFTRST_CON(12); + bit = 0; + break; + case RK3588_SRST_TSADC: + reg = RK3588_CRU_SOFTRST_CON(12); + bit = 1; + break; case RK3588_SRST_A_GMAC0: reg = RK3588_CRU_SOFTRST_CON(32); bit = 10; diff --git a/sys/dev/fdt/rkclock_clocks.h b/sys/dev/fdt/rkclock_clocks.h index 793c1a02103..c7707355cac 100644 --- a/sys/dev/fdt/rkclock_clocks.h +++ b/sys/dev/fdt/rkclock_clocks.h @@ -427,6 +427,7 @@ #define RK3588_CLK_SPI2 153 #define RK3588_CLK_SPI3 154 #define RK3588_CLK_SPI4 155 +#define RK3588_CLK_TSADC 158 #define RK3588_CLK_UART1_SRC 168 #define RK3588_CLK_UART1_FRAC 169 #define RK3588_CLK_UART1 170 @@ -510,6 +511,8 @@ #define RK3588_PLL_SPLL 1022 #define RK3588_XIN24M 1023 +#define RK3588_SRST_P_TSADC 86 +#define RK3588_SRST_TSADC 87 #define RK3588_SRST_A_GMAC0 291 #define RK3588_SRST_A_GMAC1 292 #define RK3588_SRST_PCIE0_POWER_UP 294 |