Instead of juggling around with cr4 and enabling parts of it sometimes,

other parts later, etc. Just set it to the same default value everywhere.
We won't survive without PSE and tt's not like someone will suddenly make
an amd64 that doesn't support PGE.

This will allow us to make the bootstrap process slightly more sane.

7 files changed, 22 insertions, 34 deletions

diff --git a/sys/arch/amd64/amd64/cpu.c b/sys/arch/amd64/amd64/cpu.c
index cf12178674d..3d628ab3f4c 100644
--- a/sys/arch/amd64/amd64/cpu.c
+++ b/sys/arch/amd64/amd64/cpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.c,v 1.9 2005/07/18 02:43:24 fgsch Exp $	*/
+/*	$OpenBSD: cpu.c,v 1.10 2005/07/26 08:38:29 art Exp $	*/
 /* $NetBSD: cpu.c,v 1.1 2003/04/26 18:39:26 fvdl Exp $ */
 
 /*-
@@ -390,7 +390,7 @@ cpu_init(ci)
 		(*ci->cpu_setup)(ci);
 
 	lcr0(rcr0() | CR0_WP);
-	lcr4(rcr4() | CR4_PGE | CR4_PSE | CR4_OSFXSR | CR4_OSXMMEXCPT);
+	lcr4(rcr4() | CR4_DEFAULT);
 
 #ifdef MTRR
 	if ((ci->ci_flags & CPUF_AP) == 0)
diff --git a/sys/arch/amd64/amd64/genassym.cf b/sys/arch/amd64/amd64/genassym.cf
index 8b80c559e9e..c7371149c8a 100644
--- a/sys/arch/amd64/amd64/genassym.cf
+++ b/sys/arch/amd64/amd64/genassym.cf
@@ -1,4 +1,4 @@
-#	$OpenBSD: genassym.cf,v 1.8 2004/07/20 20:17:16 art Exp $
+#	$OpenBSD: genassym.cf,v 1.9 2005/07/26 08:38:29 art Exp $
 #	Written by Artur Grabowski art@openbsd.org, Public Domain
 
 include <sys/param.h>
@@ -149,3 +149,5 @@ export	PDIR_SLOT_PTE
 export	NKL4_KIMG_ENTRIES
 export	NKL3_KIMG_ENTRIES
 export	NKL2_KIMG_ENTRIES
+
+export	CR4_DEFAULT
diff --git a/sys/arch/amd64/amd64/locore.S b/sys/arch/amd64/amd64/locore.S
index 46583605655..2f9c36b63bc 100644
--- a/sys/arch/amd64/amd64/locore.S
+++ b/sys/arch/amd64/amd64/locore.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: locore.S,v 1.19 2005/05/29 03:20:36 deraadt Exp $	*/
+/*	$OpenBSD: locore.S,v 1.20 2005/07/26 08:38:29 art Exp $	*/
 /*	$NetBSD: locore.S,v 1.13 2004/03/25 18:33:17 drochner Exp $	*/
 
 /*
@@ -499,7 +499,7 @@ bi_size_ok:
 	 * 1. Enable PAE (and SSE while here).
 	 */
 	movl	%cr4,%eax
-	orl	$(CR4_PAE|CR4_OSFXSR|CR4_OSXMMEXCPT),%eax
+	orl	$(CR4_DEFAULT),%eax
 	movl	%eax,%cr4
 
 	/*
@@ -1025,8 +1025,7 @@ ENTRY(cpu_switchto)
  * Switch to proc0's saved context and deallocate the address space and kernel
  * stack for p.  Then jump into cpu_switch(), as if we were in proc0 all along.
  */
-	.globl	_C_LABEL(proc0),_C_LABEL(uvmspace_free),_C_LABEL(kernel_map)
-	.globl	_C_LABEL(uvm_km_free),_C_LABEL(tss_free)
+	.globl	_C_LABEL(proc0)
 ENTRY(switch_exit)
 #ifdef MULTIPROCESSOR
 	movq	CPUVAR(IDLE_PCB),%r8
diff --git a/sys/arch/amd64/amd64/machdep.c b/sys/arch/amd64/amd64/machdep.c
index cdd4ffa0843..ad47736e6a0 100644
--- a/sys/arch/amd64/amd64/machdep.c
+++ b/sys/arch/amd64/amd64/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.31 2005/06/02 20:09:38 tholo Exp $	*/
+/*	$OpenBSD: machdep.c,v 1.32 2005/07/26 08:38:29 art Exp $	*/
 /*	$NetBSD: machdep.c,v 1.3 2003/05/07 22:58:18 fvdl Exp $	*/
 
 /*-
@@ -272,22 +272,9 @@ cpu_startup(void)
 {
 	vaddr_t v;
 	vsize_t sz;
-	int x;
 	vaddr_t minaddr, maxaddr;
 
-	/*
-	 * Initialize error message buffer (et end of core).
-	 */
-	msgbuf_vaddr = uvm_km_valloc(kernel_map, x86_round_page(MSGBUFSIZE));
-	if (msgbuf_vaddr == 0)
-		panic("failed to valloc msgbuf_vaddr");
-
-	/* msgbuf_paddr was init'd in pmap */
-	for (x = 0; x < btoc(MSGBUFSIZE); x++)
-		pmap_kenter_pa((vaddr_t)msgbuf_vaddr + x * PAGE_SIZE,
-		    msgbuf_paddr + x * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE);
-	pmap_update(pmap_kenel());
-
+	msgbuf_vaddr = PMAP_DIRECT_MAP(msgbuf_paddr);
 	initmsgbuf((caddr_t)msgbuf_vaddr, round_page(MSGBUFSIZE));
 
 	printf("%s", version);
diff --git a/sys/arch/amd64/amd64/mptramp.S b/sys/arch/amd64/amd64/mptramp.S
index ddf0a91cf55..397c672f36c 100644
--- a/sys/arch/amd64/amd64/mptramp.S
+++ b/sys/arch/amd64/amd64/mptramp.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mptramp.S,v 1.2 2004/07/19 15:09:05 art Exp $	*/
+/*	$OpenBSD: mptramp.S,v 1.3 2005/07/26 08:38:29 art Exp $	*/
 /*	$NetBSD: mptramp.S,v 1.1 2003/04/26 18:39:30 fvdl Exp $	*/
 
 /*-
@@ -141,7 +141,7 @@ _TRMP_LABEL(mp_startup)
 	popfl
 
 	movl	%cr4,%eax
-	orl	$(CR4_PAE|CR4_OSFXSR|CR4_OSXMMEXCPT|CR4_PGE|CR4_PSE),%eax
+	orl	$(CR4_DEFAULT),%eax
 	movl	%eax,%cr4
 
 	movl	$MSR_EFER,%ecx
diff --git a/sys/arch/amd64/amd64/pmap.c b/sys/arch/amd64/amd64/pmap.c
index 9e1d424080e..3998d216fde 100644
--- a/sys/arch/amd64/amd64/pmap.c
+++ b/sys/arch/amd64/amd64/pmap.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pmap.c,v 1.10 2005/06/01 14:36:36 brad Exp $	*/
+/*	$OpenBSD: pmap.c,v 1.11 2005/07/26 08:38:29 art Exp $	*/
 /*	$NetBSD: pmap.c,v 1.3 2003/05/08 18:13:13 thorpej Exp $	*/
 
 /*
@@ -759,8 +759,6 @@ pmap_bootstrap(vaddr_t kva_start, paddr_t max_pa)
 	/*
 	 * enable global TLB entries.
 	 */
-	lcr4(rcr4() | CR4_PGE);	/* enable hardware (via %cr4) */
-	tlbflush();
 	pmap_pg_g = PG_G;		/* enable software */
 
 	/* add PG_G attribute to already mapped kernel pages */
@@ -784,12 +782,6 @@ pmap_bootstrap(vaddr_t kva_start, paddr_t max_pa)
 	tmppte = PTE_BASE + pl1_i(tmpva);
 
 	/*
-	 * Enable large pages.
-	 */
-	lcr4(rcr4() | CR4_PSE);
-	tlbflush();
-
-	/*
 	 * Map the direct map. We steal pages for the page tables from
 	 * avail_start, then we create temporary mappings using the
 	 * early_zerop. Scary, slow, but we only do it once.
diff --git a/sys/arch/amd64/include/cpu.h b/sys/arch/amd64/include/cpu.h
index d66db3f5da1..54c4c795f37 100644
--- a/sys/arch/amd64/include/cpu.h
+++ b/sys/arch/amd64/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.11 2005/04/19 15:14:11 mickey Exp $	*/
+/*	$OpenBSD: cpu.h,v 1.12 2005/07/26 08:38:29 art Exp $	*/
 /*	$NetBSD: cpu.h,v 1.1 2003/04/26 18:39:39 fvdl Exp $	*/
 
 /*-
@@ -343,4 +343,12 @@ void x86_bus_space_mallocok(void);
 	{ "userldt", CTLTYPE_INT }, \
 }
 
+/*
+ * Default cr4 flags.
+ * Doesn't really belong here, but doesn't really belong anywhere else
+ * either. Just to avoid painful mismatches of cr4 flags since they are
+ * set in three different places.
+ */
+#define CR4_DEFAULT (CR4_PAE|CR4_PGE|CR4_PSE|CR4_OSFXSR|CR4_OSXMMEXCPT)
+
 #endif /* !_AMD64_CPU_H_ */