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authorMiod Vallat <miod@cvs.openbsd.org>2010-02-09 19:23:20 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2010-02-09 19:23:20 +0000
commitb928eff7667d94d9cead0ebdc66ffa2216e01f31 (patch)
treefce1b720a88f2a0d47a539d17ec18a68215ab561 /sys
parente611bb29b2978b5bc3b116ed979a8459ae2fb0b8 (diff)
Less aggressive cache ops on BUS_DMASYNC_PREREAD alone (leftover from older
code before I got DMA address computation reliable).
Diffstat (limited to 'sys')
-rw-r--r--sys/arch/loongson/loongson/bus_dma.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/sys/arch/loongson/loongson/bus_dma.c b/sys/arch/loongson/loongson/bus_dma.c
index 77134d175ee..936e67bcbcc 100644
--- a/sys/arch/loongson/loongson/bus_dma.c
+++ b/sys/arch/loongson/loongson/bus_dma.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: bus_dma.c,v 1.2 2010/01/09 23:34:29 miod Exp $ */
+/* $OpenBSD: bus_dma.c,v 1.3 2010/02/09 19:23:19 miod Exp $ */
/*
* Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
@@ -360,7 +360,7 @@ _dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t addr,
cacheop = SYNC_W;
} else {
if (op & BUS_DMASYNC_PREREAD)
- cacheop = SYNC_X;
+ cacheop = SYNC_R;
else if (op & BUS_DMASYNC_POSTREAD)
cacheop = SYNC_R;
else