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authorJonathan Gray <jsg@cvs.openbsd.org>2014-02-02 04:02:05 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2014-02-02 04:02:05 +0000
commitf1989bb9f9a58dcc6a69d86e0ffbd60f66c94cca (patch)
treeefa1ecbb0d6c95c536512881e120921ef2a50c9b /sys
parent8a7ab115f510fd73109c74bd59fc1fe26d78eea0 (diff)
drm/i915: Make data/link N value power of two
From Ville Syrjala 16f091c6e04b5ac247d7b3b3764c2fbe8683e497 in ubuntu 3.8 a65851af59387146a28a928c3e7bb17dabc5db72 in mainline linux
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/pci/drm/i915/i915_reg.h14
-rw-r--r--sys/dev/pci/drm/i915/intel_display.c25
2 files changed, 21 insertions, 18 deletions
diff --git a/sys/dev/pci/drm/i915/i915_reg.h b/sys/dev/pci/drm/i915/i915_reg.h
index 17b24d054db..0a13c26f0fa 100644
--- a/sys/dev/pci/drm/i915/i915_reg.h
+++ b/sys/dev/pci/drm/i915/i915_reg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: i915_reg.h,v 1.6 2014/02/01 09:32:05 jsg Exp $ */
+/* $OpenBSD: i915_reg.h,v 1.7 2014/02/02 04:02:04 jsg Exp $ */
/* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
* All Rights Reserved.
*
@@ -2606,14 +2606,14 @@
#define _PIPEB_GMCH_DATA_M 0x71050
/* Transfer unit size for display port - 1, default is 0x3f (for TU size 64) */
-#define PIPE_GMCH_DATA_M_TU_SIZE_MASK (0x3f << 25)
-#define PIPE_GMCH_DATA_M_TU_SIZE_SHIFT 25
+#define TU_SIZE(x) (((x)-1) << 25) /* default size 64 */
+#define TU_SIZE_MASK (0x3f << 25)
-#define PIPE_GMCH_DATA_M_MASK (0xffffff)
+#define DATA_LINK_M_N_MASK (0xffffff)
+#define DATA_LINK_N_MAX (0x800000)
#define _PIPEA_GMCH_DATA_N 0x70054
#define _PIPEB_GMCH_DATA_N 0x71054
-#define PIPE_GMCH_DATA_N_MASK (0xffffff)
/*
* Computing Link M and N values for the Display Port link
@@ -2628,11 +2628,9 @@
#define _PIPEA_DP_LINK_M 0x70060
#define _PIPEB_DP_LINK_M 0x71060
-#define PIPEA_DP_LINK_M_MASK (0xffffff)
#define _PIPEA_DP_LINK_N 0x70064
#define _PIPEB_DP_LINK_N 0x71064
-#define PIPEA_DP_LINK_N_MASK (0xffffff)
#define PIPE_GMCH_DATA_M(pipe) _PIPE(pipe, _PIPEA_GMCH_DATA_M, _PIPEB_GMCH_DATA_M)
#define PIPE_GMCH_DATA_N(pipe) _PIPE(pipe, _PIPEA_GMCH_DATA_N, _PIPEB_GMCH_DATA_N)
@@ -3298,8 +3296,6 @@
#define _PIPEA_DATA_M1 0x60030
-#define TU_SIZE(x) (((x)-1) << 25) /* default size 64 */
-#define TU_SIZE_MASK 0x7e000000
#define PIPE_DATA_M1_OFFSET 0
#define _PIPEA_DATA_N1 0x60034
#define PIPE_DATA_N1_OFFSET 0
diff --git a/sys/dev/pci/drm/i915/intel_display.c b/sys/dev/pci/drm/i915/intel_display.c
index 019ce41cb5f..e9225ffccb1 100644
--- a/sys/dev/pci/drm/i915/intel_display.c
+++ b/sys/dev/pci/drm/i915/intel_display.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: intel_display.c,v 1.26 2014/01/24 06:11:02 jsg Exp $ */
+/* $OpenBSD: intel_display.c,v 1.27 2014/02/02 04:02:04 jsg Exp $ */
/*
* Copyright © 2006-2007 Intel Corporation
*
@@ -4144,26 +4144,33 @@ struct fdi_m_n {
static void
fdi_reduce_ratio(u32 *num, u32 *den)
{
- while (*num > 0xffffff || *den > 0xffffff) {
+ while (*num > DATA_LINK_M_N_MASK ||
+ *den > DATA_LINK_M_N_MASK) {
*num >>= 1;
*den >>= 1;
}
}
+static void compute_m_n(unsigned int m, unsigned int n,
+ uint32_t *ret_m, uint32_t *ret_n)
+{
+ *ret_n = min_t(unsigned int, roundup_pow_of_two(n), DATA_LINK_N_MAX);
+ *ret_m = div_u64((uint64_t) m * *ret_n, n);
+ fdi_reduce_ratio(ret_m, ret_n);
+}
+
static void
ironlake_compute_m_n(int bits_per_pixel, int nlanes, int pixel_clock,
int link_clock, struct fdi_m_n *m_n)
{
m_n->tu = 64; /* default size */
- /* BUG_ON(pixel_clock > INT_MAX / 36); */
- m_n->gmch_m = bits_per_pixel * pixel_clock;
- m_n->gmch_n = link_clock * nlanes * 8;
- fdi_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n);
+ compute_m_n(bits_per_pixel * pixel_clock,
+ link_clock * nlanes * 8,
+ &m_n->gmch_m, &m_n->gmch_n);
- m_n->link_m = pixel_clock;
- m_n->link_n = link_clock;
- fdi_reduce_ratio(&m_n->link_m, &m_n->link_n);
+ compute_m_n(pixel_clock, link_clock,
+ &m_n->link_m, &m_n->link_n);
}
static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)