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authorMark Kettenis <kettenis@cvs.openbsd.org>2016-08-19 14:05:24 +0000
committerMark Kettenis <kettenis@cvs.openbsd.org>2016-08-19 14:05:24 +0000
commit5085505ebf5f7ed0b63d2a75d337320c867b4a7c (patch)
tree8c7b1337bc669e9e918f20dbb6a7184efee15794 /usr.bin/cvs
parentc2d1b86c09f9a87602cef7ac6a84a25daafed07f (diff)
Adjust the definitions of L1_S_COHERENT_v7, L2_L_COHERENT_v7 and
L2_S_COHERENT_v7 such that bus_dmamap_sync(9) avoids unnecessary cache flushes again for DMA'able memory mapped with the BUS_DMA_COHERENT flag. I broke this in pmap7.c rev 1.35. ok tom@
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